DMAを使用してDAC CubeMXで生成したコードを流用
DMAC.cpp@0:0ea9475fc06f, 2018-06-26 (annotated)
- Committer:
- k0050288
- Date:
- Tue Jun 26 06:27:49 2018 +0000
- Revision:
- 0:0ea9475fc06f
DAC?DMA??????
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
k0050288 | 0:0ea9475fc06f | 1 | #include "DMAC.h" |
k0050288 | 0:0ea9475fc06f | 2 | |
k0050288 | 0:0ea9475fc06f | 3 | /* HAL objects */ |
k0050288 | 0:0ea9475fc06f | 4 | static DAC_HandleTypeDef hdac; |
k0050288 | 0:0ea9475fc06f | 5 | static DMA_HandleTypeDef hdma_dac1; |
k0050288 | 0:0ea9475fc06f | 6 | static TIM_HandleTypeDef htim6; |
k0050288 | 0:0ea9475fc06f | 7 | |
k0050288 | 0:0ea9475fc06f | 8 | void DMAC::init() |
k0050288 | 0:0ea9475fc06f | 9 | { |
k0050288 | 0:0ea9475fc06f | 10 | MX_DMA_Init(); |
k0050288 | 0:0ea9475fc06f | 11 | MX_TIM6_Init(); |
k0050288 | 0:0ea9475fc06f | 12 | MX_DAC_Init(); |
k0050288 | 0:0ea9475fc06f | 13 | |
k0050288 | 0:0ea9475fc06f | 14 | // disable interrupt |
k0050288 | 0:0ea9475fc06f | 15 | HAL_NVIC_DisableIRQ(DMA1_Stream5_IRQn); |
k0050288 | 0:0ea9475fc06f | 16 | |
k0050288 | 0:0ea9475fc06f | 17 | // start DAC |
k0050288 | 0:0ea9475fc06f | 18 | HAL_TIM_Base_Start(&htim6); |
k0050288 | 0:0ea9475fc06f | 19 | HAL_DAC_Start(&hdac,DAC_CHANNEL_1); |
k0050288 | 0:0ea9475fc06f | 20 | } |
k0050288 | 0:0ea9475fc06f | 21 | |
k0050288 | 0:0ea9475fc06f | 22 | void DMAC::play(const uint16_t* data, uint32_t len) |
k0050288 | 0:0ea9475fc06f | 23 | { |
k0050288 | 0:0ea9475fc06f | 24 | // stop DMA |
k0050288 | 0:0ea9475fc06f | 25 | HAL_DAC_Stop_DMA(&hdac, DAC_CHANNEL_1); |
k0050288 | 0:0ea9475fc06f | 26 | |
k0050288 | 0:0ea9475fc06f | 27 | // start DMA |
k0050288 | 0:0ea9475fc06f | 28 | HAL_DAC_Start_DMA(&hdac, DAC_CHANNEL_1, (uint32_t*)data, len/2, DAC_ALIGN_12B_R); |
k0050288 | 0:0ea9475fc06f | 29 | } |
k0050288 | 0:0ea9475fc06f | 30 | |
k0050288 | 0:0ea9475fc06f | 31 | |
k0050288 | 0:0ea9475fc06f | 32 | |
k0050288 | 0:0ea9475fc06f | 33 | /* HAL functions */ |
k0050288 | 0:0ea9475fc06f | 34 | void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) |
k0050288 | 0:0ea9475fc06f | 35 | { |
k0050288 | 0:0ea9475fc06f | 36 | if(htim_base->Instance==TIM6) |
k0050288 | 0:0ea9475fc06f | 37 | { |
k0050288 | 0:0ea9475fc06f | 38 | __HAL_RCC_TIM6_CLK_ENABLE(); |
k0050288 | 0:0ea9475fc06f | 39 | } |
k0050288 | 0:0ea9475fc06f | 40 | } |
k0050288 | 0:0ea9475fc06f | 41 | |
k0050288 | 0:0ea9475fc06f | 42 | void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac) |
k0050288 | 0:0ea9475fc06f | 43 | { |
k0050288 | 0:0ea9475fc06f | 44 | GPIO_InitTypeDef GPIO_InitStruct; |
k0050288 | 0:0ea9475fc06f | 45 | if(hdac->Instance==DAC) |
k0050288 | 0:0ea9475fc06f | 46 | { |
k0050288 | 0:0ea9475fc06f | 47 | /* Peripheral clock enable */ |
k0050288 | 0:0ea9475fc06f | 48 | __HAL_RCC_DAC_CLK_ENABLE(); |
k0050288 | 0:0ea9475fc06f | 49 | |
k0050288 | 0:0ea9475fc06f | 50 | /**DAC GPIO Configuration |
k0050288 | 0:0ea9475fc06f | 51 | PA4 ------> DAC_OUT1 |
k0050288 | 0:0ea9475fc06f | 52 | */ |
k0050288 | 0:0ea9475fc06f | 53 | GPIO_InitStruct.Pin = GPIO_PIN_4; |
k0050288 | 0:0ea9475fc06f | 54 | GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; |
k0050288 | 0:0ea9475fc06f | 55 | GPIO_InitStruct.Pull = GPIO_NOPULL; |
k0050288 | 0:0ea9475fc06f | 56 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); |
k0050288 | 0:0ea9475fc06f | 57 | |
k0050288 | 0:0ea9475fc06f | 58 | /* DAC DMA Init */ |
k0050288 | 0:0ea9475fc06f | 59 | /* DAC1 Init */ |
k0050288 | 0:0ea9475fc06f | 60 | hdma_dac1.Instance = DMA1_Stream5; |
k0050288 | 0:0ea9475fc06f | 61 | hdma_dac1.Init.Channel = DMA_CHANNEL_7; |
k0050288 | 0:0ea9475fc06f | 62 | hdma_dac1.Init.Direction = DMA_MEMORY_TO_PERIPH; |
k0050288 | 0:0ea9475fc06f | 63 | hdma_dac1.Init.PeriphInc = DMA_PINC_DISABLE; |
k0050288 | 0:0ea9475fc06f | 64 | hdma_dac1.Init.MemInc = DMA_MINC_ENABLE; |
k0050288 | 0:0ea9475fc06f | 65 | hdma_dac1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; |
k0050288 | 0:0ea9475fc06f | 66 | hdma_dac1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; |
k0050288 | 0:0ea9475fc06f | 67 | hdma_dac1.Init.Mode = DMA_NORMAL; |
k0050288 | 0:0ea9475fc06f | 68 | hdma_dac1.Init.Priority = DMA_PRIORITY_LOW; |
k0050288 | 0:0ea9475fc06f | 69 | hdma_dac1.Init.FIFOMode = DMA_FIFOMODE_DISABLE; |
k0050288 | 0:0ea9475fc06f | 70 | HAL_DMA_Init(&hdma_dac1); |
k0050288 | 0:0ea9475fc06f | 71 | |
k0050288 | 0:0ea9475fc06f | 72 | __HAL_LINKDMA(hdac,DMA_Handle1,hdma_dac1); |
k0050288 | 0:0ea9475fc06f | 73 | } |
k0050288 | 0:0ea9475fc06f | 74 | } |
k0050288 | 0:0ea9475fc06f | 75 | |
k0050288 | 0:0ea9475fc06f | 76 | /* DAC init function */ |
k0050288 | 0:0ea9475fc06f | 77 | void DMAC::MX_DAC_Init() |
k0050288 | 0:0ea9475fc06f | 78 | { |
k0050288 | 0:0ea9475fc06f | 79 | DAC_ChannelConfTypeDef sConfig; |
k0050288 | 0:0ea9475fc06f | 80 | |
k0050288 | 0:0ea9475fc06f | 81 | /* DAC Initialization */ |
k0050288 | 0:0ea9475fc06f | 82 | hdac.Instance = DAC; |
k0050288 | 0:0ea9475fc06f | 83 | HAL_DAC_Init(&hdac); |
k0050288 | 0:0ea9475fc06f | 84 | |
k0050288 | 0:0ea9475fc06f | 85 | /*DAC channel OUT1 config */ |
k0050288 | 0:0ea9475fc06f | 86 | sConfig.DAC_Trigger = DAC_TRIGGER_T6_TRGO; |
k0050288 | 0:0ea9475fc06f | 87 | sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE; |
k0050288 | 0:0ea9475fc06f | 88 | HAL_DAC_ConfigChannel(&hdac, &sConfig, DAC_CHANNEL_1); |
k0050288 | 0:0ea9475fc06f | 89 | } |
k0050288 | 0:0ea9475fc06f | 90 | |
k0050288 | 0:0ea9475fc06f | 91 | /* TIM6 init function */ |
k0050288 | 0:0ea9475fc06f | 92 | void DMAC::MX_TIM6_Init() |
k0050288 | 0:0ea9475fc06f | 93 | { |
k0050288 | 0:0ea9475fc06f | 94 | |
k0050288 | 0:0ea9475fc06f | 95 | TIM_MasterConfigTypeDef sMasterConfig; |
k0050288 | 0:0ea9475fc06f | 96 | |
k0050288 | 0:0ea9475fc06f | 97 | htim6.Instance = TIM6; |
k0050288 | 0:0ea9475fc06f | 98 | htim6.Init.Prescaler = 0; |
k0050288 | 0:0ea9475fc06f | 99 | htim6.Init.CounterMode = TIM_COUNTERMODE_UP; |
k0050288 | 0:0ea9475fc06f | 100 | htim6.Init.Period = 90 - 1; |
k0050288 | 0:0ea9475fc06f | 101 | HAL_TIM_Base_Init(&htim6); |
k0050288 | 0:0ea9475fc06f | 102 | |
k0050288 | 0:0ea9475fc06f | 103 | sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE; |
k0050288 | 0:0ea9475fc06f | 104 | sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; |
k0050288 | 0:0ea9475fc06f | 105 | HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig); |
k0050288 | 0:0ea9475fc06f | 106 | } |
k0050288 | 0:0ea9475fc06f | 107 | |
k0050288 | 0:0ea9475fc06f | 108 | /* Enable DMA controller clock */ |
k0050288 | 0:0ea9475fc06f | 109 | void DMAC::MX_DMA_Init() |
k0050288 | 0:0ea9475fc06f | 110 | { |
k0050288 | 0:0ea9475fc06f | 111 | /* DMA controller clock enable */ |
k0050288 | 0:0ea9475fc06f | 112 | __HAL_RCC_DMA1_CLK_ENABLE(); |
k0050288 | 0:0ea9475fc06f | 113 | |
k0050288 | 0:0ea9475fc06f | 114 | /* DMA interrupt init */ |
k0050288 | 0:0ea9475fc06f | 115 | /* DMA1_Stream5_IRQn interrupt configuration */ |
k0050288 | 0:0ea9475fc06f | 116 | HAL_NVIC_SetPriority(DMA1_Stream5_IRQn, 0, 0); |
k0050288 | 0:0ea9475fc06f | 117 | HAL_NVIC_EnableIRQ(DMA1_Stream5_IRQn); |
k0050288 | 0:0ea9475fc06f | 118 | |
k0050288 | 0:0ea9475fc06f | 119 | } |
k0050288 | 0:0ea9475fc06f | 120 |