I'm trying to use a DAC (Cirrus Logic CS4344) with I2S that requires a Master Clock input. As far as I understand the mbed (LPC1768) schematic, TX_MCLK is not available on any of the DIP headers. Do you think it's possible to simulate TX_MCLK by setting up an I2S receiver in master mode (with I2SRX_CLK set to the same frequency as required by TX_MCLK) beside the I2S transmitter and use I2SRX_CLK (DIP 30) as the master clock input on the DAC?

So the configuration would be as follows:

• mbed DIP 5 (I2STX_SDA) -> DAC SDIN (Serial Audio Data Input)
• mbed DIP 6 (I2STX_WS) -> DAC LRCK (Left Right Clock)
• mbed DIP 7 (I2STX_CLK) -> DAC SCLK (External Serial Clock Input)
• mbed DIP 30 (I2SRX_CLK) -> DAC MCLK (Master Clock)

Is there any other way to interface with an I2S DAC without an external master clock?

To answer myself, the configuration above works pretty well. It is possible to use RX_CLK as a master clock for I2S transmit. Sucessfully integrated CS4344 with mbed using I2S. It's great for HQ audio projects.