Hello, I have an oled that I talk to over SPI, it works really well, however, there's something that I can't seem to understand and I hope someone here could shed some light on the subject.
According to the driver data sheet "SDIN is shifted into an 8-bit shift register on every rising edge of SCLK" as far as I know when CPHA=0 MOSI data is shifted out on falling edge, so CPHA should be 1 right ? however when I try spi.format(8, 1) it doesn't work, and spi.format(8, 0) does !! any ideas ?
Also, I read that "CPOL determines whether the shift clock's idle state is low or high", what does that mean in English :D ?
Thanks.
Hello, I have an oled that I talk to over SPI, it works really well, however, there's something that I can't seem to understand and I hope someone here could shed some light on the subject.
According to the driver data sheet "SDIN is shifted into an 8-bit shift register on every rising edge of SCLK" as far as I know when CPHA=0 MOSI data is shifted out on falling edge, so CPHA should be 1 right ? however when I try spi.format(8, 1) it doesn't work, and spi.format(8, 0) does !! any ideas ?
Also, I read that "CPOL determines whether the shift clock's idle state is low or high", what does that mean in English :D ?
Thanks.