Hi,

I'm using Mbed and trying to use CAP2.0 events (rising and falling edges) to increment timer2, instead of the PCLK rising edge. I've connected an external signal to pin p30 (CAP2.0/p0.4). I've configured register CTCR according to user manual, but it still doesn't work. Am I missing anything?

It's rather hard to debug using Mbed so I'm reseting the counter every 108 usec (using PWM interrupt- which works perfectly) and sending the value timer2  TC register using serial comunication. the results are showing that the PCLK is still used to increment the TC.

here's my code, I also used CMSIS package functions:

//Config P0.4 and P0.5 as CAP2.0,CAP2.1
    PinCfg.Funcnum = 3;
    PinCfg.OpenDrain = 0;
    PinCfg.Pinmode = 0;
    PinCfg.Portnum = 0;
    PinCfg.Pinnum = 4;
    PINSEL_ConfigPin(&PinCfg);
    PinCfg.Pinnum = 5;
    PINSEL_ConfigPin(&PinCfg);
    //config timer2 for capture int counter mode
    CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM2, ENABLE); //enable timer 2 clk
    CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_TIMER2, CLKPWR_PCLKSEL_CCLK_DIV_1); //select PCLK=72MHz
 
    LPC_TIM2->TC =0;
    LPC_TIM2->PC =0;
    LPC_TIM2->PR =0;
    LPC_TIM2->CTCR = 0x3;//

    TIM_ResetCounter(LPC_TIM2);
    TIM_Cmd(LPC_TIM2,ENABLE);

Any ideas?

Anyone? I really need help with this. was anyone able to operate any of the timers in counter mode using mbed?

I found the problem and it's relevant to anyone trying to use counter mode:

The header file LPC17xx.h had a wrong definition of timer block registers in the past. The CTCR register (needed to switch into counter mode) was at a wrong address. It was caused by a line
      uint32_t RESERVED1[24];
instead of the correct version below.

/*------------- Timer (TIM) --------------------------------------------------*/
typedef struct
{
 __IO uint32_t IR;
 __IO uint32_t TCR;
 __IO uint32_t TC;
 __IO uint32_t PR;
 __IO uint32_t PC;
 __IO uint32_t MCR;
 __IO uint32_t MR0;
 __IO uint32_t MR1;
 __IO uint32_t MR2;
 __IO uint32_t MR3;
 __IO uint32_t CCR;
 __I  uint32_t CR0;
 __I  uint32_t CR1;
      uint32_t RESERVED0[2];
 __IO uint32_t EMR;
      uint32_t RESERVED1[12];
 __IO uint32_t CTCR;
} LPC_TIM_TypeDef;

Thanks for raising this, I've filed it as a bug.