Hi, I have a problem interfacing the SST25VF016B serial flash from Microchip.

Here is my code:

#include "mbed.h"

DigitalOut sr(p21);

SPI spi(p5,p6,p7);


int main() {

    wait(0.2);

    spi.format(8,0); 

    spi.frequency(10000000);
  
   // read JEDEC-ID
   sr=0;
   spi.write(0x9F); // read JEDEC ID
   printf("%x\n", spi.write(0));
   printf("%x\n", spi.write(0));
   printf("%x\n", spi.write(0));
   sr=1;

   // send WREN command
   sr=0;
   spi.write(0x06); //WREN 
   sr=1;

   // write first byte
   sr=0;
   spi.write(0x02); // write
   spi.write(0);// // 3 bytes for address, msb first
   spi.write(0);
   spi.write(0);
   spi.write('u');
   sr=1;

   // write second byte
   sr=0;
   spi.write(0x02);
   spi.write(0);
   spi.write(0);
   spi.write(1);
   spi.write('t');
   sr=1;
   
   // write third byte (string end marker)
   sr=0;
   spi.write(0x02);
   spi.write(0);
   spi.write(0);
   spi.write(2);
   spi.write(0);
   sr=1;

   // read first byte
   sr=0;
   spi.write(0x03);  // read command
   spi.write(0); // 3 byte address
   spi.write(0);
   spi.write(0);
   printf("%c\n", spi.write(0));
   sr=1;
    
   // read second byte
   sr=0;
   spi.write(0x03);
   spi.write(0);
   spi.write(0);
   spi.write(1);
   printf("%c\n", spi.write(0));
   sr=1;
}

The JEDEC ID will be read correctly (bf 25 41), but the other 2 bytes were not written nor read.

Do I have to do additional things before writing?

Here ist the datasheet: /media/uploads/emmibed/sst25vf016b_serialflash_spi.pdf

After each Byte-Write operation you have to wait at least 10 µs (max. value in datasheet) before the next write operation. That's because the flash needs time to be programed. Alternatively you can check the busy-flag or perform the other possibilities for End-of-write-detection (datasheet) after each write.

Best regards
Neni

If I remember correctly, 10 Mhz SPI means 10us delay. So this should be not the issue.

But I think I have written to unerased sectors, I have to check this...

No, one 8 bit data transfer with SPI at 10 MHz takes around 800 ns plus interframe delay (at phase = 0) of less than 500 ns, so let's take 1.5 µs per byte (worst case). Toggling digital out (sr) low and high takes combined less than 200 ns (less than 100 ns per digital out write). So it takes in this case around 7.7 µs (5 * 1.5 µs + 200 ns) for the whole one byte write command (worst case). The program operation is started when sr goes high again, so there is only 7.7 µs (or most probably even significantly less) between the start of program operation for one byte and the subsequent byte program request (sr goes high again).

Best regards
Neni

Is it sufficient to add a 7us delay after toggeling CE# high before starting the next cycle? I mean not to add a delay after every spi.write() command but after every write command of the chip (erase need more).

I think 7 µs delay between write requests should be fine. And yes, placing the delay just after CE# goes high is ok. You don't need to add it after each spi.write(). As far as i could see in the datasheet, you can do a one byte or one word (2 bytes) write request in one cycle. Chip or block erase need longer waits, that's true.

Best regards
Neni

Thanks a lot Neni!