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Hello,
I faced the problem described in the following discussion: https://community.st.com/thread/31361
SPI master transfer are wrong on the "receive" side : data is read with an offset. You should flush something before trying to transfer.
I am using the Nucleo L432KC board .
I have found how to correct that : In stm_spi_api.c you should add HAL_SPIEx_FlushRxFifo (handle); inside the spi_master_start_asynch_transfer function
Could you please make this modification (or a better one) in the official mbed library?
spi_master_start_asynch_transfer() inside stm_spi_api.c
regards,
F4HDK