Felipe Gomes / BSP_DISCO_F469NI

library

Dependents:   Aprendendo Final_v3

stm32469i_discovery/stm32469i_discovery_sdram.h@4:e746cdd3e76a, 2020-10-19 (annotated)

Committer:
zigdrix
Date:
Mon Oct 19 22:13:50 2020 +0000
Revision:
4:e746cdd3e76a
Parent:
0:0002c86c2220 
Projeto Final PI 1

Who changed what in which revision?

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bcostm 0:0002c86c2220 1 /**
bcostm 0:0002c86c2220 2 ******************************************************************************
bcostm 0:0002c86c2220 3 * @file stm32469i_discovery_sdram.h
bcostm 0:0002c86c2220 4 * @author MCD Application Team
bcostm 0:0002c86c2220 5 * @version V1.0.1
bcostm 0:0002c86c2220 6 * @date 29-September-2015
bcostm 0:0002c86c2220 7 * @brief This file contains the common defines and functions prototypes for
bcostm 0:0002c86c2220 8 * the stm32469i_discovery_sdram.c driver.
bcostm 0:0002c86c2220 9 ******************************************************************************
bcostm 0:0002c86c2220 10 * @attention
bcostm 0:0002c86c2220 11 *
bcostm 0:0002c86c2220 12 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bcostm 0:0002c86c2220 13 *
bcostm 0:0002c86c2220 14 * Redistribution and use in source and binary forms, with or without modification,
bcostm 0:0002c86c2220 15 * are permitted provided that the following conditions are met:
bcostm 0:0002c86c2220 16 * 1. Redistributions of source code must retain the above copyright notice,
bcostm 0:0002c86c2220 17 * this list of conditions and the following disclaimer.
bcostm 0:0002c86c2220 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
bcostm 0:0002c86c2220 19 * this list of conditions and the following disclaimer in the documentation
bcostm 0:0002c86c2220 20 * and/or other materials provided with the distribution.
bcostm 0:0002c86c2220 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bcostm 0:0002c86c2220 22 * may be used to endorse or promote products derived from this software
bcostm 0:0002c86c2220 23 * without specific prior written permission.
bcostm 0:0002c86c2220 24 *
bcostm 0:0002c86c2220 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bcostm 0:0002c86c2220 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bcostm 0:0002c86c2220 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bcostm 0:0002c86c2220 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bcostm 0:0002c86c2220 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bcostm 0:0002c86c2220 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bcostm 0:0002c86c2220 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bcostm 0:0002c86c2220 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bcostm 0:0002c86c2220 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bcostm 0:0002c86c2220 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bcostm 0:0002c86c2220 35 *
bcostm 0:0002c86c2220 36 ******************************************************************************
bcostm 0:0002c86c2220 37 */
bcostm 0:0002c86c2220 38
bcostm 0:0002c86c2220 39 /* Define to prevent recursive inclusion -------------------------------------*/
bcostm 0:0002c86c2220 40 #ifndef __STM32469I_DISCOVERY_SDRAM_H
bcostm 0:0002c86c2220 41 #define __STM32469I_DISCOVERY_SDRAM_H
bcostm 0:0002c86c2220 42
bcostm 0:0002c86c2220 43 #ifdef __cplusplus
bcostm 0:0002c86c2220 44 extern "C" {
bcostm 0:0002c86c2220 45 #endif
bcostm 0:0002c86c2220 46
bcostm 0:0002c86c2220 47 /* Includes ------------------------------------------------------------------*/
bcostm 0:0002c86c2220 48 #include "stm32f4xx_hal.h"
bcostm 0:0002c86c2220 49
bcostm 0:0002c86c2220 50 /** @addtogroup BSP
bcostm 0:0002c86c2220 51 * @{
bcostm 0:0002c86c2220 52 */
bcostm 0:0002c86c2220 53
bcostm 0:0002c86c2220 54 /** @addtogroup STM32469I-Discovery
bcostm 0:0002c86c2220 55 * @{
bcostm 0:0002c86c2220 56 */
bcostm 0:0002c86c2220 57
bcostm 0:0002c86c2220 58 /** @addtogroup STM32469I-Discovery_SDRAM
bcostm 0:0002c86c2220 59 * @{
bcostm 0:0002c86c2220 60 */
bcostm 0:0002c86c2220 61
bcostm 0:0002c86c2220 62 /** @defgroup STM32469I-Discovery_SDRAM_Exported_Types STM32469I Discovery SDRAM Exported Types
bcostm 0:0002c86c2220 63 * @{
bcostm 0:0002c86c2220 64 */
bcostm 0:0002c86c2220 65
bcostm 0:0002c86c2220 66 /**
bcostm 0:0002c86c2220 67 * @brief SDRAM status structure definition
bcostm 0:0002c86c2220 68 */
bcostm 0:0002c86c2220 69 #define SDRAM_OK ((uint8_t)0x00)
bcostm 0:0002c86c2220 70 #define SDRAM_ERROR ((uint8_t)0x01)
bcostm 0:0002c86c2220 71
bcostm 0:0002c86c2220 72 /** @defgroup STM32469I-Discovery_SDRAM_Exported_Constants STM32469I Discovery SDRAM Exported Constants
bcostm 0:0002c86c2220 73 * @{
bcostm 0:0002c86c2220 74 */
bcostm 0:0002c86c2220 75 #define SDRAM_DEVICE_ADDR ((uint32_t)0xC0000000)
bcostm 0:0002c86c2220 76
bcostm 0:0002c86c2220 77 /* SDRAM device size in MBytes */
bcostm 0:0002c86c2220 78 #define SDRAM_DEVICE_SIZE ((uint32_t)0x800000)
bcostm 0:0002c86c2220 79
bcostm 0:0002c86c2220 80 #define SDRAM_MEMORY_WIDTH FMC_SDRAM_MEM_BUS_WIDTH_32
bcostm 0:0002c86c2220 81 #define SDCLOCK_PERIOD FMC_SDRAM_CLOCK_PERIOD_2
bcostm 0:0002c86c2220 82
bcostm 0:0002c86c2220 83 /* SDRAM refresh counter (90 MHz SD clock) */
bcostm 0:0002c86c2220 84 #define REFRESH_COUNT ((uint32_t)0x0569)
bcostm 0:0002c86c2220 85 #define SDRAM_TIMEOUT ((uint32_t)0xFFFF)
bcostm 0:0002c86c2220 86
bcostm 0:0002c86c2220 87 /* DMA definitions for SDRAM DMA transfer */
bcostm 0:0002c86c2220 88 #define __DMAx_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE
bcostm 0:0002c86c2220 89 #define __DMAx_CLK_DISABLE __HAL_RCC_DMA2_CLK_DISABLE
bcostm 0:0002c86c2220 90 #define SDRAM_DMAx_CHANNEL DMA_CHANNEL_0
bcostm 0:0002c86c2220 91 #define SDRAM_DMAx_STREAM DMA2_Stream0
bcostm 0:0002c86c2220 92 #define SDRAM_DMAx_IRQn DMA2_Stream0_IRQn
bcostm 0:0002c86c2220 93 #define SDRAM_DMAx_IRQHandler DMA2_Stream0_IRQHandler
bcostm 0:0002c86c2220 94 /**
bcostm 0:0002c86c2220 95 * @}
bcostm 0:0002c86c2220 96 */
bcostm 0:0002c86c2220 97
bcostm 0:0002c86c2220 98 /**
bcostm 0:0002c86c2220 99 * @brief FMC SDRAM Mode definition register defines
bcostm 0:0002c86c2220 100 */
bcostm 0:0002c86c2220 101 #define SDRAM_MODEREG_BURST_LENGTH_1 ((uint16_t)0x0000)
bcostm 0:0002c86c2220 102 #define SDRAM_MODEREG_BURST_LENGTH_2 ((uint16_t)0x0001)
bcostm 0:0002c86c2220 103 #define SDRAM_MODEREG_BURST_LENGTH_4 ((uint16_t)0x0002)
bcostm 0:0002c86c2220 104 #define SDRAM_MODEREG_BURST_LENGTH_8 ((uint16_t)0x0004)
bcostm 0:0002c86c2220 105 #define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL ((uint16_t)0x0000)
bcostm 0:0002c86c2220 106 #define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED ((uint16_t)0x0008)
bcostm 0:0002c86c2220 107 #define SDRAM_MODEREG_CAS_LATENCY_2 ((uint16_t)0x0020)
bcostm 0:0002c86c2220 108 #define SDRAM_MODEREG_CAS_LATENCY_3 ((uint16_t)0x0030)
bcostm 0:0002c86c2220 109 #define SDRAM_MODEREG_OPERATING_MODE_STANDARD ((uint16_t)0x0000)
bcostm 0:0002c86c2220 110 #define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000)
bcostm 0:0002c86c2220 111 #define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE ((uint16_t)0x0200)
bcostm 0:0002c86c2220 112 /**
bcostm 0:0002c86c2220 113 * @}
bcostm 0:0002c86c2220 114 */
bcostm 0:0002c86c2220 115
bcostm 0:0002c86c2220 116 /** @defgroup STM32469I-Discovery_SDRAM_Exported_Macro STM32469I Discovery SDRAM Exported Macro
bcostm 0:0002c86c2220 117 * @{
bcostm 0:0002c86c2220 118 */
bcostm 0:0002c86c2220 119 /**
bcostm 0:0002c86c2220 120 * @}
bcostm 0:0002c86c2220 121 */
bcostm 0:0002c86c2220 122
bcostm 0:0002c86c2220 123 /** @defgroup STM32469I-Discovery_SDRAM_Exported_Functions STM32469I Discovery SDRAM Exported Functions
bcostm 0:0002c86c2220 124 * @{
bcostm 0:0002c86c2220 125 */
bcostm 0:0002c86c2220 126 uint8_t BSP_SDRAM_Init(void);
bcostm 0:0002c86c2220 127 uint8_t BSP_SDRAM_DeInit(void);
bcostm 0:0002c86c2220 128 void BSP_SDRAM_Initialization_sequence(uint32_t RefreshCount);
bcostm 0:0002c86c2220 129 uint8_t BSP_SDRAM_ReadData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize);
bcostm 0:0002c86c2220 130 uint8_t BSP_SDRAM_ReadData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize);
bcostm 0:0002c86c2220 131 uint8_t BSP_SDRAM_WriteData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize);
bcostm 0:0002c86c2220 132 uint8_t BSP_SDRAM_WriteData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize);
bcostm 0:0002c86c2220 133 uint8_t BSP_SDRAM_Sendcmd(FMC_SDRAM_CommandTypeDef *SdramCmd);
bcostm 0:0002c86c2220 134 void BSP_SDRAM_DMA_IRQHandler(void);
bcostm 0:0002c86c2220 135
bcostm 0:0002c86c2220 136 /* These function can be modified in case the current settings (e.g. DMA stream)
bcostm 0:0002c86c2220 137 need to be changed for specific application needs */
bcostm 0:0002c86c2220 138 void BSP_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram, void *Params);
bcostm 0:0002c86c2220 139 void BSP_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram, void *Params);
bcostm 0:0002c86c2220 140
bcostm 0:0002c86c2220 141 /**
bcostm 0:0002c86c2220 142 * @}
bcostm 0:0002c86c2220 143 */
bcostm 0:0002c86c2220 144
bcostm 0:0002c86c2220 145 /**
bcostm 0:0002c86c2220 146 * @}
bcostm 0:0002c86c2220 147 */
bcostm 0:0002c86c2220 148
bcostm 0:0002c86c2220 149 /**
bcostm 0:0002c86c2220 150 * @}
bcostm 0:0002c86c2220 151 */
bcostm 0:0002c86c2220 152
bcostm 0:0002c86c2220 153 /**
bcostm 0:0002c86c2220 154 * @}
bcostm 0:0002c86c2220 155 */
bcostm 0:0002c86c2220 156
bcostm 0:0002c86c2220 157 #ifdef __cplusplus
bcostm 0:0002c86c2220 158 }
bcostm 0:0002c86c2220 159 #endif
bcostm 0:0002c86c2220 160
bcostm 0:0002c86c2220 161 #endif /* __STM32469I_DISCOVERY_SDRAM_H */
bcostm 0:0002c86c2220 162
bcostm 0:0002c86c2220 163 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/