雄介 太田 / mbed

mbed(SerialHalfDuplex入り)

Fork of mbed by mbed official

TARGET_ARCH_MAX/stm32f4xx_hal_sram.h@89:552587b429a1, 2014-09-12 (annotated)

Committer:
bogdanm
Date:
Fri Sep 12 16:41:52 2014 +0100
Revision:
89:552587b429a1
Child:
92:4fc01daae5a5
Release 89 of the mbed library



Main changes:



- low power optimizations for Nordic targets

- code structure changes for Freescale K64F targets

- bug fixes in various backends

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 89:552587b429a1 1 /**
bogdanm 89:552587b429a1 2 ******************************************************************************
bogdanm 89:552587b429a1 3 * @file stm32f4xx_hal_sram.h
bogdanm 89:552587b429a1 4 * @author MCD Application Team
bogdanm 89:552587b429a1 5 * @version V1.1.0RC2
bogdanm 89:552587b429a1 6 * @date 14-May-2014
bogdanm 89:552587b429a1 7 * @brief Header file of SRAM HAL module.
bogdanm 89:552587b429a1 8 ******************************************************************************
bogdanm 89:552587b429a1 9 * @attention
bogdanm 89:552587b429a1 10 *
bogdanm 89:552587b429a1 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 89:552587b429a1 12 *
bogdanm 89:552587b429a1 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 89:552587b429a1 14 * are permitted provided that the following conditions are met:
bogdanm 89:552587b429a1 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 89:552587b429a1 16 * this list of conditions and the following disclaimer.
bogdanm 89:552587b429a1 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 89:552587b429a1 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 89:552587b429a1 19 * and/or other materials provided with the distribution.
bogdanm 89:552587b429a1 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 89:552587b429a1 21 * may be used to endorse or promote products derived from this software
bogdanm 89:552587b429a1 22 * without specific prior written permission.
bogdanm 89:552587b429a1 23 *
bogdanm 89:552587b429a1 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 89:552587b429a1 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 89:552587b429a1 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 89:552587b429a1 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 89:552587b429a1 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 89:552587b429a1 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 89:552587b429a1 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 89:552587b429a1 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 89:552587b429a1 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 89:552587b429a1 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 89:552587b429a1 34 *
bogdanm 89:552587b429a1 35 ******************************************************************************
bogdanm 89:552587b429a1 36 */
bogdanm 89:552587b429a1 37
bogdanm 89:552587b429a1 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 89:552587b429a1 39 #ifndef __STM32F4xx_HAL_SRAM_H
bogdanm 89:552587b429a1 40 #define __STM32F4xx_HAL_SRAM_H
bogdanm 89:552587b429a1 41
bogdanm 89:552587b429a1 42 #ifdef __cplusplus
bogdanm 89:552587b429a1 43 extern "C" {
bogdanm 89:552587b429a1 44 #endif
bogdanm 89:552587b429a1 45
bogdanm 89:552587b429a1 46 /* Includes ------------------------------------------------------------------*/
bogdanm 89:552587b429a1 47 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
bogdanm 89:552587b429a1 48 #include "stm32f4xx_ll_fsmc.h"
bogdanm 89:552587b429a1 49 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
bogdanm 89:552587b429a1 50
bogdanm 89:552587b429a1 51 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
bogdanm 89:552587b429a1 52 #include "stm32f4xx_ll_fmc.h"
bogdanm 89:552587b429a1 53 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
bogdanm 89:552587b429a1 54
bogdanm 89:552587b429a1 55
bogdanm 89:552587b429a1 56 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 89:552587b429a1 57 * @{
bogdanm 89:552587b429a1 58 */
bogdanm 89:552587b429a1 59
bogdanm 89:552587b429a1 60 /** @addtogroup SRAM
bogdanm 89:552587b429a1 61 * @{
bogdanm 89:552587b429a1 62 */
bogdanm 89:552587b429a1 63
bogdanm 89:552587b429a1 64 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
bogdanm 89:552587b429a1 65
bogdanm 89:552587b429a1 66 /* Exported typedef ----------------------------------------------------------*/
bogdanm 89:552587b429a1 67
bogdanm 89:552587b429a1 68 /**
bogdanm 89:552587b429a1 69 * @brief HAL SRAM State structures definition
bogdanm 89:552587b429a1 70 */
bogdanm 89:552587b429a1 71 typedef enum
bogdanm 89:552587b429a1 72 {
bogdanm 89:552587b429a1 73 HAL_SRAM_STATE_RESET = 0x00, /*!< SRAM not yet initialized or disabled */
bogdanm 89:552587b429a1 74 HAL_SRAM_STATE_READY = 0x01, /*!< SRAM initialized and ready for use */
bogdanm 89:552587b429a1 75 HAL_SRAM_STATE_BUSY = 0x02, /*!< SRAM internal process is ongoing */
bogdanm 89:552587b429a1 76 HAL_SRAM_STATE_ERROR = 0x03, /*!< SRAM error state */
bogdanm 89:552587b429a1 77 HAL_SRAM_STATE_PROTECTED = 0x04 /*!< SRAM peripheral NORSRAM device write protected */
bogdanm 89:552587b429a1 78
bogdanm 89:552587b429a1 79 }HAL_SRAM_StateTypeDef;
bogdanm 89:552587b429a1 80
bogdanm 89:552587b429a1 81 /**
bogdanm 89:552587b429a1 82 * @brief SRAM handle Structure definition
bogdanm 89:552587b429a1 83 */
bogdanm 89:552587b429a1 84 typedef struct
bogdanm 89:552587b429a1 85 {
bogdanm 89:552587b429a1 86 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
bogdanm 89:552587b429a1 87
bogdanm 89:552587b429a1 88 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
bogdanm 89:552587b429a1 89
bogdanm 89:552587b429a1 90 FMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */
bogdanm 89:552587b429a1 91
bogdanm 89:552587b429a1 92 HAL_LockTypeDef Lock; /*!< SRAM locking object */
bogdanm 89:552587b429a1 93
bogdanm 89:552587b429a1 94 __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */
bogdanm 89:552587b429a1 95
bogdanm 89:552587b429a1 96 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
bogdanm 89:552587b429a1 97
bogdanm 89:552587b429a1 98 }SRAM_HandleTypeDef;
bogdanm 89:552587b429a1 99
bogdanm 89:552587b429a1 100 /* Exported constants --------------------------------------------------------*/
bogdanm 89:552587b429a1 101 /* Exported macro ------------------------------------------------------------*/
bogdanm 89:552587b429a1 102
bogdanm 89:552587b429a1 103 /** @brief Reset SRAM handle state
bogdanm 89:552587b429a1 104 * @param __HANDLE__: SRAM handle
bogdanm 89:552587b429a1 105 * @retval None
bogdanm 89:552587b429a1 106 */
bogdanm 89:552587b429a1 107 #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
bogdanm 89:552587b429a1 108
bogdanm 89:552587b429a1 109 /* Exported functions --------------------------------------------------------*/
bogdanm 89:552587b429a1 110
bogdanm 89:552587b429a1 111 /* Initialization/de-initialization functions **********************************/
bogdanm 89:552587b429a1 112 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
bogdanm 89:552587b429a1 113 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
bogdanm 89:552587b429a1 114 void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
bogdanm 89:552587b429a1 115 void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
bogdanm 89:552587b429a1 116
bogdanm 89:552587b429a1 117 /* I/O operation functions *****************************************************/
bogdanm 89:552587b429a1 118 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
bogdanm 89:552587b429a1 119 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
bogdanm 89:552587b429a1 120 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
bogdanm 89:552587b429a1 121 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
bogdanm 89:552587b429a1 122 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
bogdanm 89:552587b429a1 123 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
bogdanm 89:552587b429a1 124 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
bogdanm 89:552587b429a1 125 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
bogdanm 89:552587b429a1 126
bogdanm 89:552587b429a1 127 void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
bogdanm 89:552587b429a1 128 void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
bogdanm 89:552587b429a1 129
bogdanm 89:552587b429a1 130 /* SRAM Control functions ******************************************************/
bogdanm 89:552587b429a1 131 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
bogdanm 89:552587b429a1 132 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
bogdanm 89:552587b429a1 133
bogdanm 89:552587b429a1 134 /* SRAM State functions *********************************************************/
bogdanm 89:552587b429a1 135 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
bogdanm 89:552587b429a1 136
bogdanm 89:552587b429a1 137 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
bogdanm 89:552587b429a1 138 /**
bogdanm 89:552587b429a1 139 * @}
bogdanm 89:552587b429a1 140 */
bogdanm 89:552587b429a1 141
bogdanm 89:552587b429a1 142 /**
bogdanm 89:552587b429a1 143 * @}
bogdanm 89:552587b429a1 144 */
bogdanm 89:552587b429a1 145
bogdanm 89:552587b429a1 146 #ifdef __cplusplus
bogdanm 89:552587b429a1 147 }
bogdanm 89:552587b429a1 148 #endif
bogdanm 89:552587b429a1 149
bogdanm 89:552587b429a1 150 #endif /* __STM32F4xx_HAL_SRAM_H */
bogdanm 89:552587b429a1 151
bogdanm 89:552587b429a1 152 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/