雄介 太田
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TARGET_NUCLEO_F103RB/stm32f1xx_hal_spi.h@98:01a414ca7d6d, 2015-04-08 (annotated)
- Committer:
- yusuke_kyo
- Date:
- Wed Apr 08 08:04:18 2015 +0000
- Revision:
- 98:01a414ca7d6d
- Parent:
- 96:487b796308b0
remove SerialHalfDuplex.h
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Kojto | 96:487b796308b0 | 1 | /** |
| Kojto | 96:487b796308b0 | 2 | ****************************************************************************** |
| Kojto | 96:487b796308b0 | 3 | * @file stm32f1xx_hal_spi.h |
| Kojto | 96:487b796308b0 | 4 | * @author MCD Application Team |
| Kojto | 96:487b796308b0 | 5 | * @version V1.0.0 |
| Kojto | 96:487b796308b0 | 6 | * @date 15-December-2014 |
| Kojto | 96:487b796308b0 | 7 | * @brief Header file of SPI HAL module. |
| Kojto | 96:487b796308b0 | 8 | ****************************************************************************** |
| Kojto | 96:487b796308b0 | 9 | * @attention |
| Kojto | 96:487b796308b0 | 10 | * |
| Kojto | 96:487b796308b0 | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| Kojto | 96:487b796308b0 | 12 | * |
| Kojto | 96:487b796308b0 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| Kojto | 96:487b796308b0 | 14 | * are permitted provided that the following conditions are met: |
| Kojto | 96:487b796308b0 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| Kojto | 96:487b796308b0 | 16 | * this list of conditions and the following disclaimer. |
| Kojto | 96:487b796308b0 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| Kojto | 96:487b796308b0 | 18 | * this list of conditions and the following disclaimer in the documentation |
| Kojto | 96:487b796308b0 | 19 | * and/or other materials provided with the distribution. |
| Kojto | 96:487b796308b0 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| Kojto | 96:487b796308b0 | 21 | * may be used to endorse or promote products derived from this software |
| Kojto | 96:487b796308b0 | 22 | * without specific prior written permission. |
| Kojto | 96:487b796308b0 | 23 | * |
| Kojto | 96:487b796308b0 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| Kojto | 96:487b796308b0 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| Kojto | 96:487b796308b0 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| Kojto | 96:487b796308b0 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| Kojto | 96:487b796308b0 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| Kojto | 96:487b796308b0 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| Kojto | 96:487b796308b0 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| Kojto | 96:487b796308b0 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| Kojto | 96:487b796308b0 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| Kojto | 96:487b796308b0 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| Kojto | 96:487b796308b0 | 34 | * |
| Kojto | 96:487b796308b0 | 35 | ****************************************************************************** |
| Kojto | 96:487b796308b0 | 36 | */ |
| Kojto | 96:487b796308b0 | 37 | |
| Kojto | 96:487b796308b0 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| Kojto | 96:487b796308b0 | 39 | #ifndef __STM32F1xx_HAL_SPI_H |
| Kojto | 96:487b796308b0 | 40 | #define __STM32F1xx_HAL_SPI_H |
| Kojto | 96:487b796308b0 | 41 | |
| Kojto | 96:487b796308b0 | 42 | #ifdef __cplusplus |
| Kojto | 96:487b796308b0 | 43 | extern "C" { |
| Kojto | 96:487b796308b0 | 44 | #endif |
| Kojto | 96:487b796308b0 | 45 | |
| Kojto | 96:487b796308b0 | 46 | /* Includes ------------------------------------------------------------------*/ |
| Kojto | 96:487b796308b0 | 47 | #include "stm32f1xx_hal_def.h" |
| Kojto | 96:487b796308b0 | 48 | |
| Kojto | 96:487b796308b0 | 49 | /** @addtogroup STM32F1xx_HAL_Driver |
| Kojto | 96:487b796308b0 | 50 | * @{ |
| Kojto | 96:487b796308b0 | 51 | */ |
| Kojto | 96:487b796308b0 | 52 | |
| Kojto | 96:487b796308b0 | 53 | /** @addtogroup SPI |
| Kojto | 96:487b796308b0 | 54 | * @{ |
| Kojto | 96:487b796308b0 | 55 | */ |
| Kojto | 96:487b796308b0 | 56 | |
| Kojto | 96:487b796308b0 | 57 | /* Exported types ------------------------------------------------------------*/ |
| Kojto | 96:487b796308b0 | 58 | /** @defgroup SPI_Exported_Types SPI Exported Types |
| Kojto | 96:487b796308b0 | 59 | * @{ |
| Kojto | 96:487b796308b0 | 60 | */ |
| Kojto | 96:487b796308b0 | 61 | |
| Kojto | 96:487b796308b0 | 62 | /** |
| Kojto | 96:487b796308b0 | 63 | * @brief SPI Configuration Structure definition |
| Kojto | 96:487b796308b0 | 64 | */ |
| Kojto | 96:487b796308b0 | 65 | typedef struct |
| Kojto | 96:487b796308b0 | 66 | { |
| Kojto | 96:487b796308b0 | 67 | uint32_t Mode; /*!< Specifies the SPI operating mode. |
| Kojto | 96:487b796308b0 | 68 | This parameter can be a value of @ref SPI_mode */ |
| Kojto | 96:487b796308b0 | 69 | |
| Kojto | 96:487b796308b0 | 70 | uint32_t Direction; /*!< Specifies the SPI Directional mode state. |
| Kojto | 96:487b796308b0 | 71 | This parameter can be a value of @ref SPI_Direction_mode */ |
| Kojto | 96:487b796308b0 | 72 | |
| Kojto | 96:487b796308b0 | 73 | uint32_t DataSize; /*!< Specifies the SPI data size. |
| Kojto | 96:487b796308b0 | 74 | This parameter can be a value of @ref SPI_data_size */ |
| Kojto | 96:487b796308b0 | 75 | |
| Kojto | 96:487b796308b0 | 76 | uint32_t CLKPolarity; /*!< Specifies the serial clock steady state. |
| Kojto | 96:487b796308b0 | 77 | This parameter can be a value of @ref SPI_Clock_Polarity */ |
| Kojto | 96:487b796308b0 | 78 | |
| Kojto | 96:487b796308b0 | 79 | uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture. |
| Kojto | 96:487b796308b0 | 80 | This parameter can be a value of @ref SPI_Clock_Phase */ |
| Kojto | 96:487b796308b0 | 81 | |
| Kojto | 96:487b796308b0 | 82 | uint32_t NSS; /*!< Specifies whether the NSS signal is managed by |
| Kojto | 96:487b796308b0 | 83 | hardware (NSS pin) or by software using the SSI bit. |
| Kojto | 96:487b796308b0 | 84 | This parameter can be a value of @ref SPI_Slave_Select_management */ |
| Kojto | 96:487b796308b0 | 85 | |
| Kojto | 96:487b796308b0 | 86 | uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be |
| Kojto | 96:487b796308b0 | 87 | used to configure the transmit and receive SCK clock. |
| Kojto | 96:487b796308b0 | 88 | This parameter can be a value of @ref SPI_BaudRate_Prescaler |
| Kojto | 96:487b796308b0 | 89 | @note The communication clock is derived from the master |
| Kojto | 96:487b796308b0 | 90 | clock. The slave clock does not need to be set */ |
| Kojto | 96:487b796308b0 | 91 | |
| Kojto | 96:487b796308b0 | 92 | uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. |
| Kojto | 96:487b796308b0 | 93 | This parameter can be a value of @ref SPI_MSB_LSB_transmission */ |
| Kojto | 96:487b796308b0 | 94 | |
| Kojto | 96:487b796308b0 | 95 | uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not. |
| Kojto | 96:487b796308b0 | 96 | This parameter can be a value of @ref SPI_TI_mode */ |
| Kojto | 96:487b796308b0 | 97 | |
| Kojto | 96:487b796308b0 | 98 | uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. |
| Kojto | 96:487b796308b0 | 99 | This parameter can be a value of @ref SPI_CRC_Calculation */ |
| Kojto | 96:487b796308b0 | 100 | |
| Kojto | 96:487b796308b0 | 101 | uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. |
| Kojto | 96:487b796308b0 | 102 | This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */ |
| Kojto | 96:487b796308b0 | 103 | |
| Kojto | 96:487b796308b0 | 104 | }SPI_InitTypeDef; |
| Kojto | 96:487b796308b0 | 105 | |
| Kojto | 96:487b796308b0 | 106 | /** |
| Kojto | 96:487b796308b0 | 107 | * @brief HAL SPI State structure definition |
| Kojto | 96:487b796308b0 | 108 | */ |
| Kojto | 96:487b796308b0 | 109 | typedef enum |
| Kojto | 96:487b796308b0 | 110 | { |
| Kojto | 96:487b796308b0 | 111 | HAL_SPI_STATE_RESET = 0x00, /*!< SPI not yet initialized or disabled */ |
| Kojto | 96:487b796308b0 | 112 | HAL_SPI_STATE_READY = 0x01, /*!< SPI initialized and ready for use */ |
| Kojto | 96:487b796308b0 | 113 | HAL_SPI_STATE_BUSY = 0x02, /*!< SPI process is ongoing */ |
| Kojto | 96:487b796308b0 | 114 | HAL_SPI_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */ |
| Kojto | 96:487b796308b0 | 115 | HAL_SPI_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */ |
| Kojto | 96:487b796308b0 | 116 | HAL_SPI_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */ |
| Kojto | 96:487b796308b0 | 117 | HAL_SPI_STATE_ERROR = 0x03 /*!< SPI error state */ |
| Kojto | 96:487b796308b0 | 118 | |
| Kojto | 96:487b796308b0 | 119 | }HAL_SPI_StateTypeDef; |
| Kojto | 96:487b796308b0 | 120 | |
| Kojto | 96:487b796308b0 | 121 | |
| Kojto | 96:487b796308b0 | 122 | /** |
| Kojto | 96:487b796308b0 | 123 | * @brief SPI handle Structure definition |
| Kojto | 96:487b796308b0 | 124 | */ |
| Kojto | 96:487b796308b0 | 125 | typedef struct __SPI_HandleTypeDef |
| Kojto | 96:487b796308b0 | 126 | { |
| Kojto | 96:487b796308b0 | 127 | SPI_TypeDef *Instance; /*!< SPI registers base address */ |
| Kojto | 96:487b796308b0 | 128 | |
| Kojto | 96:487b796308b0 | 129 | SPI_InitTypeDef Init; /*!< SPI communication parameters */ |
| Kojto | 96:487b796308b0 | 130 | |
| Kojto | 96:487b796308b0 | 131 | uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */ |
| Kojto | 96:487b796308b0 | 132 | |
| Kojto | 96:487b796308b0 | 133 | uint16_t TxXferSize; /*!< SPI Tx transfer size */ |
| Kojto | 96:487b796308b0 | 134 | |
| Kojto | 96:487b796308b0 | 135 | uint16_t TxXferCount; /*!< SPI Tx Transfer Counter */ |
| Kojto | 96:487b796308b0 | 136 | |
| Kojto | 96:487b796308b0 | 137 | uint8_t *pRxBuffPtr; /*!< Pointer to SPI Rx transfer Buffer */ |
| Kojto | 96:487b796308b0 | 138 | |
| Kojto | 96:487b796308b0 | 139 | uint16_t RxXferSize; /*!< SPI Rx transfer size */ |
| Kojto | 96:487b796308b0 | 140 | |
| Kojto | 96:487b796308b0 | 141 | uint16_t RxXferCount; /*!< SPI Rx Transfer Counter */ |
| Kojto | 96:487b796308b0 | 142 | |
| Kojto | 96:487b796308b0 | 143 | DMA_HandleTypeDef *hdmatx; /*!< SPI Tx DMA handle parameters */ |
| Kojto | 96:487b796308b0 | 144 | |
| Kojto | 96:487b796308b0 | 145 | DMA_HandleTypeDef *hdmarx; /*!< SPI Rx DMA handle parameters */ |
| Kojto | 96:487b796308b0 | 146 | |
| Kojto | 96:487b796308b0 | 147 | void (*RxISR)(struct __SPI_HandleTypeDef * hspi); /*!< function pointer on Rx ISR */ |
| Kojto | 96:487b796308b0 | 148 | |
| Kojto | 96:487b796308b0 | 149 | void (*TxISR)(struct __SPI_HandleTypeDef * hspi); /*!< function pointer on Tx ISR */ |
| Kojto | 96:487b796308b0 | 150 | |
| Kojto | 96:487b796308b0 | 151 | HAL_LockTypeDef Lock; /*!< SPI locking object */ |
| Kojto | 96:487b796308b0 | 152 | |
| Kojto | 96:487b796308b0 | 153 | __IO HAL_SPI_StateTypeDef State; /*!< SPI communication state */ |
| Kojto | 96:487b796308b0 | 154 | |
| Kojto | 96:487b796308b0 | 155 | __IO uint32_t ErrorCode; /*!< SPI Error code */ |
| Kojto | 96:487b796308b0 | 156 | |
| Kojto | 96:487b796308b0 | 157 | }SPI_HandleTypeDef; |
| Kojto | 96:487b796308b0 | 158 | /** |
| Kojto | 96:487b796308b0 | 159 | * @} |
| Kojto | 96:487b796308b0 | 160 | */ |
| Kojto | 96:487b796308b0 | 161 | |
| Kojto | 96:487b796308b0 | 162 | |
| Kojto | 96:487b796308b0 | 163 | /* Exported constants --------------------------------------------------------*/ |
| Kojto | 96:487b796308b0 | 164 | |
| Kojto | 96:487b796308b0 | 165 | /** @defgroup SPI_Exported_Constants SPI Exported Constants |
| Kojto | 96:487b796308b0 | 166 | * @{ |
| Kojto | 96:487b796308b0 | 167 | */ |
| Kojto | 96:487b796308b0 | 168 | |
| Kojto | 96:487b796308b0 | 169 | /** @defgroup SPI_Error_Codes SPI Error Codes |
| Kojto | 96:487b796308b0 | 170 | * @{ |
| Kojto | 96:487b796308b0 | 171 | */ |
| Kojto | 96:487b796308b0 | 172 | #define HAL_SPI_ERROR_NONE ((uint32_t)0x00) /*!< No error */ |
| Kojto | 96:487b796308b0 | 173 | #define HAL_SPI_ERROR_MODF ((uint32_t)0x01) /*!< MODF error */ |
| Kojto | 96:487b796308b0 | 174 | #define HAL_SPI_ERROR_CRC ((uint32_t)0x02) /*!< CRC error */ |
| Kojto | 96:487b796308b0 | 175 | #define HAL_SPI_ERROR_OVR ((uint32_t)0x04) /*!< OVR error */ |
| Kojto | 96:487b796308b0 | 176 | #define HAL_SPI_ERROR_DMA ((uint32_t)0x08) /*!< DMA transfer error */ |
| Kojto | 96:487b796308b0 | 177 | #define HAL_SPI_ERROR_FLAG ((uint32_t)0x10) /*!< Flag: RXNE,TXE, BSY */ |
| Kojto | 96:487b796308b0 | 178 | /** |
| Kojto | 96:487b796308b0 | 179 | * @} |
| Kojto | 96:487b796308b0 | 180 | */ |
| Kojto | 96:487b796308b0 | 181 | |
| Kojto | 96:487b796308b0 | 182 | |
| Kojto | 96:487b796308b0 | 183 | |
| Kojto | 96:487b796308b0 | 184 | |
| Kojto | 96:487b796308b0 | 185 | /** @defgroup SPI_mode SPI mode |
| Kojto | 96:487b796308b0 | 186 | * @{ |
| Kojto | 96:487b796308b0 | 187 | */ |
| Kojto | 96:487b796308b0 | 188 | #define SPI_MODE_SLAVE ((uint32_t)0x00000000) |
| Kojto | 96:487b796308b0 | 189 | #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) |
| Kojto | 96:487b796308b0 | 190 | |
| Kojto | 96:487b796308b0 | 191 | /** |
| Kojto | 96:487b796308b0 | 192 | * @} |
| Kojto | 96:487b796308b0 | 193 | */ |
| Kojto | 96:487b796308b0 | 194 | |
| Kojto | 96:487b796308b0 | 195 | /** @defgroup SPI_Direction_mode SPI Direction mode |
| Kojto | 96:487b796308b0 | 196 | * @{ |
| Kojto | 96:487b796308b0 | 197 | */ |
| Kojto | 96:487b796308b0 | 198 | #define SPI_DIRECTION_2LINES ((uint32_t)0x00000000) |
| Kojto | 96:487b796308b0 | 199 | #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY |
| Kojto | 96:487b796308b0 | 200 | #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE |
| Kojto | 96:487b796308b0 | 201 | |
| Kojto | 96:487b796308b0 | 202 | /** |
| Kojto | 96:487b796308b0 | 203 | * @} |
| Kojto | 96:487b796308b0 | 204 | */ |
| Kojto | 96:487b796308b0 | 205 | |
| Kojto | 96:487b796308b0 | 206 | /** @defgroup SPI_data_size SPI data size |
| Kojto | 96:487b796308b0 | 207 | * @{ |
| Kojto | 96:487b796308b0 | 208 | */ |
| Kojto | 96:487b796308b0 | 209 | #define SPI_DATASIZE_8BIT ((uint32_t)0x00000000) |
| Kojto | 96:487b796308b0 | 210 | #define SPI_DATASIZE_16BIT SPI_CR1_DFF |
| Kojto | 96:487b796308b0 | 211 | |
| Kojto | 96:487b796308b0 | 212 | /** |
| Kojto | 96:487b796308b0 | 213 | * @} |
| Kojto | 96:487b796308b0 | 214 | */ |
| Kojto | 96:487b796308b0 | 215 | |
| Kojto | 96:487b796308b0 | 216 | /** @defgroup SPI_Clock_Polarity SPI Clock Polarity |
| Kojto | 96:487b796308b0 | 217 | * @{ |
| Kojto | 96:487b796308b0 | 218 | */ |
| Kojto | 96:487b796308b0 | 219 | #define SPI_POLARITY_LOW ((uint32_t)0x00000000) |
| Kojto | 96:487b796308b0 | 220 | #define SPI_POLARITY_HIGH SPI_CR1_CPOL |
| Kojto | 96:487b796308b0 | 221 | |
| Kojto | 96:487b796308b0 | 222 | /** |
| Kojto | 96:487b796308b0 | 223 | * @} |
| Kojto | 96:487b796308b0 | 224 | */ |
| Kojto | 96:487b796308b0 | 225 | |
| Kojto | 96:487b796308b0 | 226 | /** @defgroup SPI_Clock_Phase SPI Clock Phase |
| Kojto | 96:487b796308b0 | 227 | * @{ |
| Kojto | 96:487b796308b0 | 228 | */ |
| Kojto | 96:487b796308b0 | 229 | #define SPI_PHASE_1EDGE ((uint32_t)0x00000000) |
| Kojto | 96:487b796308b0 | 230 | #define SPI_PHASE_2EDGE SPI_CR1_CPHA |
| Kojto | 96:487b796308b0 | 231 | |
| Kojto | 96:487b796308b0 | 232 | /** |
| Kojto | 96:487b796308b0 | 233 | * @} |
| Kojto | 96:487b796308b0 | 234 | */ |
| Kojto | 96:487b796308b0 | 235 | |
| Kojto | 96:487b796308b0 | 236 | /** @defgroup SPI_Slave_Select_management SPI Slave Select management |
| Kojto | 96:487b796308b0 | 237 | * @{ |
| Kojto | 96:487b796308b0 | 238 | */ |
| Kojto | 96:487b796308b0 | 239 | #define SPI_NSS_SOFT SPI_CR1_SSM |
| Kojto | 96:487b796308b0 | 240 | #define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000) |
| Kojto | 96:487b796308b0 | 241 | #define SPI_NSS_HARD_OUTPUT ((uint32_t)(SPI_CR2_SSOE << 16)) |
| Kojto | 96:487b796308b0 | 242 | |
| Kojto | 96:487b796308b0 | 243 | /** |
| Kojto | 96:487b796308b0 | 244 | * @} |
| Kojto | 96:487b796308b0 | 245 | */ |
| Kojto | 96:487b796308b0 | 246 | |
| Kojto | 96:487b796308b0 | 247 | /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler |
| Kojto | 96:487b796308b0 | 248 | * @{ |
| Kojto | 96:487b796308b0 | 249 | */ |
| Kojto | 96:487b796308b0 | 250 | #define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000) |
| Kojto | 96:487b796308b0 | 251 | #define SPI_BAUDRATEPRESCALER_4 ((uint32_t)SPI_CR1_BR_0) |
| Kojto | 96:487b796308b0 | 252 | #define SPI_BAUDRATEPRESCALER_8 ((uint32_t)SPI_CR1_BR_1) |
| Kojto | 96:487b796308b0 | 253 | #define SPI_BAUDRATEPRESCALER_16 ((uint32_t)SPI_CR1_BR_1 | SPI_CR1_BR_0) |
| Kojto | 96:487b796308b0 | 254 | #define SPI_BAUDRATEPRESCALER_32 ((uint32_t)SPI_CR1_BR_2) |
| Kojto | 96:487b796308b0 | 255 | #define SPI_BAUDRATEPRESCALER_64 ((uint32_t)SPI_CR1_BR_2 | SPI_CR1_BR_0) |
| Kojto | 96:487b796308b0 | 256 | #define SPI_BAUDRATEPRESCALER_128 ((uint32_t)SPI_CR1_BR_2 | SPI_CR1_BR_1) |
| Kojto | 96:487b796308b0 | 257 | #define SPI_BAUDRATEPRESCALER_256 ((uint32_t)SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) |
| Kojto | 96:487b796308b0 | 258 | |
| Kojto | 96:487b796308b0 | 259 | /** |
| Kojto | 96:487b796308b0 | 260 | * @} |
| Kojto | 96:487b796308b0 | 261 | */ |
| Kojto | 96:487b796308b0 | 262 | |
| Kojto | 96:487b796308b0 | 263 | /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB transmission |
| Kojto | 96:487b796308b0 | 264 | * @{ |
| Kojto | 96:487b796308b0 | 265 | */ |
| Kojto | 96:487b796308b0 | 266 | #define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000) |
| Kojto | 96:487b796308b0 | 267 | #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST |
| Kojto | 96:487b796308b0 | 268 | |
| Kojto | 96:487b796308b0 | 269 | /** |
| Kojto | 96:487b796308b0 | 270 | * @} |
| Kojto | 96:487b796308b0 | 271 | */ |
| Kojto | 96:487b796308b0 | 272 | |
| Kojto | 96:487b796308b0 | 273 | /** @defgroup SPI_TI_mode SPI TI mode disable |
| Kojto | 96:487b796308b0 | 274 | * @brief SPI TI Mode not supported for STM32F1xx family |
| Kojto | 96:487b796308b0 | 275 | * @{ |
| Kojto | 96:487b796308b0 | 276 | */ |
| Kojto | 96:487b796308b0 | 277 | #define SPI_TIMODE_DISABLE ((uint32_t)0x00000000) |
| Kojto | 96:487b796308b0 | 278 | |
| Kojto | 96:487b796308b0 | 279 | /** |
| Kojto | 96:487b796308b0 | 280 | * @} |
| Kojto | 96:487b796308b0 | 281 | */ |
| Kojto | 96:487b796308b0 | 282 | |
| Kojto | 96:487b796308b0 | 283 | /** @defgroup SPI_CRC_Calculation SPI CRC Calculation |
| Kojto | 96:487b796308b0 | 284 | * @{ |
| Kojto | 96:487b796308b0 | 285 | */ |
| Kojto | 96:487b796308b0 | 286 | #define SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000) |
| Kojto | 96:487b796308b0 | 287 | #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN |
| Kojto | 96:487b796308b0 | 288 | |
| Kojto | 96:487b796308b0 | 289 | /** |
| Kojto | 96:487b796308b0 | 290 | * @} |
| Kojto | 96:487b796308b0 | 291 | */ |
| Kojto | 96:487b796308b0 | 292 | |
| Kojto | 96:487b796308b0 | 293 | /** @defgroup SPI_Interrupt_configuration_definition SPI Interrupt configuration definition |
| Kojto | 96:487b796308b0 | 294 | * @{ |
| Kojto | 96:487b796308b0 | 295 | */ |
| Kojto | 96:487b796308b0 | 296 | #define SPI_IT_TXE SPI_CR2_TXEIE |
| Kojto | 96:487b796308b0 | 297 | #define SPI_IT_RXNE SPI_CR2_RXNEIE |
| Kojto | 96:487b796308b0 | 298 | #define SPI_IT_ERR SPI_CR2_ERRIE |
| Kojto | 96:487b796308b0 | 299 | /** |
| Kojto | 96:487b796308b0 | 300 | * @} |
| Kojto | 96:487b796308b0 | 301 | */ |
| Kojto | 96:487b796308b0 | 302 | |
| Kojto | 96:487b796308b0 | 303 | /** @defgroup SPI_Flag_definition SPI Flag definition |
| Kojto | 96:487b796308b0 | 304 | * @{ |
| Kojto | 96:487b796308b0 | 305 | */ |
| Kojto | 96:487b796308b0 | 306 | #define SPI_FLAG_RXNE SPI_SR_RXNE |
| Kojto | 96:487b796308b0 | 307 | #define SPI_FLAG_TXE SPI_SR_TXE |
| Kojto | 96:487b796308b0 | 308 | #define SPI_FLAG_CRCERR SPI_SR_CRCERR |
| Kojto | 96:487b796308b0 | 309 | #define SPI_FLAG_MODF SPI_SR_MODF |
| Kojto | 96:487b796308b0 | 310 | #define SPI_FLAG_OVR SPI_SR_OVR |
| Kojto | 96:487b796308b0 | 311 | #define SPI_FLAG_BSY SPI_SR_BSY |
| Kojto | 96:487b796308b0 | 312 | |
| Kojto | 96:487b796308b0 | 313 | /** |
| Kojto | 96:487b796308b0 | 314 | * @} |
| Kojto | 96:487b796308b0 | 315 | */ |
| Kojto | 96:487b796308b0 | 316 | |
| Kojto | 96:487b796308b0 | 317 | /** |
| Kojto | 96:487b796308b0 | 318 | * @} |
| Kojto | 96:487b796308b0 | 319 | */ |
| Kojto | 96:487b796308b0 | 320 | |
| Kojto | 96:487b796308b0 | 321 | |
| Kojto | 96:487b796308b0 | 322 | /* Private constants ---------------------------------------------------------*/ |
| Kojto | 96:487b796308b0 | 323 | /** @defgroup SPI_Private_Constants SPI Private Constants |
| Kojto | 96:487b796308b0 | 324 | * @{ |
| Kojto | 96:487b796308b0 | 325 | */ |
| Kojto | 96:487b796308b0 | 326 | #define SPI_INVALID_CRC_ERROR 0 /* CRC error wrongly detected */ |
| Kojto | 96:487b796308b0 | 327 | #define SPI_VALID_CRC_ERROR 1 /* CRC error is true */ |
| Kojto | 96:487b796308b0 | 328 | /** |
| Kojto | 96:487b796308b0 | 329 | * @} |
| Kojto | 96:487b796308b0 | 330 | */ |
| Kojto | 96:487b796308b0 | 331 | |
| Kojto | 96:487b796308b0 | 332 | |
| Kojto | 96:487b796308b0 | 333 | /* Exported macro ------------------------------------------------------------*/ |
| Kojto | 96:487b796308b0 | 334 | /** @defgroup SPI_Exported_Macros SPI Exported Macros |
| Kojto | 96:487b796308b0 | 335 | * @{ |
| Kojto | 96:487b796308b0 | 336 | */ |
| Kojto | 96:487b796308b0 | 337 | |
| Kojto | 96:487b796308b0 | 338 | /** @brief Reset SPI handle state |
| Kojto | 96:487b796308b0 | 339 | * @param __HANDLE__: specifies the SPI handle. |
| Kojto | 96:487b796308b0 | 340 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| Kojto | 96:487b796308b0 | 341 | * @retval None |
| Kojto | 96:487b796308b0 | 342 | */ |
| Kojto | 96:487b796308b0 | 343 | #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET) |
| Kojto | 96:487b796308b0 | 344 | |
| Kojto | 96:487b796308b0 | 345 | /** @brief Enable the specified SPI interrupts. |
| Kojto | 96:487b796308b0 | 346 | * @param __HANDLE__: specifies the SPI handle. |
| Kojto | 96:487b796308b0 | 347 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| Kojto | 96:487b796308b0 | 348 | * @param __INTERRUPT__: specifies the interrupt source to enable. |
| Kojto | 96:487b796308b0 | 349 | * This parameter can be one of the following values: |
| Kojto | 96:487b796308b0 | 350 | * @arg SPI_IT_TXE: Tx buffer empty interrupt enable |
| Kojto | 96:487b796308b0 | 351 | * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable |
| Kojto | 96:487b796308b0 | 352 | * @arg SPI_IT_ERR: Error interrupt enable |
| Kojto | 96:487b796308b0 | 353 | * @retval None |
| Kojto | 96:487b796308b0 | 354 | */ |
| Kojto | 96:487b796308b0 | 355 | #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) |
| Kojto | 96:487b796308b0 | 356 | |
| Kojto | 96:487b796308b0 | 357 | /** @brief Disable the specified SPI interrupts. |
| Kojto | 96:487b796308b0 | 358 | * @param __HANDLE__: specifies the SPI handle. |
| Kojto | 96:487b796308b0 | 359 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| Kojto | 96:487b796308b0 | 360 | * @param __INTERRUPT__: specifies the interrupt source to disable. |
| Kojto | 96:487b796308b0 | 361 | * This parameter can be one of the following values: |
| Kojto | 96:487b796308b0 | 362 | * @arg SPI_IT_TXE: Tx buffer empty interrupt enable |
| Kojto | 96:487b796308b0 | 363 | * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable |
| Kojto | 96:487b796308b0 | 364 | * @arg SPI_IT_ERR: Error interrupt enable |
| Kojto | 96:487b796308b0 | 365 | * @retval None |
| Kojto | 96:487b796308b0 | 366 | */ |
| Kojto | 96:487b796308b0 | 367 | #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) |
| Kojto | 96:487b796308b0 | 368 | |
| Kojto | 96:487b796308b0 | 369 | /** @brief Check if the specified SPI interrupt source is enabled or disabled. |
| Kojto | 96:487b796308b0 | 370 | * @param __HANDLE__: specifies the SPI handle. |
| Kojto | 96:487b796308b0 | 371 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| Kojto | 96:487b796308b0 | 372 | * @param __INTERRUPT__: specifies the SPI interrupt source to check. |
| Kojto | 96:487b796308b0 | 373 | * This parameter can be one of the following values: |
| Kojto | 96:487b796308b0 | 374 | * @arg SPI_IT_TXE: Tx buffer empty interrupt enable |
| Kojto | 96:487b796308b0 | 375 | * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable |
| Kojto | 96:487b796308b0 | 376 | * @arg SPI_IT_ERR: Error interrupt enable |
| Kojto | 96:487b796308b0 | 377 | * @retval The new state of __IT__ (TRUE or FALSE). |
| Kojto | 96:487b796308b0 | 378 | */ |
| Kojto | 96:487b796308b0 | 379 | #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| Kojto | 96:487b796308b0 | 380 | |
| Kojto | 96:487b796308b0 | 381 | /** @brief Check whether the specified SPI flag is set or not. |
| Kojto | 96:487b796308b0 | 382 | * @param __HANDLE__: specifies the SPI handle. |
| Kojto | 96:487b796308b0 | 383 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| Kojto | 96:487b796308b0 | 384 | * @param __FLAG__: specifies the flag to check. |
| Kojto | 96:487b796308b0 | 385 | * This parameter can be one of the following values: |
| Kojto | 96:487b796308b0 | 386 | * @arg SPI_FLAG_RXNE: Receive buffer not empty flag |
| Kojto | 96:487b796308b0 | 387 | * @arg SPI_FLAG_TXE: Transmit buffer empty flag |
| Kojto | 96:487b796308b0 | 388 | * @arg SPI_FLAG_CRCERR: CRC error flag |
| Kojto | 96:487b796308b0 | 389 | * @arg SPI_FLAG_MODF: Mode fault flag |
| Kojto | 96:487b796308b0 | 390 | * @arg SPI_FLAG_OVR: Overrun flag |
| Kojto | 96:487b796308b0 | 391 | * @arg SPI_FLAG_BSY: Busy flag |
| Kojto | 96:487b796308b0 | 392 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| Kojto | 96:487b796308b0 | 393 | */ |
| Kojto | 96:487b796308b0 | 394 | #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
| Kojto | 96:487b796308b0 | 395 | |
| Kojto | 96:487b796308b0 | 396 | /** @brief Clear the SPI CRCERR pending flag. |
| Kojto | 96:487b796308b0 | 397 | * @param __HANDLE__: specifies the SPI handle. |
| Kojto | 96:487b796308b0 | 398 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| Kojto | 96:487b796308b0 | 399 | * @retval None |
| Kojto | 96:487b796308b0 | 400 | */ |
| Kojto | 96:487b796308b0 | 401 | #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = ~(SPI_FLAG_CRCERR)) |
| Kojto | 96:487b796308b0 | 402 | |
| Kojto | 96:487b796308b0 | 403 | /** @brief Clear the SPI MODF pending flag. |
| Kojto | 96:487b796308b0 | 404 | * @param __HANDLE__: specifies the SPI handle. |
| Kojto | 96:487b796308b0 | 405 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| Kojto | 96:487b796308b0 | 406 | * @retval None |
| Kojto | 96:487b796308b0 | 407 | */ |
| Kojto | 96:487b796308b0 | 408 | #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \ |
| Kojto | 96:487b796308b0 | 409 | do{ \ |
| Kojto | 96:487b796308b0 | 410 | __IO uint32_t tmpreg; \ |
| Kojto | 96:487b796308b0 | 411 | tmpreg = (__HANDLE__)->Instance->SR; \ |
| Kojto | 96:487b796308b0 | 412 | tmpreg = CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE); \ |
| Kojto | 96:487b796308b0 | 413 | UNUSED(tmpreg); \ |
| Kojto | 96:487b796308b0 | 414 | }while(0) |
| Kojto | 96:487b796308b0 | 415 | |
| Kojto | 96:487b796308b0 | 416 | /** @brief Clear the SPI OVR pending flag. |
| Kojto | 96:487b796308b0 | 417 | * @param __HANDLE__: specifies the SPI handle. |
| Kojto | 96:487b796308b0 | 418 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| Kojto | 96:487b796308b0 | 419 | * @retval None |
| Kojto | 96:487b796308b0 | 420 | */ |
| Kojto | 96:487b796308b0 | 421 | #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \ |
| Kojto | 96:487b796308b0 | 422 | do{ \ |
| Kojto | 96:487b796308b0 | 423 | __IO uint32_t tmpreg; \ |
| Kojto | 96:487b796308b0 | 424 | tmpreg = (__HANDLE__)->Instance->DR; \ |
| Kojto | 96:487b796308b0 | 425 | tmpreg = (__HANDLE__)->Instance->SR; \ |
| Kojto | 96:487b796308b0 | 426 | UNUSED(tmpreg); \ |
| Kojto | 96:487b796308b0 | 427 | }while(0) |
| Kojto | 96:487b796308b0 | 428 | |
| Kojto | 96:487b796308b0 | 429 | |
| Kojto | 96:487b796308b0 | 430 | /** @brief Enables the SPI. |
| Kojto | 96:487b796308b0 | 431 | * @param __HANDLE__: specifies the SPI Handle. |
| Kojto | 96:487b796308b0 | 432 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| Kojto | 96:487b796308b0 | 433 | * @retval None |
| Kojto | 96:487b796308b0 | 434 | */ |
| Kojto | 96:487b796308b0 | 435 | #define __HAL_SPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) |
| Kojto | 96:487b796308b0 | 436 | |
| Kojto | 96:487b796308b0 | 437 | /** @brief Disables the SPI. |
| Kojto | 96:487b796308b0 | 438 | * @param __HANDLE__: specifies the SPI Handle. |
| Kojto | 96:487b796308b0 | 439 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| Kojto | 96:487b796308b0 | 440 | * @retval None |
| Kojto | 96:487b796308b0 | 441 | */ |
| Kojto | 96:487b796308b0 | 442 | #define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) |
| Kojto | 96:487b796308b0 | 443 | |
| Kojto | 96:487b796308b0 | 444 | /** |
| Kojto | 96:487b796308b0 | 445 | * @} |
| Kojto | 96:487b796308b0 | 446 | */ |
| Kojto | 96:487b796308b0 | 447 | |
| Kojto | 96:487b796308b0 | 448 | |
| Kojto | 96:487b796308b0 | 449 | /* Private macros -----------------------------------------------------------*/ |
| Kojto | 96:487b796308b0 | 450 | /** @defgroup SPI_Private_Macros SPI Private Macros |
| Kojto | 96:487b796308b0 | 451 | * @{ |
| Kojto | 96:487b796308b0 | 452 | */ |
| Kojto | 96:487b796308b0 | 453 | |
| Kojto | 96:487b796308b0 | 454 | /** @brief Checks if SPI Mode parameter is in allowed range. |
| Kojto | 96:487b796308b0 | 455 | * @param __MODE__: specifies the SPI Mode. |
| Kojto | 96:487b796308b0 | 456 | * This parameter can be a value of @ref SPI_mode |
| Kojto | 96:487b796308b0 | 457 | * @retval None |
| Kojto | 96:487b796308b0 | 458 | */ |
| Kojto | 96:487b796308b0 | 459 | #define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_SLAVE) || ((__MODE__) == SPI_MODE_MASTER)) |
| Kojto | 96:487b796308b0 | 460 | |
| Kojto | 96:487b796308b0 | 461 | /** @brief Checks if SPI Direction Mode parameter is in allowed range. |
| Kojto | 96:487b796308b0 | 462 | * @param __MODE__: specifies the SPI Direction Mode. |
| Kojto | 96:487b796308b0 | 463 | * This parameter can be a value of @ref SPI_Direction_mode |
| Kojto | 96:487b796308b0 | 464 | * @retval None |
| Kojto | 96:487b796308b0 | 465 | */ |
| Kojto | 96:487b796308b0 | 466 | #define IS_SPI_DIRECTION_MODE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \ |
| Kojto | 96:487b796308b0 | 467 | ((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) || \ |
| Kojto | 96:487b796308b0 | 468 | ((__MODE__) == SPI_DIRECTION_1LINE)) |
| Kojto | 96:487b796308b0 | 469 | |
| Kojto | 96:487b796308b0 | 470 | /** @brief Checks if SPI Direction Mode parameter is 1 or 2 lines. |
| Kojto | 96:487b796308b0 | 471 | * @param __MODE__: specifies the SPI Direction Mode. |
| Kojto | 96:487b796308b0 | 472 | * @retval None |
| Kojto | 96:487b796308b0 | 473 | */ |
| Kojto | 96:487b796308b0 | 474 | #define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \ |
| Kojto | 96:487b796308b0 | 475 | ((__MODE__) == SPI_DIRECTION_1LINE)) |
| Kojto | 96:487b796308b0 | 476 | |
| Kojto | 96:487b796308b0 | 477 | /** @brief Checks if SPI Direction Mode parameter is 2 lines. |
| Kojto | 96:487b796308b0 | 478 | * @param __MODE__: specifies the SPI Direction Mode. |
| Kojto | 96:487b796308b0 | 479 | * @retval None |
| Kojto | 96:487b796308b0 | 480 | */ |
| Kojto | 96:487b796308b0 | 481 | #define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES) |
| Kojto | 96:487b796308b0 | 482 | |
| Kojto | 96:487b796308b0 | 483 | /** @brief Checks if SPI Data Size parameter is in allowed range. |
| Kojto | 96:487b796308b0 | 484 | * @param __DATASIZE__: specifies the SPI Data Size. |
| Kojto | 96:487b796308b0 | 485 | * This parameter can be a value of @ref SPI_data_size |
| Kojto | 96:487b796308b0 | 486 | * @retval None |
| Kojto | 96:487b796308b0 | 487 | */ |
| Kojto | 96:487b796308b0 | 488 | #define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) == SPI_DATASIZE_16BIT) || \ |
| Kojto | 96:487b796308b0 | 489 | ((__DATASIZE__) == SPI_DATASIZE_8BIT)) |
| Kojto | 96:487b796308b0 | 490 | |
| Kojto | 96:487b796308b0 | 491 | /** @brief Checks if SPI Serial clock steady state parameter is in allowed range. |
| Kojto | 96:487b796308b0 | 492 | * @param __CPOL__: specifies the SPI serial clock steady state. |
| Kojto | 96:487b796308b0 | 493 | * This parameter can be a value of @ref SPI_Clock_Polarity |
| Kojto | 96:487b796308b0 | 494 | * @retval None |
| Kojto | 96:487b796308b0 | 495 | */ |
| Kojto | 96:487b796308b0 | 496 | #define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) || \ |
| Kojto | 96:487b796308b0 | 497 | ((__CPOL__) == SPI_POLARITY_HIGH)) |
| Kojto | 96:487b796308b0 | 498 | |
| Kojto | 96:487b796308b0 | 499 | /** @brief Checks if SPI Clock Phase parameter is in allowed range. |
| Kojto | 96:487b796308b0 | 500 | * @param __CPHA__: specifies the SPI Clock Phase. |
| Kojto | 96:487b796308b0 | 501 | * This parameter can be a value of @ref SPI_Clock_Phase |
| Kojto | 96:487b796308b0 | 502 | * @retval None |
| Kojto | 96:487b796308b0 | 503 | */ |
| Kojto | 96:487b796308b0 | 504 | #define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) || \ |
| Kojto | 96:487b796308b0 | 505 | ((__CPHA__) == SPI_PHASE_2EDGE)) |
| Kojto | 96:487b796308b0 | 506 | |
| Kojto | 96:487b796308b0 | 507 | /** @brief Checks if SPI Slave select parameter is in allowed range. |
| Kojto | 96:487b796308b0 | 508 | * @param __NSS__: specifies the SPI Slave Slelect management parameter. |
| Kojto | 96:487b796308b0 | 509 | * This parameter can be a value of @ref SPI_Slave_Select_management |
| Kojto | 96:487b796308b0 | 510 | * @retval None |
| Kojto | 96:487b796308b0 | 511 | */ |
| Kojto | 96:487b796308b0 | 512 | #define IS_SPI_NSS(__NSS__) (((__NSS__) == SPI_NSS_SOFT) || \ |
| Kojto | 96:487b796308b0 | 513 | ((__NSS__) == SPI_NSS_HARD_INPUT) || \ |
| Kojto | 96:487b796308b0 | 514 | ((__NSS__) == SPI_NSS_HARD_OUTPUT)) |
| Kojto | 96:487b796308b0 | 515 | |
| Kojto | 96:487b796308b0 | 516 | /** @brief Checks if SPI Baudrate prescaler parameter is in allowed range. |
| Kojto | 96:487b796308b0 | 517 | * @param __PRESCALER__: specifies the SPI Baudrate prescaler. |
| Kojto | 96:487b796308b0 | 518 | * This parameter can be a value of @ref SPI_BaudRate_Prescaler |
| Kojto | 96:487b796308b0 | 519 | * @retval None |
| Kojto | 96:487b796308b0 | 520 | */ |
| Kojto | 96:487b796308b0 | 521 | #define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) (((__PRESCALER__) == SPI_BAUDRATEPRESCALER_2) || \ |
| Kojto | 96:487b796308b0 | 522 | ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_4) || \ |
| Kojto | 96:487b796308b0 | 523 | ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_8) || \ |
| Kojto | 96:487b796308b0 | 524 | ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_16) || \ |
| Kojto | 96:487b796308b0 | 525 | ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_32) || \ |
| Kojto | 96:487b796308b0 | 526 | ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_64) || \ |
| Kojto | 96:487b796308b0 | 527 | ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_128) || \ |
| Kojto | 96:487b796308b0 | 528 | ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_256)) |
| Kojto | 96:487b796308b0 | 529 | |
| Kojto | 96:487b796308b0 | 530 | /** @brief Checks if SPI MSB LSB transmission parameter is in allowed range. |
| Kojto | 96:487b796308b0 | 531 | * @param __BIT__: specifies the SPI MSB LSB transmission (whether data transfer starts from MSB or LSB bit). |
| Kojto | 96:487b796308b0 | 532 | * This parameter can be a value of @ref SPI_MSB_LSB_transmission |
| Kojto | 96:487b796308b0 | 533 | * @retval None |
| Kojto | 96:487b796308b0 | 534 | */ |
| Kojto | 96:487b796308b0 | 535 | #define IS_SPI_FIRST_BIT(__BIT__) (((__BIT__) == SPI_FIRSTBIT_MSB) || \ |
| Kojto | 96:487b796308b0 | 536 | ((__BIT__) == SPI_FIRSTBIT_LSB)) |
| Kojto | 96:487b796308b0 | 537 | |
| Kojto | 96:487b796308b0 | 538 | /** @brief Checks if SPI TI mode parameter is in allowed range. |
| Kojto | 96:487b796308b0 | 539 | * @param __MODE__: specifies the SPI TI mode. |
| Kojto | 96:487b796308b0 | 540 | * This parameter can be a value of @ref SPI_TI_mode |
| Kojto | 96:487b796308b0 | 541 | * @retval None |
| Kojto | 96:487b796308b0 | 542 | */ |
| Kojto | 96:487b796308b0 | 543 | #define IS_SPI_TIMODE(__MODE__) ((__MODE__) == SPI_TIMODE_DISABLE) |
| Kojto | 96:487b796308b0 | 544 | |
| Kojto | 96:487b796308b0 | 545 | /** @brief Checks if SPI CRC calculation enabled state is in allowed range. |
| Kojto | 96:487b796308b0 | 546 | * @param __CALCULATION__: specifies the SPI CRC calculation enable state. |
| Kojto | 96:487b796308b0 | 547 | * This parameter can be a value of @ref SPI_CRC_Calculation |
| Kojto | 96:487b796308b0 | 548 | * @retval None |
| Kojto | 96:487b796308b0 | 549 | */ |
| Kojto | 96:487b796308b0 | 550 | #define IS_SPI_CRC_CALCULATION(__CALCULATION__) (((__CALCULATION__) == SPI_CRCCALCULATION_DISABLE) || \ |
| Kojto | 96:487b796308b0 | 551 | ((__CALCULATION__) == SPI_CRCCALCULATION_ENABLE)) |
| Kojto | 96:487b796308b0 | 552 | |
| Kojto | 96:487b796308b0 | 553 | /** @brief Checks if SPI polynomial value to be used for the CRC calculation, is in allowed range. |
| Kojto | 96:487b796308b0 | 554 | * @param __POLYNOMIAL__: specifies the SPI polynomial value to be used for the CRC calculation. |
| Kojto | 96:487b796308b0 | 555 | * This parameter must be a number between Min_Data = 0 and Max_Data = 65535 |
| Kojto | 96:487b796308b0 | 556 | * @retval None |
| Kojto | 96:487b796308b0 | 557 | */ |
| Kojto | 96:487b796308b0 | 558 | #define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1) && ((__POLYNOMIAL__) <= 0xFFFF)) |
| Kojto | 96:487b796308b0 | 559 | |
| Kojto | 96:487b796308b0 | 560 | /** @brief Sets the SPI transmit-only mode. |
| Kojto | 96:487b796308b0 | 561 | * @param __HANDLE__: specifies the SPI Handle. |
| Kojto | 96:487b796308b0 | 562 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| Kojto | 96:487b796308b0 | 563 | * @retval None |
| Kojto | 96:487b796308b0 | 564 | */ |
| Kojto | 96:487b796308b0 | 565 | #define SPI_1LINE_TX(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) |
| Kojto | 96:487b796308b0 | 566 | |
| Kojto | 96:487b796308b0 | 567 | /** @brief Sets the SPI receive-only mode. |
| Kojto | 96:487b796308b0 | 568 | * @param __HANDLE__: specifies the SPI Handle. |
| Kojto | 96:487b796308b0 | 569 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| Kojto | 96:487b796308b0 | 570 | * @retval None |
| Kojto | 96:487b796308b0 | 571 | */ |
| Kojto | 96:487b796308b0 | 572 | #define SPI_1LINE_RX(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) |
| Kojto | 96:487b796308b0 | 573 | |
| Kojto | 96:487b796308b0 | 574 | /** @brief Resets the CRC calculation of the SPI. |
| Kojto | 96:487b796308b0 | 575 | * @param __HANDLE__: specifies the SPI Handle. |
| Kojto | 96:487b796308b0 | 576 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| Kojto | 96:487b796308b0 | 577 | * @retval None |
| Kojto | 96:487b796308b0 | 578 | */ |
| Kojto | 96:487b796308b0 | 579 | #define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\ |
| Kojto | 96:487b796308b0 | 580 | SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0) |
| Kojto | 96:487b796308b0 | 581 | |
| Kojto | 96:487b796308b0 | 582 | /** |
| Kojto | 96:487b796308b0 | 583 | * @} |
| Kojto | 96:487b796308b0 | 584 | */ |
| Kojto | 96:487b796308b0 | 585 | |
| Kojto | 96:487b796308b0 | 586 | /* Exported functions --------------------------------------------------------*/ |
| Kojto | 96:487b796308b0 | 587 | /** @addtogroup SPI_Exported_Functions |
| Kojto | 96:487b796308b0 | 588 | * @{ |
| Kojto | 96:487b796308b0 | 589 | */ |
| Kojto | 96:487b796308b0 | 590 | |
| Kojto | 96:487b796308b0 | 591 | /* Initialization/de-initialization functions **********************************/ |
| Kojto | 96:487b796308b0 | 592 | /** @addtogroup SPI_Exported_Functions_Group1 |
| Kojto | 96:487b796308b0 | 593 | * @{ |
| Kojto | 96:487b796308b0 | 594 | */ |
| Kojto | 96:487b796308b0 | 595 | HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi); |
| Kojto | 96:487b796308b0 | 596 | HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi); |
| Kojto | 96:487b796308b0 | 597 | void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi); |
| Kojto | 96:487b796308b0 | 598 | void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi); |
| Kojto | 96:487b796308b0 | 599 | /** |
| Kojto | 96:487b796308b0 | 600 | * @} |
| Kojto | 96:487b796308b0 | 601 | */ |
| Kojto | 96:487b796308b0 | 602 | |
| Kojto | 96:487b796308b0 | 603 | /* I/O operation functions *****************************************************/ |
| Kojto | 96:487b796308b0 | 604 | /** @addtogroup SPI_Exported_Functions_Group2 |
| Kojto | 96:487b796308b0 | 605 | * @{ |
| Kojto | 96:487b796308b0 | 606 | */ |
| Kojto | 96:487b796308b0 | 607 | HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| Kojto | 96:487b796308b0 | 608 | HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| Kojto | 96:487b796308b0 | 609 | HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); |
| Kojto | 96:487b796308b0 | 610 | HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
| Kojto | 96:487b796308b0 | 611 | HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
| Kojto | 96:487b796308b0 | 612 | HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
| Kojto | 96:487b796308b0 | 613 | HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
| Kojto | 96:487b796308b0 | 614 | HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
| Kojto | 96:487b796308b0 | 615 | HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
| Kojto | 96:487b796308b0 | 616 | HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi); |
| Kojto | 96:487b796308b0 | 617 | HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi); |
| Kojto | 96:487b796308b0 | 618 | HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi); |
| Kojto | 96:487b796308b0 | 619 | |
| Kojto | 96:487b796308b0 | 620 | void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi); |
| Kojto | 96:487b796308b0 | 621 | void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi); |
| Kojto | 96:487b796308b0 | 622 | void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi); |
| Kojto | 96:487b796308b0 | 623 | void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi); |
| Kojto | 96:487b796308b0 | 624 | void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi); |
| Kojto | 96:487b796308b0 | 625 | void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi); |
| Kojto | 96:487b796308b0 | 626 | void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi); |
| Kojto | 96:487b796308b0 | 627 | void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi); |
| Kojto | 96:487b796308b0 | 628 | /** |
| Kojto | 96:487b796308b0 | 629 | * @} |
| Kojto | 96:487b796308b0 | 630 | */ |
| Kojto | 96:487b796308b0 | 631 | |
| Kojto | 96:487b796308b0 | 632 | |
| Kojto | 96:487b796308b0 | 633 | /* Peripheral State and Control functions **************************************/ |
| Kojto | 96:487b796308b0 | 634 | /** @addtogroup SPI_Exported_Functions_Group3 |
| Kojto | 96:487b796308b0 | 635 | * @{ |
| Kojto | 96:487b796308b0 | 636 | */ |
| Kojto | 96:487b796308b0 | 637 | HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi); |
| Kojto | 96:487b796308b0 | 638 | uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi); |
| Kojto | 96:487b796308b0 | 639 | |
| Kojto | 96:487b796308b0 | 640 | /** |
| Kojto | 96:487b796308b0 | 641 | * @} |
| Kojto | 96:487b796308b0 | 642 | */ |
| Kojto | 96:487b796308b0 | 643 | |
| Kojto | 96:487b796308b0 | 644 | /** |
| Kojto | 96:487b796308b0 | 645 | * @} |
| Kojto | 96:487b796308b0 | 646 | */ |
| Kojto | 96:487b796308b0 | 647 | |
| Kojto | 96:487b796308b0 | 648 | |
| Kojto | 96:487b796308b0 | 649 | /* Private functions --------------------------------------------------------*/ |
| Kojto | 96:487b796308b0 | 650 | /** @addtogroup SPI_Private_Functions |
| Kojto | 96:487b796308b0 | 651 | * @{ |
| Kojto | 96:487b796308b0 | 652 | */ |
| Kojto | 96:487b796308b0 | 653 | uint8_t SPI_ISCRCErrorValid(SPI_HandleTypeDef *hspi); |
| Kojto | 96:487b796308b0 | 654 | |
| Kojto | 96:487b796308b0 | 655 | /** |
| Kojto | 96:487b796308b0 | 656 | * @} |
| Kojto | 96:487b796308b0 | 657 | */ |
| Kojto | 96:487b796308b0 | 658 | |
| Kojto | 96:487b796308b0 | 659 | |
| Kojto | 96:487b796308b0 | 660 | /** |
| Kojto | 96:487b796308b0 | 661 | * @} |
| Kojto | 96:487b796308b0 | 662 | */ |
| Kojto | 96:487b796308b0 | 663 | |
| Kojto | 96:487b796308b0 | 664 | /** |
| Kojto | 96:487b796308b0 | 665 | * @} |
| Kojto | 96:487b796308b0 | 666 | */ |
| Kojto | 96:487b796308b0 | 667 | |
| Kojto | 96:487b796308b0 | 668 | #ifdef __cplusplus |
| Kojto | 96:487b796308b0 | 669 | } |
| Kojto | 96:487b796308b0 | 670 | #endif |
| Kojto | 96:487b796308b0 | 671 | |
| Kojto | 96:487b796308b0 | 672 | #endif /* __STM32F1xx_HAL_SPI_H */ |
| Kojto | 96:487b796308b0 | 673 | |
| Kojto | 96:487b796308b0 | 674 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |