雄介 太田 / mbed

mbed(SerialHalfDuplex入り)

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TARGET_LPC11U24/power_api.h@64:e3affc9e7238, 2013-08-05 (annotated)

Committer:
bogdanm
Date:
Mon Aug 05 12:28:09 2013 +0300
Revision:
64:e3affc9e7238
Parent:
LPC11U24/power_api.h@54:71b101360fb9
Child:
65:5798e58a58b1
New build system structure, new target (LPC1347), bug fixes (I2C read/write errors, LPC11U24 memory map and others)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 40:976df7c37ad5 1 /****************************************************************************
emilmont 40:976df7c37ad5 2 * $Id:: power_api.h 6249 2011-01-25 19:23:47Z usb01267 $
emilmont 40:976df7c37ad5 3 * Project: NXP LPC11Uxx software example
emilmont 40:976df7c37ad5 4 *
emilmont 40:976df7c37ad5 5 * Description:
emilmont 40:976df7c37ad5 6 * Power API Header File for NXP LPC11Uxx Device Series
emilmont 40:976df7c37ad5 7 *
emilmont 40:976df7c37ad5 8 ****************************************************************************
emilmont 40:976df7c37ad5 9 * Software that is described herein is for illustrative purposes only
emilmont 40:976df7c37ad5 10 * which provides customers with programming information regarding the
emilmont 40:976df7c37ad5 11 * products. This software is supplied "AS IS" without any warranties.
emilmont 40:976df7c37ad5 12 * NXP Semiconductors assumes no responsibility or liability for the
emilmont 40:976df7c37ad5 13 * use of the software, conveys no license or title under any patent,
emilmont 40:976df7c37ad5 14 * copyright, or mask work right to the product. NXP Semiconductors
emilmont 40:976df7c37ad5 15 * reserves the right to make changes in the software without
emilmont 40:976df7c37ad5 16 * notification. NXP Semiconductors also make no representation or
emilmont 40:976df7c37ad5 17 * warranty that such application will be suitable for the specified
emilmont 40:976df7c37ad5 18 * use without further testing or modification.
emilmont 40:976df7c37ad5 19 ****************************************************************************/
emilmont 40:976df7c37ad5 20 #ifndef __LPC11UXX_POWER_API_H__
emilmont 40:976df7c37ad5 21 #define __LPC11UXX_POWER_API_H__
emilmont 40:976df7c37ad5 22
emilmont 40:976df7c37ad5 23 #ifdef __cplusplus
emilmont 40:976df7c37ad5 24 extern "C" {
emilmont 40:976df7c37ad5 25 #endif
emilmont 40:976df7c37ad5 26
emilmont 40:976df7c37ad5 27 #define PWRROMD_PRESENT
emilmont 40:976df7c37ad5 28
emilmont 54:71b101360fb9 29 typedef struct _PWRD {
emilmont 40:976df7c37ad5 30 void (*set_pll)(unsigned int cmd[], unsigned int resp[]);
emilmont 40:976df7c37ad5 31 void (*set_power)(unsigned int cmd[], unsigned int resp[]);
emilmont 40:976df7c37ad5 32 } PWRD;
emilmont 40:976df7c37ad5 33
emilmont 54:71b101360fb9 34 typedef struct _ROM {
emilmont 40:976df7c37ad5 35 #ifdef USBROMD_PRESENT
emilmont 40:976df7c37ad5 36 const USB * pUSBD;
emilmont 40:976df7c37ad5 37 #else
emilmont 40:976df7c37ad5 38 const unsigned p_usbd;
emilmont 40:976df7c37ad5 39 #endif /* USBROMD_PRESENT */
emilmont 40:976df7c37ad5 40 const unsigned p_clib;
emilmont 40:976df7c37ad5 41 const unsigned p_cand;
emilmont 40:976df7c37ad5 42 #ifdef PWRROMD_PRESENT
emilmont 40:976df7c37ad5 43 const PWRD * pPWRD;
emilmont 40:976df7c37ad5 44 #else
emilmont 40:976df7c37ad5 45 const unsigned p_pwrd;
emilmont 40:976df7c37ad5 46 #endif /* PWRROMD_PRESENT */
emilmont 40:976df7c37ad5 47 const unsigned p_dev1;
emilmont 40:976df7c37ad5 48 const unsigned p_dev2;
emilmont 40:976df7c37ad5 49 const unsigned p_dev3;
emilmont 40:976df7c37ad5 50 const unsigned p_dev4;
emilmont 40:976df7c37ad5 51 } ROM;
emilmont 40:976df7c37ad5 52
emilmont 40:976df7c37ad5 53 //PLL setup related definitions
emilmont 54:71b101360fb9 54 #define CPU_FREQ_EQU 0 //main PLL freq must be equal to the specified
emilmont 54:71b101360fb9 55 #define CPU_FREQ_LTE 1 //main PLL freq must be less than or equal the specified
emilmont 54:71b101360fb9 56 #define CPU_FREQ_GTE 2 //main PLL freq must be greater than or equal the specified
emilmont 54:71b101360fb9 57 #define CPU_FREQ_APPROX 3 //main PLL freq must be as close as possible the specified
emilmont 40:976df7c37ad5 58
emilmont 54:71b101360fb9 59 #define PLL_CMD_SUCCESS 0 //PLL setup successfully found
emilmont 54:71b101360fb9 60 #define PLL_INVALID_FREQ 1 //specified freq out of range (either input or output)
emilmont 54:71b101360fb9 61 #define PLL_INVALID_MODE 2 //invalid mode (see above for valid) specified
emilmont 54:71b101360fb9 62 #define PLL_FREQ_NOT_FOUND 3 //specified freq not found under specified conditions
emilmont 54:71b101360fb9 63 #define PLL_NOT_LOCKED 4 //PLL not locked => no changes to the PLL setup
emilmont 40:976df7c37ad5 64
emilmont 40:976df7c37ad5 65 //power setup elated definitions
emilmont 54:71b101360fb9 66 #define PARAM_DEFAULT 0 //default power settings (voltage regulator, flash interface)
emilmont 54:71b101360fb9 67 #define PARAM_CPU_PERFORMANCE 1 //setup for maximum CPU performance (higher current, more computation)
emilmont 54:71b101360fb9 68 #define PARAM_EFFICIENCY 2 //balanced setting (power vs CPU performance)
emilmont 54:71b101360fb9 69 #define PARAM_LOW_CURRENT 3 //lowest active current, lowest CPU performance
emilmont 40:976df7c37ad5 70
emilmont 54:71b101360fb9 71 #define PARAM_CMD_SUCCESS 0 //power setting successfully found
emilmont 54:71b101360fb9 72 #define PARAM_INVALID_FREQ 1 //specified freq out of range (=0 or > 50 MHz)
emilmont 54:71b101360fb9 73 #define PARAM_INVALID_MODE 2 //specified mode not valid (see above for valid)
emilmont 40:976df7c37ad5 74
emilmont 40:976df7c37ad5 75 #define MAX_CLOCK_KHZ_PARAM 50000
emilmont 40:976df7c37ad5 76
emilmont 40:976df7c37ad5 77 #ifdef __cplusplus
emilmont 40:976df7c37ad5 78 }
emilmont 40:976df7c37ad5 79 #endif
emilmont 40:976df7c37ad5 80
emilmont 40:976df7c37ad5 81 #endif /* __LPC11UXX_POWER_API_H__ */
emilmont 40:976df7c37ad5 82