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TARGET_NUCLEO_F303RE/stm32f3xx_ll_fmc.h@93:e188a91d3eaa, 2015-02-03 (annotated)
- Committer:
- Kojto
- Date:
- Tue Feb 03 15:31:20 2015 +0000
- Revision:
- 93:e188a91d3eaa
Release 93 of the mbed library
Main changes:
- Renesas RZ_A1H bugfixes - i2c, ticker
- new targets - Nucleo F303RE, Nucleo F070RB, BLE SMURFS,
Dragonfly 411RE,
- BusXXX - is connected method, plus operators addition
- LPC8xx - I2c fixes
- timestamp_t reverted to uint32_t
- RTX - fixes regarding stack (alignment, magic word)
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Kojto | 93:e188a91d3eaa | 1 | /** |
| Kojto | 93:e188a91d3eaa | 2 | ****************************************************************************** |
| Kojto | 93:e188a91d3eaa | 3 | * @file stm32f3xx_ll_fmc.h |
| Kojto | 93:e188a91d3eaa | 4 | * @author MCD Application Team |
| Kojto | 93:e188a91d3eaa | 5 | * @version V1.1.0 |
| Kojto | 93:e188a91d3eaa | 6 | * @date 12-Sept-2014 |
| Kojto | 93:e188a91d3eaa | 7 | * @brief Header file of FMC HAL module. |
| Kojto | 93:e188a91d3eaa | 8 | ****************************************************************************** |
| Kojto | 93:e188a91d3eaa | 9 | * @attention |
| Kojto | 93:e188a91d3eaa | 10 | * |
| Kojto | 93:e188a91d3eaa | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| Kojto | 93:e188a91d3eaa | 12 | * |
| Kojto | 93:e188a91d3eaa | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| Kojto | 93:e188a91d3eaa | 14 | * are permitted provided that the following conditions are met: |
| Kojto | 93:e188a91d3eaa | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| Kojto | 93:e188a91d3eaa | 16 | * this list of conditions and the following disclaimer. |
| Kojto | 93:e188a91d3eaa | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| Kojto | 93:e188a91d3eaa | 18 | * this list of conditions and the following disclaimer in the documentation |
| Kojto | 93:e188a91d3eaa | 19 | * and/or other materials provided with the distribution. |
| Kojto | 93:e188a91d3eaa | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| Kojto | 93:e188a91d3eaa | 21 | * may be used to endorse or promote products derived from this software |
| Kojto | 93:e188a91d3eaa | 22 | * without specific prior written permission. |
| Kojto | 93:e188a91d3eaa | 23 | * |
| Kojto | 93:e188a91d3eaa | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| Kojto | 93:e188a91d3eaa | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| Kojto | 93:e188a91d3eaa | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| Kojto | 93:e188a91d3eaa | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| Kojto | 93:e188a91d3eaa | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| Kojto | 93:e188a91d3eaa | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| Kojto | 93:e188a91d3eaa | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| Kojto | 93:e188a91d3eaa | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| Kojto | 93:e188a91d3eaa | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| Kojto | 93:e188a91d3eaa | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| Kojto | 93:e188a91d3eaa | 34 | * |
| Kojto | 93:e188a91d3eaa | 35 | ****************************************************************************** |
| Kojto | 93:e188a91d3eaa | 36 | */ |
| Kojto | 93:e188a91d3eaa | 37 | |
| Kojto | 93:e188a91d3eaa | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| Kojto | 93:e188a91d3eaa | 39 | #ifndef __STM32F3xx_LL_FMC_H |
| Kojto | 93:e188a91d3eaa | 40 | #define __STM32F3xx_LL_FMC_H |
| Kojto | 93:e188a91d3eaa | 41 | |
| Kojto | 93:e188a91d3eaa | 42 | #ifdef __cplusplus |
| Kojto | 93:e188a91d3eaa | 43 | extern "C" { |
| Kojto | 93:e188a91d3eaa | 44 | #endif |
| Kojto | 93:e188a91d3eaa | 45 | |
| Kojto | 93:e188a91d3eaa | 46 | #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) |
| Kojto | 93:e188a91d3eaa | 47 | |
| Kojto | 93:e188a91d3eaa | 48 | /* Includes ------------------------------------------------------------------*/ |
| Kojto | 93:e188a91d3eaa | 49 | #include "stm32f3xx_hal_def.h" |
| Kojto | 93:e188a91d3eaa | 50 | |
| Kojto | 93:e188a91d3eaa | 51 | /** @addtogroup STM32F3xx_HAL_Driver |
| Kojto | 93:e188a91d3eaa | 52 | * @{ |
| Kojto | 93:e188a91d3eaa | 53 | */ |
| Kojto | 93:e188a91d3eaa | 54 | |
| Kojto | 93:e188a91d3eaa | 55 | /** @addtogroup FMC |
| Kojto | 93:e188a91d3eaa | 56 | * @{ |
| Kojto | 93:e188a91d3eaa | 57 | */ |
| Kojto | 93:e188a91d3eaa | 58 | |
| Kojto | 93:e188a91d3eaa | 59 | /* Exported typedef ----------------------------------------------------------*/ |
| Kojto | 93:e188a91d3eaa | 60 | #define FMC_NORSRAM_TypeDef FMC_Bank1_TypeDef |
| Kojto | 93:e188a91d3eaa | 61 | #define FMC_NORSRAM_EXTENDED_TypeDef FMC_Bank1E_TypeDef |
| Kojto | 93:e188a91d3eaa | 62 | #define FMC_NAND_TypeDef FMC_Bank2_3_TypeDef |
| Kojto | 93:e188a91d3eaa | 63 | #define FMC_PCCARD_TypeDef FMC_Bank4_TypeDef |
| Kojto | 93:e188a91d3eaa | 64 | |
| Kojto | 93:e188a91d3eaa | 65 | #define FMC_NORSRAM_DEVICE FMC_Bank1 |
| Kojto | 93:e188a91d3eaa | 66 | #define FMC_NORSRAM_EXTENDED_DEVICE FMC_Bank1E |
| Kojto | 93:e188a91d3eaa | 67 | #define FMC_NAND_DEVICE FMC_Bank2_3 |
| Kojto | 93:e188a91d3eaa | 68 | #define FMC_PCCARD_DEVICE FMC_Bank4 |
| Kojto | 93:e188a91d3eaa | 69 | |
| Kojto | 93:e188a91d3eaa | 70 | /** |
| Kojto | 93:e188a91d3eaa | 71 | * @brief FMC_NORSRAM Configuration Structure definition |
| Kojto | 93:e188a91d3eaa | 72 | */ |
| Kojto | 93:e188a91d3eaa | 73 | typedef struct |
| Kojto | 93:e188a91d3eaa | 74 | { |
| Kojto | 93:e188a91d3eaa | 75 | uint32_t NSBank; /*!< Specifies the NORSRAM memory device that will be used. |
| Kojto | 93:e188a91d3eaa | 76 | This parameter can be a value of @ref FMC_NORSRAM_Bank */ |
| Kojto | 93:e188a91d3eaa | 77 | |
| Kojto | 93:e188a91d3eaa | 78 | uint32_t DataAddressMux; /*!< Specifies whether the address and data values are |
| Kojto | 93:e188a91d3eaa | 79 | multiplexed on the data bus or not. |
| Kojto | 93:e188a91d3eaa | 80 | This parameter can be a value of @ref FMC_Data_Address_Bus_Multiplexing */ |
| Kojto | 93:e188a91d3eaa | 81 | |
| Kojto | 93:e188a91d3eaa | 82 | uint32_t MemoryType; /*!< Specifies the type of external memory attached to |
| Kojto | 93:e188a91d3eaa | 83 | the corresponding memory device. |
| Kojto | 93:e188a91d3eaa | 84 | This parameter can be a value of @ref FMC_Memory_Type */ |
| Kojto | 93:e188a91d3eaa | 85 | |
| Kojto | 93:e188a91d3eaa | 86 | uint32_t MemoryDataWidth; /*!< Specifies the external memory device width. |
| Kojto | 93:e188a91d3eaa | 87 | This parameter can be a value of @ref FMC_NORSRAM_Data_Width */ |
| Kojto | 93:e188a91d3eaa | 88 | |
| Kojto | 93:e188a91d3eaa | 89 | uint32_t BurstAccessMode; /*!< Enables or disables the burst access mode for Flash memory, |
| Kojto | 93:e188a91d3eaa | 90 | valid only with synchronous burst Flash memories. |
| Kojto | 93:e188a91d3eaa | 91 | This parameter can be a value of @ref FMC_Burst_Access_Mode */ |
| Kojto | 93:e188a91d3eaa | 92 | |
| Kojto | 93:e188a91d3eaa | 93 | uint32_t WaitSignalPolarity; /*!< Specifies the wait signal polarity, valid only when accessing |
| Kojto | 93:e188a91d3eaa | 94 | the Flash memory in burst mode. |
| Kojto | 93:e188a91d3eaa | 95 | This parameter can be a value of @ref FMC_Wait_Signal_Polarity */ |
| Kojto | 93:e188a91d3eaa | 96 | |
| Kojto | 93:e188a91d3eaa | 97 | uint32_t WrapMode; /*!< Enables or disables the Wrapped burst access mode for Flash |
| Kojto | 93:e188a91d3eaa | 98 | memory, valid only when accessing Flash memories in burst mode. |
| Kojto | 93:e188a91d3eaa | 99 | This parameter can be a value of @ref FMC_Wrap_Mode */ |
| Kojto | 93:e188a91d3eaa | 100 | |
| Kojto | 93:e188a91d3eaa | 101 | uint32_t WaitSignalActive; /*!< Specifies if the wait signal is asserted by the memory one |
| Kojto | 93:e188a91d3eaa | 102 | clock cycle before the wait state or during the wait state, |
| Kojto | 93:e188a91d3eaa | 103 | valid only when accessing memories in burst mode. |
| Kojto | 93:e188a91d3eaa | 104 | This parameter can be a value of @ref FMC_Wait_Timing */ |
| Kojto | 93:e188a91d3eaa | 105 | |
| Kojto | 93:e188a91d3eaa | 106 | uint32_t WriteOperation; /*!< Enables or disables the write operation in the selected device by the FMC. |
| Kojto | 93:e188a91d3eaa | 107 | This parameter can be a value of @ref FMC_Write_Operation */ |
| Kojto | 93:e188a91d3eaa | 108 | |
| Kojto | 93:e188a91d3eaa | 109 | uint32_t WaitSignal; /*!< Enables or disables the wait state insertion via wait |
| Kojto | 93:e188a91d3eaa | 110 | signal, valid for Flash memory access in burst mode. |
| Kojto | 93:e188a91d3eaa | 111 | This parameter can be a value of @ref FMC_Wait_Signal */ |
| Kojto | 93:e188a91d3eaa | 112 | |
| Kojto | 93:e188a91d3eaa | 113 | uint32_t ExtendedMode; /*!< Enables or disables the extended mode. |
| Kojto | 93:e188a91d3eaa | 114 | This parameter can be a value of @ref FMC_Extended_Mode */ |
| Kojto | 93:e188a91d3eaa | 115 | |
| Kojto | 93:e188a91d3eaa | 116 | uint32_t AsynchronousWait; /*!< Enables or disables wait signal during asynchronous transfers, |
| Kojto | 93:e188a91d3eaa | 117 | valid only with asynchronous Flash memories. |
| Kojto | 93:e188a91d3eaa | 118 | This parameter can be a value of @ref FMC_AsynchronousWait */ |
| Kojto | 93:e188a91d3eaa | 119 | |
| Kojto | 93:e188a91d3eaa | 120 | uint32_t WriteBurst; /*!< Enables or disables the write burst operation. |
| Kojto | 93:e188a91d3eaa | 121 | This parameter can be a value of @ref FMC_Write_Burst */ |
| Kojto | 93:e188a91d3eaa | 122 | |
| Kojto | 93:e188a91d3eaa | 123 | uint32_t ContinuousClock; /*!< Enables or disables the FMC clock output to external memory devices. |
| Kojto | 93:e188a91d3eaa | 124 | This parameter is only enabled through the FMC_BCR1 register, and don't care |
| Kojto | 93:e188a91d3eaa | 125 | through FMC_BCR2..4 registers. |
| Kojto | 93:e188a91d3eaa | 126 | This parameter can be a value of @ref FMC_Continous_Clock */ |
| Kojto | 93:e188a91d3eaa | 127 | |
| Kojto | 93:e188a91d3eaa | 128 | }FMC_NORSRAM_InitTypeDef; |
| Kojto | 93:e188a91d3eaa | 129 | |
| Kojto | 93:e188a91d3eaa | 130 | /** |
| Kojto | 93:e188a91d3eaa | 131 | * @brief FMC_NORSRAM Timing parameters structure definition |
| Kojto | 93:e188a91d3eaa | 132 | */ |
| Kojto | 93:e188a91d3eaa | 133 | typedef struct |
| Kojto | 93:e188a91d3eaa | 134 | { |
| Kojto | 93:e188a91d3eaa | 135 | uint32_t AddressSetupTime; /*!< Defines the number of HCLK cycles to configure |
| Kojto | 93:e188a91d3eaa | 136 | the duration of the address setup time. |
| Kojto | 93:e188a91d3eaa | 137 | This parameter can be a value between Min_Data = 0 and Max_Data = 15. |
| Kojto | 93:e188a91d3eaa | 138 | @note This parameter is not used with synchronous NOR Flash memories. */ |
| Kojto | 93:e188a91d3eaa | 139 | |
| Kojto | 93:e188a91d3eaa | 140 | uint32_t AddressHoldTime; /*!< Defines the number of HCLK cycles to configure |
| Kojto | 93:e188a91d3eaa | 141 | the duration of the address hold time. |
| Kojto | 93:e188a91d3eaa | 142 | This parameter can be a value between Min_Data = 1 and Max_Data = 15. |
| Kojto | 93:e188a91d3eaa | 143 | @note This parameter is not used with synchronous NOR Flash memories. */ |
| Kojto | 93:e188a91d3eaa | 144 | |
| Kojto | 93:e188a91d3eaa | 145 | uint32_t DataSetupTime; /*!< Defines the number of HCLK cycles to configure |
| Kojto | 93:e188a91d3eaa | 146 | the duration of the data setup time. |
| Kojto | 93:e188a91d3eaa | 147 | This parameter can be a value between Min_Data = 1 and Max_Data = 255. |
| Kojto | 93:e188a91d3eaa | 148 | @note This parameter is used for SRAMs, ROMs and asynchronous multiplexed |
| Kojto | 93:e188a91d3eaa | 149 | NOR Flash memories. */ |
| Kojto | 93:e188a91d3eaa | 150 | |
| Kojto | 93:e188a91d3eaa | 151 | uint32_t BusTurnAroundDuration; /*!< Defines the number of HCLK cycles to configure |
| Kojto | 93:e188a91d3eaa | 152 | the duration of the bus turnaround. |
| Kojto | 93:e188a91d3eaa | 153 | This parameter can be a value between Min_Data = 0 and Max_Data = 15. |
| Kojto | 93:e188a91d3eaa | 154 | @note This parameter is only used for multiplexed NOR Flash memories. */ |
| Kojto | 93:e188a91d3eaa | 155 | |
| Kojto | 93:e188a91d3eaa | 156 | uint32_t CLKDivision; /*!< Defines the period of CLK clock output signal, expressed in number of |
| Kojto | 93:e188a91d3eaa | 157 | HCLK cycles. This parameter can be a value between Min_Data = 2 and Max_Data = 16. |
| Kojto | 93:e188a91d3eaa | 158 | @note This parameter is not used for asynchronous NOR Flash, SRAM or ROM |
| Kojto | 93:e188a91d3eaa | 159 | accesses. */ |
| Kojto | 93:e188a91d3eaa | 160 | |
| Kojto | 93:e188a91d3eaa | 161 | uint32_t DataLatency; /*!< Defines the number of memory clock cycles to issue |
| Kojto | 93:e188a91d3eaa | 162 | to the memory before getting the first data. |
| Kojto | 93:e188a91d3eaa | 163 | The parameter value depends on the memory type as shown below: |
| Kojto | 93:e188a91d3eaa | 164 | - It must be set to 0 in case of a CRAM |
| Kojto | 93:e188a91d3eaa | 165 | - It is don't care in asynchronous NOR, SRAM or ROM accesses |
| Kojto | 93:e188a91d3eaa | 166 | - It may assume a value between Min_Data = 2 and Max_Data = 17 in NOR Flash memories |
| Kojto | 93:e188a91d3eaa | 167 | with synchronous burst mode enable */ |
| Kojto | 93:e188a91d3eaa | 168 | |
| Kojto | 93:e188a91d3eaa | 169 | uint32_t AccessMode; /*!< Specifies the asynchronous access mode. |
| Kojto | 93:e188a91d3eaa | 170 | This parameter can be a value of @ref FMC_Access_Mode */ |
| Kojto | 93:e188a91d3eaa | 171 | |
| Kojto | 93:e188a91d3eaa | 172 | }FMC_NORSRAM_TimingTypeDef; |
| Kojto | 93:e188a91d3eaa | 173 | |
| Kojto | 93:e188a91d3eaa | 174 | /** |
| Kojto | 93:e188a91d3eaa | 175 | * @brief FMC_NAND Configuration Structure definition |
| Kojto | 93:e188a91d3eaa | 176 | */ |
| Kojto | 93:e188a91d3eaa | 177 | typedef struct |
| Kojto | 93:e188a91d3eaa | 178 | { |
| Kojto | 93:e188a91d3eaa | 179 | uint32_t NandBank; /*!< Specifies the NAND memory device that will be used. |
| Kojto | 93:e188a91d3eaa | 180 | This parameter can be a value of @ref FMC_NAND_Bank */ |
| Kojto | 93:e188a91d3eaa | 181 | |
| Kojto | 93:e188a91d3eaa | 182 | uint32_t Waitfeature; /*!< Enables or disables the Wait feature for the NAND Memory device. |
| Kojto | 93:e188a91d3eaa | 183 | This parameter can be any value of @ref FMC_Wait_feature */ |
| Kojto | 93:e188a91d3eaa | 184 | |
| Kojto | 93:e188a91d3eaa | 185 | uint32_t MemoryDataWidth; /*!< Specifies the external memory device width. |
| Kojto | 93:e188a91d3eaa | 186 | This parameter can be any value of @ref FMC_NAND_Data_Width */ |
| Kojto | 93:e188a91d3eaa | 187 | |
| Kojto | 93:e188a91d3eaa | 188 | uint32_t EccComputation; /*!< Enables or disables the ECC computation. |
| Kojto | 93:e188a91d3eaa | 189 | This parameter can be any value of @ref FMC_ECC */ |
| Kojto | 93:e188a91d3eaa | 190 | |
| Kojto | 93:e188a91d3eaa | 191 | uint32_t ECCPageSize; /*!< Defines the page size for the extended ECC. |
| Kojto | 93:e188a91d3eaa | 192 | This parameter can be any value of @ref FMC_ECC_Page_Size */ |
| Kojto | 93:e188a91d3eaa | 193 | |
| Kojto | 93:e188a91d3eaa | 194 | uint32_t TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the |
| Kojto | 93:e188a91d3eaa | 195 | delay between CLE low and RE low. |
| Kojto | 93:e188a91d3eaa | 196 | This parameter can be a value between Min_Data = 0 and Max_Data = 255 */ |
| Kojto | 93:e188a91d3eaa | 197 | |
| Kojto | 93:e188a91d3eaa | 198 | uint32_t TARSetupTime; /*!< Defines the number of HCLK cycles to configure the |
| Kojto | 93:e188a91d3eaa | 199 | delay between ALE low and RE low. |
| Kojto | 93:e188a91d3eaa | 200 | This parameter can be a number between Min_Data = 0 and Max_Data = 255 */ |
| Kojto | 93:e188a91d3eaa | 201 | |
| Kojto | 93:e188a91d3eaa | 202 | }FMC_NAND_InitTypeDef; |
| Kojto | 93:e188a91d3eaa | 203 | |
| Kojto | 93:e188a91d3eaa | 204 | /** |
| Kojto | 93:e188a91d3eaa | 205 | * @brief FMC_NAND_PCCARD Timing parameters structure definition |
| Kojto | 93:e188a91d3eaa | 206 | */ |
| Kojto | 93:e188a91d3eaa | 207 | typedef struct |
| Kojto | 93:e188a91d3eaa | 208 | { |
| Kojto | 93:e188a91d3eaa | 209 | uint32_t SetupTime; /*!< Defines the number of HCLK cycles to setup address before |
| Kojto | 93:e188a91d3eaa | 210 | the command assertion for NAND-Flash read or write access |
| Kojto | 93:e188a91d3eaa | 211 | to common/Attribute or I/O memory space (depending on |
| Kojto | 93:e188a91d3eaa | 212 | the memory space timing to be configured). |
| Kojto | 93:e188a91d3eaa | 213 | This parameter can be a value between Min_Data = 0 and Max_Data = 255 */ |
| Kojto | 93:e188a91d3eaa | 214 | |
| Kojto | 93:e188a91d3eaa | 215 | uint32_t WaitSetupTime; /*!< Defines the minimum number of HCLK cycles to assert the |
| Kojto | 93:e188a91d3eaa | 216 | command for NAND-Flash read or write access to |
| Kojto | 93:e188a91d3eaa | 217 | common/Attribute or I/O memory space (depending on the |
| Kojto | 93:e188a91d3eaa | 218 | memory space timing to be configured). |
| Kojto | 93:e188a91d3eaa | 219 | This parameter can be a number between Min_Data = 0 and Max_Data = 255 */ |
| Kojto | 93:e188a91d3eaa | 220 | |
| Kojto | 93:e188a91d3eaa | 221 | uint32_t HoldSetupTime; /*!< Defines the number of HCLK clock cycles to hold address |
| Kojto | 93:e188a91d3eaa | 222 | (and data for write access) after the command de-assertion |
| Kojto | 93:e188a91d3eaa | 223 | for NAND-Flash read or write access to common/Attribute |
| Kojto | 93:e188a91d3eaa | 224 | or I/O memory space (depending on the memory space timing |
| Kojto | 93:e188a91d3eaa | 225 | to be configured). |
| Kojto | 93:e188a91d3eaa | 226 | This parameter can be a number between Min_Data = 0 and Max_Data = 255 */ |
| Kojto | 93:e188a91d3eaa | 227 | |
| Kojto | 93:e188a91d3eaa | 228 | uint32_t HiZSetupTime; /*!< Defines the number of HCLK clock cycles during which the |
| Kojto | 93:e188a91d3eaa | 229 | data bus is kept in HiZ after the start of a NAND-Flash |
| Kojto | 93:e188a91d3eaa | 230 | write access to common/Attribute or I/O memory space (depending |
| Kojto | 93:e188a91d3eaa | 231 | on the memory space timing to be configured). |
| Kojto | 93:e188a91d3eaa | 232 | This parameter can be a number between Min_Data = 0 and Max_Data = 255 */ |
| Kojto | 93:e188a91d3eaa | 233 | |
| Kojto | 93:e188a91d3eaa | 234 | }FMC_NAND_PCC_TimingTypeDef; |
| Kojto | 93:e188a91d3eaa | 235 | |
| Kojto | 93:e188a91d3eaa | 236 | /** |
| Kojto | 93:e188a91d3eaa | 237 | * @brief FMC_NAND Configuration Structure definition |
| Kojto | 93:e188a91d3eaa | 238 | */ |
| Kojto | 93:e188a91d3eaa | 239 | typedef struct |
| Kojto | 93:e188a91d3eaa | 240 | { |
| Kojto | 93:e188a91d3eaa | 241 | uint32_t Waitfeature; /*!< Enables or disables the Wait feature for the PCCARD Memory device. |
| Kojto | 93:e188a91d3eaa | 242 | This parameter can be any value of @ref FMC_Wait_feature */ |
| Kojto | 93:e188a91d3eaa | 243 | |
| Kojto | 93:e188a91d3eaa | 244 | uint32_t TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the |
| Kojto | 93:e188a91d3eaa | 245 | delay between CLE low and RE low. |
| Kojto | 93:e188a91d3eaa | 246 | This parameter can be a value between Min_Data = 0 and Max_Data = 255 */ |
| Kojto | 93:e188a91d3eaa | 247 | |
| Kojto | 93:e188a91d3eaa | 248 | uint32_t TARSetupTime; /*!< Defines the number of HCLK cycles to configure the |
| Kojto | 93:e188a91d3eaa | 249 | delay between ALE low and RE low. |
| Kojto | 93:e188a91d3eaa | 250 | This parameter can be a number between Min_Data = 0 and Max_Data = 255 */ |
| Kojto | 93:e188a91d3eaa | 251 | |
| Kojto | 93:e188a91d3eaa | 252 | }FMC_PCCARD_InitTypeDef; |
| Kojto | 93:e188a91d3eaa | 253 | |
| Kojto | 93:e188a91d3eaa | 254 | /* Exported constants --------------------------------------------------------*/ |
| Kojto | 93:e188a91d3eaa | 255 | |
| Kojto | 93:e188a91d3eaa | 256 | /** @defgroup FMC_NOR_SRAM_Controller |
| Kojto | 93:e188a91d3eaa | 257 | * @{ |
| Kojto | 93:e188a91d3eaa | 258 | */ |
| Kojto | 93:e188a91d3eaa | 259 | |
| Kojto | 93:e188a91d3eaa | 260 | /** @defgroup FMC_NORSRAM_Bank |
| Kojto | 93:e188a91d3eaa | 261 | * @{ |
| Kojto | 93:e188a91d3eaa | 262 | */ |
| Kojto | 93:e188a91d3eaa | 263 | #define FMC_NORSRAM_BANK1 ((uint32_t)0x00000000) |
| Kojto | 93:e188a91d3eaa | 264 | #define FMC_NORSRAM_BANK2 ((uint32_t)0x00000002) |
| Kojto | 93:e188a91d3eaa | 265 | #define FMC_NORSRAM_BANK3 ((uint32_t)0x00000004) |
| Kojto | 93:e188a91d3eaa | 266 | #define FMC_NORSRAM_BANK4 ((uint32_t)0x00000006) |
| Kojto | 93:e188a91d3eaa | 267 | |
| Kojto | 93:e188a91d3eaa | 268 | #define IS_FMC_NORSRAM_BANK(BANK) (((BANK) == FMC_NORSRAM_BANK1) || \ |
| Kojto | 93:e188a91d3eaa | 269 | ((BANK) == FMC_NORSRAM_BANK2) || \ |
| Kojto | 93:e188a91d3eaa | 270 | ((BANK) == FMC_NORSRAM_BANK3) || \ |
| Kojto | 93:e188a91d3eaa | 271 | ((BANK) == FMC_NORSRAM_BANK4)) |
| Kojto | 93:e188a91d3eaa | 272 | /** |
| Kojto | 93:e188a91d3eaa | 273 | * @} |
| Kojto | 93:e188a91d3eaa | 274 | */ |
| Kojto | 93:e188a91d3eaa | 275 | |
| Kojto | 93:e188a91d3eaa | 276 | /** @defgroup FMC_Data_Address_Bus_Multiplexing |
| Kojto | 93:e188a91d3eaa | 277 | * @{ |
| Kojto | 93:e188a91d3eaa | 278 | */ |
| Kojto | 93:e188a91d3eaa | 279 | #define FMC_DATA_ADDRESS_MUX_DISABLE ((uint32_t)0x00000000) |
| Kojto | 93:e188a91d3eaa | 280 | #define FMC_DATA_ADDRESS_MUX_ENABLE ((uint32_t)0x00000002) |
| Kojto | 93:e188a91d3eaa | 281 | |
| Kojto | 93:e188a91d3eaa | 282 | #define IS_FMC_MUX(MUX) (((MUX) == FMC_DATA_ADDRESS_MUX_DISABLE) || \ |
| Kojto | 93:e188a91d3eaa | 283 | ((MUX) == FMC_DATA_ADDRESS_MUX_ENABLE)) |
| Kojto | 93:e188a91d3eaa | 284 | /** |
| Kojto | 93:e188a91d3eaa | 285 | * @} |
| Kojto | 93:e188a91d3eaa | 286 | */ |
| Kojto | 93:e188a91d3eaa | 287 | |
| Kojto | 93:e188a91d3eaa | 288 | /** @defgroup FMC_Memory_Type |
| Kojto | 93:e188a91d3eaa | 289 | * @{ |
| Kojto | 93:e188a91d3eaa | 290 | */ |
| Kojto | 93:e188a91d3eaa | 291 | #define FMC_MEMORY_TYPE_SRAM ((uint32_t)0x00000000) |
| Kojto | 93:e188a91d3eaa | 292 | #define FMC_MEMORY_TYPE_PSRAM ((uint32_t)0x00000004) |
| Kojto | 93:e188a91d3eaa | 293 | #define FMC_MEMORY_TYPE_NOR ((uint32_t)0x00000008) |
| Kojto | 93:e188a91d3eaa | 294 | |
| Kojto | 93:e188a91d3eaa | 295 | #define IS_FMC_MEMORY(MEMORY) (((MEMORY) == FMC_MEMORY_TYPE_SRAM) || \ |
| Kojto | 93:e188a91d3eaa | 296 | ((MEMORY) == FMC_MEMORY_TYPE_PSRAM)|| \ |
| Kojto | 93:e188a91d3eaa | 297 | ((MEMORY) == FMC_MEMORY_TYPE_NOR)) |
| Kojto | 93:e188a91d3eaa | 298 | /** |
| Kojto | 93:e188a91d3eaa | 299 | * @} |
| Kojto | 93:e188a91d3eaa | 300 | */ |
| Kojto | 93:e188a91d3eaa | 301 | |
| Kojto | 93:e188a91d3eaa | 302 | /** @defgroup FMC_NORSRAM_Data_Width |
| Kojto | 93:e188a91d3eaa | 303 | * @{ |
| Kojto | 93:e188a91d3eaa | 304 | */ |
| Kojto | 93:e188a91d3eaa | 305 | #define FMC_NORSRAM_MEM_BUS_WIDTH_8 ((uint32_t)0x00000000) |
| Kojto | 93:e188a91d3eaa | 306 | #define FMC_NORSRAM_MEM_BUS_WIDTH_16 ((uint32_t)0x00000010) |
| Kojto | 93:e188a91d3eaa | 307 | #define FMC_NORSRAM_MEM_BUS_WIDTH_32 ((uint32_t)0x00000020) |
| Kojto | 93:e188a91d3eaa | 308 | |
| Kojto | 93:e188a91d3eaa | 309 | #define IS_FMC_NORSRAM_MEMORY_WIDTH(WIDTH) (((WIDTH) == FMC_NORSRAM_MEM_BUS_WIDTH_8) || \ |
| Kojto | 93:e188a91d3eaa | 310 | ((WIDTH) == FMC_NORSRAM_MEM_BUS_WIDTH_16) || \ |
| Kojto | 93:e188a91d3eaa | 311 | ((WIDTH) == FMC_NORSRAM_MEM_BUS_WIDTH_32)) |
| Kojto | 93:e188a91d3eaa | 312 | /** |
| Kojto | 93:e188a91d3eaa | 313 | * @} |
| Kojto | 93:e188a91d3eaa | 314 | */ |
| Kojto | 93:e188a91d3eaa | 315 | |
| Kojto | 93:e188a91d3eaa | 316 | /** @defgroup FMC_NORSRAM_Flash_Access |
| Kojto | 93:e188a91d3eaa | 317 | * @{ |
| Kojto | 93:e188a91d3eaa | 318 | */ |
| Kojto | 93:e188a91d3eaa | 319 | #define FMC_NORSRAM_FLASH_ACCESS_ENABLE ((uint32_t)0x00000040) |
| Kojto | 93:e188a91d3eaa | 320 | #define FMC_NORSRAM_FLASH_ACCESS_DISABLE ((uint32_t)0x00000000) |
| Kojto | 93:e188a91d3eaa | 321 | /** |
| Kojto | 93:e188a91d3eaa | 322 | * @} |
| Kojto | 93:e188a91d3eaa | 323 | */ |
| Kojto | 93:e188a91d3eaa | 324 | |
| Kojto | 93:e188a91d3eaa | 325 | /** @defgroup FMC_Burst_Access_Mode |
| Kojto | 93:e188a91d3eaa | 326 | * @{ |
| Kojto | 93:e188a91d3eaa | 327 | */ |
| Kojto | 93:e188a91d3eaa | 328 | #define FMC_BURST_ACCESS_MODE_DISABLE ((uint32_t)0x00000000) |
| Kojto | 93:e188a91d3eaa | 329 | #define FMC_BURST_ACCESS_MODE_ENABLE ((uint32_t)0x00000100) |
| Kojto | 93:e188a91d3eaa | 330 | |
| Kojto | 93:e188a91d3eaa | 331 | #define IS_FMC_BURSTMODE(STATE) (((STATE) == FMC_BURST_ACCESS_MODE_DISABLE) || \ |
| Kojto | 93:e188a91d3eaa | 332 | ((STATE) == FMC_BURST_ACCESS_MODE_ENABLE)) |
| Kojto | 93:e188a91d3eaa | 333 | /** |
| Kojto | 93:e188a91d3eaa | 334 | * @} |
| Kojto | 93:e188a91d3eaa | 335 | */ |
| Kojto | 93:e188a91d3eaa | 336 | |
| Kojto | 93:e188a91d3eaa | 337 | |
| Kojto | 93:e188a91d3eaa | 338 | /** @defgroup FMC_Wait_Signal_Polarity |
| Kojto | 93:e188a91d3eaa | 339 | * @{ |
| Kojto | 93:e188a91d3eaa | 340 | */ |
| Kojto | 93:e188a91d3eaa | 341 | #define FMC_WAIT_SIGNAL_POLARITY_LOW ((uint32_t)0x00000000) |
| Kojto | 93:e188a91d3eaa | 342 | #define FMC_WAIT_SIGNAL_POLARITY_HIGH ((uint32_t)0x00000200) |
| Kojto | 93:e188a91d3eaa | 343 | |
| Kojto | 93:e188a91d3eaa | 344 | #define IS_FMC_WAIT_POLARITY(POLARITY) (((POLARITY) == FMC_WAIT_SIGNAL_POLARITY_LOW) || \ |
| Kojto | 93:e188a91d3eaa | 345 | ((POLARITY) == FMC_WAIT_SIGNAL_POLARITY_HIGH)) |
| Kojto | 93:e188a91d3eaa | 346 | /** |
| Kojto | 93:e188a91d3eaa | 347 | * @} |
| Kojto | 93:e188a91d3eaa | 348 | */ |
| Kojto | 93:e188a91d3eaa | 349 | |
| Kojto | 93:e188a91d3eaa | 350 | /** @defgroup FMC_Wrap_Mode |
| Kojto | 93:e188a91d3eaa | 351 | * @{ |
| Kojto | 93:e188a91d3eaa | 352 | */ |
| Kojto | 93:e188a91d3eaa | 353 | #define FMC_WRAP_MODE_DISABLE ((uint32_t)0x00000000) |
| Kojto | 93:e188a91d3eaa | 354 | #define FMC_WRAP_MODE_ENABLE ((uint32_t)0x00000400) |
| Kojto | 93:e188a91d3eaa | 355 | |
| Kojto | 93:e188a91d3eaa | 356 | #define IS_FMC_WRAP_MODE(MODE) (((MODE) == FMC_WRAP_MODE_DISABLE) || \ |
| Kojto | 93:e188a91d3eaa | 357 | ((MODE) == FMC_WRAP_MODE_ENABLE)) |
| Kojto | 93:e188a91d3eaa | 358 | /** |
| Kojto | 93:e188a91d3eaa | 359 | * @} |
| Kojto | 93:e188a91d3eaa | 360 | */ |
| Kojto | 93:e188a91d3eaa | 361 | |
| Kojto | 93:e188a91d3eaa | 362 | /** @defgroup FMC_Wait_Timing |
| Kojto | 93:e188a91d3eaa | 363 | * @{ |
| Kojto | 93:e188a91d3eaa | 364 | */ |
| Kojto | 93:e188a91d3eaa | 365 | #define FMC_WAIT_TIMING_BEFORE_WS ((uint32_t)0x00000000) |
| Kojto | 93:e188a91d3eaa | 366 | #define FMC_WAIT_TIMING_DURING_WS ((uint32_t)0x00000800) |
| Kojto | 93:e188a91d3eaa | 367 | |
| Kojto | 93:e188a91d3eaa | 368 | #define IS_FMC_WAIT_SIGNAL_ACTIVE(ACTIVE) (((ACTIVE) == FMC_WAIT_TIMING_BEFORE_WS) || \ |
| Kojto | 93:e188a91d3eaa | 369 | ((ACTIVE) == FMC_WAIT_TIMING_DURING_WS)) |
| Kojto | 93:e188a91d3eaa | 370 | /** |
| Kojto | 93:e188a91d3eaa | 371 | * @} |
| Kojto | 93:e188a91d3eaa | 372 | */ |
| Kojto | 93:e188a91d3eaa | 373 | |
| Kojto | 93:e188a91d3eaa | 374 | /** @defgroup FMC_Write_Operation |
| Kojto | 93:e188a91d3eaa | 375 | * @{ |
| Kojto | 93:e188a91d3eaa | 376 | */ |
| Kojto | 93:e188a91d3eaa | 377 | #define FMC_WRITE_OPERATION_DISABLE ((uint32_t)0x00000000) |
| Kojto | 93:e188a91d3eaa | 378 | #define FMC_WRITE_OPERATION_ENABLE ((uint32_t)0x00001000) |
| Kojto | 93:e188a91d3eaa | 379 | |
| Kojto | 93:e188a91d3eaa | 380 | #define IS_FMC_WRITE_OPERATION(OPERATION) (((OPERATION) == FMC_WRITE_OPERATION_DISABLE) || \ |
| Kojto | 93:e188a91d3eaa | 381 | ((OPERATION) == FMC_WRITE_OPERATION_ENABLE)) |
| Kojto | 93:e188a91d3eaa | 382 | /** |
| Kojto | 93:e188a91d3eaa | 383 | * @} |
| Kojto | 93:e188a91d3eaa | 384 | */ |
| Kojto | 93:e188a91d3eaa | 385 | |
| Kojto | 93:e188a91d3eaa | 386 | /** @defgroup FMC_Wait_Signal |
| Kojto | 93:e188a91d3eaa | 387 | * @{ |
| Kojto | 93:e188a91d3eaa | 388 | */ |
| Kojto | 93:e188a91d3eaa | 389 | #define FMC_WAIT_SIGNAL_DISABLE ((uint32_t)0x00000000) |
| Kojto | 93:e188a91d3eaa | 390 | #define FMC_WAIT_SIGNAL_ENABLE ((uint32_t)0x00002000) |
| Kojto | 93:e188a91d3eaa | 391 | |
| Kojto | 93:e188a91d3eaa | 392 | #define IS_FMC_WAITE_SIGNAL(SIGNAL) (((SIGNAL) == FMC_WAIT_SIGNAL_DISABLE) || \ |
| Kojto | 93:e188a91d3eaa | 393 | ((SIGNAL) == FMC_WAIT_SIGNAL_ENABLE)) |
| Kojto | 93:e188a91d3eaa | 394 | /** |
| Kojto | 93:e188a91d3eaa | 395 | * @} |
| Kojto | 93:e188a91d3eaa | 396 | */ |
| Kojto | 93:e188a91d3eaa | 397 | |
| Kojto | 93:e188a91d3eaa | 398 | /** @defgroup FMC_Extended_Mode |
| Kojto | 93:e188a91d3eaa | 399 | * @{ |
| Kojto | 93:e188a91d3eaa | 400 | */ |
| Kojto | 93:e188a91d3eaa | 401 | #define FMC_EXTENDED_MODE_DISABLE ((uint32_t)0x00000000) |
| Kojto | 93:e188a91d3eaa | 402 | #define FMC_EXTENDED_MODE_ENABLE ((uint32_t)0x00004000) |
| Kojto | 93:e188a91d3eaa | 403 | |
| Kojto | 93:e188a91d3eaa | 404 | #define IS_FMC_EXTENDED_MODE(MODE) (((MODE) == FMC_EXTENDED_MODE_DISABLE) || \ |
| Kojto | 93:e188a91d3eaa | 405 | ((MODE) == FMC_EXTENDED_MODE_ENABLE)) |
| Kojto | 93:e188a91d3eaa | 406 | /** |
| Kojto | 93:e188a91d3eaa | 407 | * @} |
| Kojto | 93:e188a91d3eaa | 408 | */ |
| Kojto | 93:e188a91d3eaa | 409 | |
| Kojto | 93:e188a91d3eaa | 410 | /** @defgroup FMC_AsynchronousWait |
| Kojto | 93:e188a91d3eaa | 411 | * @{ |
| Kojto | 93:e188a91d3eaa | 412 | */ |
| Kojto | 93:e188a91d3eaa | 413 | #define FMC_ASYNCHRONOUS_WAIT_DISABLE ((uint32_t)0x00000000) |
| Kojto | 93:e188a91d3eaa | 414 | #define FMC_ASYNCHRONOUS_WAIT_ENABLE ((uint32_t)0x00008000) |
| Kojto | 93:e188a91d3eaa | 415 | |
| Kojto | 93:e188a91d3eaa | 416 | #define IS_FMC_ASYNWAIT(STATE) (((STATE) == FMC_ASYNCHRONOUS_WAIT_DISABLE) || \ |
| Kojto | 93:e188a91d3eaa | 417 | ((STATE) == FMC_ASYNCHRONOUS_WAIT_ENABLE)) |
| Kojto | 93:e188a91d3eaa | 418 | /** |
| Kojto | 93:e188a91d3eaa | 419 | * @} |
| Kojto | 93:e188a91d3eaa | 420 | */ |
| Kojto | 93:e188a91d3eaa | 421 | |
| Kojto | 93:e188a91d3eaa | 422 | /** @defgroup FMC_Write_Burst |
| Kojto | 93:e188a91d3eaa | 423 | * @{ |
| Kojto | 93:e188a91d3eaa | 424 | */ |
| Kojto | 93:e188a91d3eaa | 425 | #define FMC_WRITE_BURST_DISABLE ((uint32_t)0x00000000) |
| Kojto | 93:e188a91d3eaa | 426 | #define FMC_WRITE_BURST_ENABLE ((uint32_t)0x00080000) |
| Kojto | 93:e188a91d3eaa | 427 | |
| Kojto | 93:e188a91d3eaa | 428 | #define IS_FMC_WRITE_BURST(BURST) (((BURST) == FMC_WRITE_BURST_DISABLE) || \ |
| Kojto | 93:e188a91d3eaa | 429 | ((BURST) == FMC_WRITE_BURST_ENABLE)) |
| Kojto | 93:e188a91d3eaa | 430 | /** |
| Kojto | 93:e188a91d3eaa | 431 | * @} |
| Kojto | 93:e188a91d3eaa | 432 | */ |
| Kojto | 93:e188a91d3eaa | 433 | |
| Kojto | 93:e188a91d3eaa | 434 | /** @defgroup FMC_Continous_Clock |
| Kojto | 93:e188a91d3eaa | 435 | * @{ |
| Kojto | 93:e188a91d3eaa | 436 | */ |
| Kojto | 93:e188a91d3eaa | 437 | #define FMC_CONTINUOUS_CLOCK_SYNC_ONLY ((uint32_t)0x00000000) |
| Kojto | 93:e188a91d3eaa | 438 | #define FMC_CONTINUOUS_CLOCK_SYNC_ASYNC ((uint32_t)0x00100000) |
| Kojto | 93:e188a91d3eaa | 439 | |
| Kojto | 93:e188a91d3eaa | 440 | #define IS_FMC_CONTINOUS_CLOCK(CCLOCK) (((CCLOCK) == FMC_CONTINUOUS_CLOCK_SYNC_ONLY) || \ |
| Kojto | 93:e188a91d3eaa | 441 | ((CCLOCK) == FMC_CONTINUOUS_CLOCK_SYNC_ASYNC)) |
| Kojto | 93:e188a91d3eaa | 442 | /** |
| Kojto | 93:e188a91d3eaa | 443 | * @} |
| Kojto | 93:e188a91d3eaa | 444 | */ |
| Kojto | 93:e188a91d3eaa | 445 | |
| Kojto | 93:e188a91d3eaa | 446 | /** @defgroup FMC_Address_Setup_Time |
| Kojto | 93:e188a91d3eaa | 447 | * @{ |
| Kojto | 93:e188a91d3eaa | 448 | */ |
| Kojto | 93:e188a91d3eaa | 449 | #define IS_FMC_ADDRESS_SETUP_TIME(TIME) ((TIME) <= 15) |
| Kojto | 93:e188a91d3eaa | 450 | /** |
| Kojto | 93:e188a91d3eaa | 451 | * @} |
| Kojto | 93:e188a91d3eaa | 452 | */ |
| Kojto | 93:e188a91d3eaa | 453 | |
| Kojto | 93:e188a91d3eaa | 454 | /** @defgroup FMC_Address_Hold_Time |
| Kojto | 93:e188a91d3eaa | 455 | * @{ |
| Kojto | 93:e188a91d3eaa | 456 | */ |
| Kojto | 93:e188a91d3eaa | 457 | #define IS_FMC_ADDRESS_HOLD_TIME(TIME) (((TIME) > 0) && ((TIME) <= 15)) |
| Kojto | 93:e188a91d3eaa | 458 | /** |
| Kojto | 93:e188a91d3eaa | 459 | * @} |
| Kojto | 93:e188a91d3eaa | 460 | */ |
| Kojto | 93:e188a91d3eaa | 461 | |
| Kojto | 93:e188a91d3eaa | 462 | /** @defgroup FMC_Data_Setup_Time |
| Kojto | 93:e188a91d3eaa | 463 | * @{ |
| Kojto | 93:e188a91d3eaa | 464 | */ |
| Kojto | 93:e188a91d3eaa | 465 | #define IS_FMC_DATASETUP_TIME(TIME) (((TIME) > 0) && ((TIME) <= 255)) |
| Kojto | 93:e188a91d3eaa | 466 | /** |
| Kojto | 93:e188a91d3eaa | 467 | * @} |
| Kojto | 93:e188a91d3eaa | 468 | */ |
| Kojto | 93:e188a91d3eaa | 469 | |
| Kojto | 93:e188a91d3eaa | 470 | /** @defgroup FMC_Bus_Turn_around_Duration |
| Kojto | 93:e188a91d3eaa | 471 | * @{ |
| Kojto | 93:e188a91d3eaa | 472 | */ |
| Kojto | 93:e188a91d3eaa | 473 | #define IS_FMC_TURNAROUND_TIME(TIME) ((TIME) <= 15) |
| Kojto | 93:e188a91d3eaa | 474 | /** |
| Kojto | 93:e188a91d3eaa | 475 | * @} |
| Kojto | 93:e188a91d3eaa | 476 | */ |
| Kojto | 93:e188a91d3eaa | 477 | |
| Kojto | 93:e188a91d3eaa | 478 | /** @defgroup FMC_CLK_Division |
| Kojto | 93:e188a91d3eaa | 479 | * @{ |
| Kojto | 93:e188a91d3eaa | 480 | */ |
| Kojto | 93:e188a91d3eaa | 481 | #define IS_FMC_CLK_DIV(DIV) (((DIV) > 1) && ((DIV) <= 16)) |
| Kojto | 93:e188a91d3eaa | 482 | /** |
| Kojto | 93:e188a91d3eaa | 483 | * @} |
| Kojto | 93:e188a91d3eaa | 484 | */ |
| Kojto | 93:e188a91d3eaa | 485 | |
| Kojto | 93:e188a91d3eaa | 486 | /** @defgroup FMC_Data_Latency |
| Kojto | 93:e188a91d3eaa | 487 | * @{ |
| Kojto | 93:e188a91d3eaa | 488 | */ |
| Kojto | 93:e188a91d3eaa | 489 | #define IS_FMC_DATA_LATENCY(LATENCY) (((LATENCY) > 1) && ((LATENCY) <= 17)) |
| Kojto | 93:e188a91d3eaa | 490 | /** |
| Kojto | 93:e188a91d3eaa | 491 | * @} |
| Kojto | 93:e188a91d3eaa | 492 | */ |
| Kojto | 93:e188a91d3eaa | 493 | |
| Kojto | 93:e188a91d3eaa | 494 | /** @defgroup FMC_Access_Mode |
| Kojto | 93:e188a91d3eaa | 495 | * @{ |
| Kojto | 93:e188a91d3eaa | 496 | */ |
| Kojto | 93:e188a91d3eaa | 497 | #define FMC_ACCESS_MODE_A ((uint32_t)0x00000000) |
| Kojto | 93:e188a91d3eaa | 498 | #define FMC_ACCESS_MODE_B ((uint32_t)0x10000000) |
| Kojto | 93:e188a91d3eaa | 499 | #define FMC_ACCESS_MODE_C ((uint32_t)0x20000000) |
| Kojto | 93:e188a91d3eaa | 500 | #define FMC_ACCESS_MODE_D ((uint32_t)0x30000000) |
| Kojto | 93:e188a91d3eaa | 501 | |
| Kojto | 93:e188a91d3eaa | 502 | #define IS_FMC_ACCESS_MODE(MODE) (((MODE) == FMC_ACCESS_MODE_A) || \ |
| Kojto | 93:e188a91d3eaa | 503 | ((MODE) == FMC_ACCESS_MODE_B) || \ |
| Kojto | 93:e188a91d3eaa | 504 | ((MODE) == FMC_ACCESS_MODE_C) || \ |
| Kojto | 93:e188a91d3eaa | 505 | ((MODE) == FMC_ACCESS_MODE_D)) |
| Kojto | 93:e188a91d3eaa | 506 | /** |
| Kojto | 93:e188a91d3eaa | 507 | * @} |
| Kojto | 93:e188a91d3eaa | 508 | */ |
| Kojto | 93:e188a91d3eaa | 509 | |
| Kojto | 93:e188a91d3eaa | 510 | /** |
| Kojto | 93:e188a91d3eaa | 511 | * @} |
| Kojto | 93:e188a91d3eaa | 512 | */ |
| Kojto | 93:e188a91d3eaa | 513 | |
| Kojto | 93:e188a91d3eaa | 514 | /** @defgroup FMC_NAND_Controller |
| Kojto | 93:e188a91d3eaa | 515 | * @{ |
| Kojto | 93:e188a91d3eaa | 516 | */ |
| Kojto | 93:e188a91d3eaa | 517 | |
| Kojto | 93:e188a91d3eaa | 518 | /** @defgroup FMC_NAND_Bank |
| Kojto | 93:e188a91d3eaa | 519 | * @{ |
| Kojto | 93:e188a91d3eaa | 520 | */ |
| Kojto | 93:e188a91d3eaa | 521 | #define FMC_NAND_BANK2 ((uint32_t)0x00000010) |
| Kojto | 93:e188a91d3eaa | 522 | #define FMC_NAND_BANK3 ((uint32_t)0x00000100) |
| Kojto | 93:e188a91d3eaa | 523 | |
| Kojto | 93:e188a91d3eaa | 524 | #define IS_FMC_NAND_BANK(BANK) (((BANK) == FMC_NAND_BANK2) || \ |
| Kojto | 93:e188a91d3eaa | 525 | ((BANK) == FMC_NAND_BANK3)) |
| Kojto | 93:e188a91d3eaa | 526 | /** |
| Kojto | 93:e188a91d3eaa | 527 | * @} |
| Kojto | 93:e188a91d3eaa | 528 | */ |
| Kojto | 93:e188a91d3eaa | 529 | |
| Kojto | 93:e188a91d3eaa | 530 | /** @defgroup FMC_Wait_feature |
| Kojto | 93:e188a91d3eaa | 531 | * @{ |
| Kojto | 93:e188a91d3eaa | 532 | */ |
| Kojto | 93:e188a91d3eaa | 533 | #define FMC_NAND_PCC_WAIT_FEATURE_DISABLE ((uint32_t)0x00000000) |
| Kojto | 93:e188a91d3eaa | 534 | #define FMC_NAND_PCC_WAIT_FEATURE_ENABLE ((uint32_t)0x00000002) |
| Kojto | 93:e188a91d3eaa | 535 | |
| Kojto | 93:e188a91d3eaa | 536 | #define IS_FMC_WAIT_FEATURE(FEATURE) (((FEATURE) == FMC_NAND_PCC_WAIT_FEATURE_DISABLE) || \ |
| Kojto | 93:e188a91d3eaa | 537 | ((FEATURE) == FMC_NAND_PCC_WAIT_FEATURE_ENABLE)) |
| Kojto | 93:e188a91d3eaa | 538 | /** |
| Kojto | 93:e188a91d3eaa | 539 | * @} |
| Kojto | 93:e188a91d3eaa | 540 | */ |
| Kojto | 93:e188a91d3eaa | 541 | |
| Kojto | 93:e188a91d3eaa | 542 | /** @defgroup FMC_PCR_Memory_Type |
| Kojto | 93:e188a91d3eaa | 543 | * @{ |
| Kojto | 93:e188a91d3eaa | 544 | */ |
| Kojto | 93:e188a91d3eaa | 545 | #define FMC_PCR_MEMORY_TYPE_PCCARD ((uint32_t)0x00000000) |
| Kojto | 93:e188a91d3eaa | 546 | #define FMC_PCR_MEMORY_TYPE_NAND ((uint32_t)0x00000008) |
| Kojto | 93:e188a91d3eaa | 547 | /** |
| Kojto | 93:e188a91d3eaa | 548 | * @} |
| Kojto | 93:e188a91d3eaa | 549 | */ |
| Kojto | 93:e188a91d3eaa | 550 | |
| Kojto | 93:e188a91d3eaa | 551 | /** @defgroup FMC_NAND_Data_Width |
| Kojto | 93:e188a91d3eaa | 552 | * @{ |
| Kojto | 93:e188a91d3eaa | 553 | */ |
| Kojto | 93:e188a91d3eaa | 554 | #define FMC_NAND_PCC_MEM_BUS_WIDTH_8 ((uint32_t)0x00000000) |
| Kojto | 93:e188a91d3eaa | 555 | #define FMC_NAND_PCC_MEM_BUS_WIDTH_16 ((uint32_t)0x00000010) |
| Kojto | 93:e188a91d3eaa | 556 | |
| Kojto | 93:e188a91d3eaa | 557 | #define IS_FMC_NAND_MEMORY_WIDTH(WIDTH) (((WIDTH) == FMC_NAND_PCC_MEM_BUS_WIDTH_8) || \ |
| Kojto | 93:e188a91d3eaa | 558 | ((WIDTH) == FMC_NAND_PCC_MEM_BUS_WIDTH_16)) |
| Kojto | 93:e188a91d3eaa | 559 | /** |
| Kojto | 93:e188a91d3eaa | 560 | * @} |
| Kojto | 93:e188a91d3eaa | 561 | */ |
| Kojto | 93:e188a91d3eaa | 562 | |
| Kojto | 93:e188a91d3eaa | 563 | /** @defgroup FMC_ECC |
| Kojto | 93:e188a91d3eaa | 564 | * @{ |
| Kojto | 93:e188a91d3eaa | 565 | */ |
| Kojto | 93:e188a91d3eaa | 566 | #define FMC_NAND_ECC_DISABLE ((uint32_t)0x00000000) |
| Kojto | 93:e188a91d3eaa | 567 | #define FMC_NAND_ECC_ENABLE ((uint32_t)0x00000040) |
| Kojto | 93:e188a91d3eaa | 568 | |
| Kojto | 93:e188a91d3eaa | 569 | #define IS_FMC_ECC_STATE(STATE) (((STATE) == FMC_NAND_ECC_DISABLE) || \ |
| Kojto | 93:e188a91d3eaa | 570 | ((STATE) == FMC_NAND_ECC_ENABLE)) |
| Kojto | 93:e188a91d3eaa | 571 | /** |
| Kojto | 93:e188a91d3eaa | 572 | * @} |
| Kojto | 93:e188a91d3eaa | 573 | */ |
| Kojto | 93:e188a91d3eaa | 574 | |
| Kojto | 93:e188a91d3eaa | 575 | /** @defgroup FMC_ECC_Page_Size |
| Kojto | 93:e188a91d3eaa | 576 | * @{ |
| Kojto | 93:e188a91d3eaa | 577 | */ |
| Kojto | 93:e188a91d3eaa | 578 | #define FMC_NAND_ECC_PAGE_SIZE_256BYTE ((uint32_t)0x00000000) |
| Kojto | 93:e188a91d3eaa | 579 | #define FMC_NAND_ECC_PAGE_SIZE_512BYTE ((uint32_t)0x00020000) |
| Kojto | 93:e188a91d3eaa | 580 | #define FMC_NAND_ECC_PAGE_SIZE_1024BYTE ((uint32_t)0x00040000) |
| Kojto | 93:e188a91d3eaa | 581 | #define FMC_NAND_ECC_PAGE_SIZE_2048BYTE ((uint32_t)0x00060000) |
| Kojto | 93:e188a91d3eaa | 582 | #define FMC_NAND_ECC_PAGE_SIZE_4096BYTE ((uint32_t)0x00080000) |
| Kojto | 93:e188a91d3eaa | 583 | #define FMC_NAND_ECC_PAGE_SIZE_8192BYTE ((uint32_t)0x000A0000) |
| Kojto | 93:e188a91d3eaa | 584 | |
| Kojto | 93:e188a91d3eaa | 585 | #define IS_FMC_ECCPAGE_SIZE(SIZE) (((SIZE) == FMC_NAND_ECC_PAGE_SIZE_256BYTE) || \ |
| Kojto | 93:e188a91d3eaa | 586 | ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_512BYTE) || \ |
| Kojto | 93:e188a91d3eaa | 587 | ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_1024BYTE) || \ |
| Kojto | 93:e188a91d3eaa | 588 | ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_2048BYTE) || \ |
| Kojto | 93:e188a91d3eaa | 589 | ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_4096BYTE) || \ |
| Kojto | 93:e188a91d3eaa | 590 | ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_8192BYTE)) |
| Kojto | 93:e188a91d3eaa | 591 | /** |
| Kojto | 93:e188a91d3eaa | 592 | * @} |
| Kojto | 93:e188a91d3eaa | 593 | */ |
| Kojto | 93:e188a91d3eaa | 594 | |
| Kojto | 93:e188a91d3eaa | 595 | /** @defgroup FMC_TCLR_Setup_Time |
| Kojto | 93:e188a91d3eaa | 596 | * @{ |
| Kojto | 93:e188a91d3eaa | 597 | */ |
| Kojto | 93:e188a91d3eaa | 598 | #define IS_FMC_TCLR_TIME(TIME) ((TIME) <= 255) |
| Kojto | 93:e188a91d3eaa | 599 | /** |
| Kojto | 93:e188a91d3eaa | 600 | * @} |
| Kojto | 93:e188a91d3eaa | 601 | */ |
| Kojto | 93:e188a91d3eaa | 602 | |
| Kojto | 93:e188a91d3eaa | 603 | /** @defgroup FMC_TAR_Setup_Time |
| Kojto | 93:e188a91d3eaa | 604 | * @{ |
| Kojto | 93:e188a91d3eaa | 605 | */ |
| Kojto | 93:e188a91d3eaa | 606 | #define IS_FMC_TAR_TIME(TIME) ((TIME) <= 255) |
| Kojto | 93:e188a91d3eaa | 607 | /** |
| Kojto | 93:e188a91d3eaa | 608 | * @} |
| Kojto | 93:e188a91d3eaa | 609 | */ |
| Kojto | 93:e188a91d3eaa | 610 | |
| Kojto | 93:e188a91d3eaa | 611 | /** @defgroup FMC_Setup_Time |
| Kojto | 93:e188a91d3eaa | 612 | * @{ |
| Kojto | 93:e188a91d3eaa | 613 | */ |
| Kojto | 93:e188a91d3eaa | 614 | #define IS_FMC_SETUP_TIME(TIME) ((TIME) <= 255) |
| Kojto | 93:e188a91d3eaa | 615 | /** |
| Kojto | 93:e188a91d3eaa | 616 | * @} |
| Kojto | 93:e188a91d3eaa | 617 | */ |
| Kojto | 93:e188a91d3eaa | 618 | |
| Kojto | 93:e188a91d3eaa | 619 | /** @defgroup FMC_Wait_Setup_Time |
| Kojto | 93:e188a91d3eaa | 620 | * @{ |
| Kojto | 93:e188a91d3eaa | 621 | */ |
| Kojto | 93:e188a91d3eaa | 622 | #define IS_FMC_WAIT_TIME(TIME) ((TIME) <= 255) |
| Kojto | 93:e188a91d3eaa | 623 | /** |
| Kojto | 93:e188a91d3eaa | 624 | * @} |
| Kojto | 93:e188a91d3eaa | 625 | */ |
| Kojto | 93:e188a91d3eaa | 626 | |
| Kojto | 93:e188a91d3eaa | 627 | /** @defgroup FMC_Hold_Setup_Time |
| Kojto | 93:e188a91d3eaa | 628 | * @{ |
| Kojto | 93:e188a91d3eaa | 629 | */ |
| Kojto | 93:e188a91d3eaa | 630 | #define IS_FMC_HOLD_TIME(TIME) ((TIME) <= 255) |
| Kojto | 93:e188a91d3eaa | 631 | /** |
| Kojto | 93:e188a91d3eaa | 632 | * @} |
| Kojto | 93:e188a91d3eaa | 633 | */ |
| Kojto | 93:e188a91d3eaa | 634 | |
| Kojto | 93:e188a91d3eaa | 635 | /** @defgroup FMC_HiZ_Setup_Time |
| Kojto | 93:e188a91d3eaa | 636 | * @{ |
| Kojto | 93:e188a91d3eaa | 637 | */ |
| Kojto | 93:e188a91d3eaa | 638 | #define IS_FMC_HIZ_TIME(TIME) ((TIME) <= 255) |
| Kojto | 93:e188a91d3eaa | 639 | /** |
| Kojto | 93:e188a91d3eaa | 640 | * @} |
| Kojto | 93:e188a91d3eaa | 641 | */ |
| Kojto | 93:e188a91d3eaa | 642 | |
| Kojto | 93:e188a91d3eaa | 643 | /** |
| Kojto | 93:e188a91d3eaa | 644 | * @} |
| Kojto | 93:e188a91d3eaa | 645 | */ |
| Kojto | 93:e188a91d3eaa | 646 | |
| Kojto | 93:e188a91d3eaa | 647 | /** @defgroup FMC_NORSRAM_Device_Instance |
| Kojto | 93:e188a91d3eaa | 648 | * @{ |
| Kojto | 93:e188a91d3eaa | 649 | */ |
| Kojto | 93:e188a91d3eaa | 650 | #define IS_FMC_NORSRAM_DEVICE(INSTANCE) ((INSTANCE) == FMC_NORSRAM_DEVICE) |
| Kojto | 93:e188a91d3eaa | 651 | /** |
| Kojto | 93:e188a91d3eaa | 652 | * @} |
| Kojto | 93:e188a91d3eaa | 653 | */ |
| Kojto | 93:e188a91d3eaa | 654 | |
| Kojto | 93:e188a91d3eaa | 655 | /** @defgroup FMC_NORSRAM_EXTENDED_Device_Instance |
| Kojto | 93:e188a91d3eaa | 656 | * @{ |
| Kojto | 93:e188a91d3eaa | 657 | */ |
| Kojto | 93:e188a91d3eaa | 658 | #define IS_FMC_NORSRAM_EXTENDED_DEVICE(INSTANCE) ((INSTANCE) == FMC_NORSRAM_EXTENDED_DEVICE) |
| Kojto | 93:e188a91d3eaa | 659 | /** |
| Kojto | 93:e188a91d3eaa | 660 | * @} |
| Kojto | 93:e188a91d3eaa | 661 | */ |
| Kojto | 93:e188a91d3eaa | 662 | |
| Kojto | 93:e188a91d3eaa | 663 | /** @defgroup FMC_NAND_Device_Instance |
| Kojto | 93:e188a91d3eaa | 664 | * @{ |
| Kojto | 93:e188a91d3eaa | 665 | */ |
| Kojto | 93:e188a91d3eaa | 666 | #define IS_FMC_NAND_DEVICE(INSTANCE) ((INSTANCE) == FMC_NAND_DEVICE) |
| Kojto | 93:e188a91d3eaa | 667 | /** |
| Kojto | 93:e188a91d3eaa | 668 | * @} |
| Kojto | 93:e188a91d3eaa | 669 | */ |
| Kojto | 93:e188a91d3eaa | 670 | |
| Kojto | 93:e188a91d3eaa | 671 | /** @defgroup FMC_PCCARD_Device_Instance |
| Kojto | 93:e188a91d3eaa | 672 | * @{ |
| Kojto | 93:e188a91d3eaa | 673 | */ |
| Kojto | 93:e188a91d3eaa | 674 | #define IS_FMC_PCCARD_DEVICE(INSTANCE) ((INSTANCE) == FMC_PCCARD_DEVICE) |
| Kojto | 93:e188a91d3eaa | 675 | |
| Kojto | 93:e188a91d3eaa | 676 | /** |
| Kojto | 93:e188a91d3eaa | 677 | * @} |
| Kojto | 93:e188a91d3eaa | 678 | */ |
| Kojto | 93:e188a91d3eaa | 679 | |
| Kojto | 93:e188a91d3eaa | 680 | /** @defgroup FMC_Interrupt_definition |
| Kojto | 93:e188a91d3eaa | 681 | * @brief FMC Interrupt definition |
| Kojto | 93:e188a91d3eaa | 682 | * @{ |
| Kojto | 93:e188a91d3eaa | 683 | */ |
| Kojto | 93:e188a91d3eaa | 684 | #define FMC_IT_RISING_EDGE ((uint32_t)0x00000008) |
| Kojto | 93:e188a91d3eaa | 685 | #define FMC_IT_LEVEL ((uint32_t)0x00000010) |
| Kojto | 93:e188a91d3eaa | 686 | #define FMC_IT_FALLING_EDGE ((uint32_t)0x00000020) |
| Kojto | 93:e188a91d3eaa | 687 | #define FMC_IT_REFRESH_ERROR ((uint32_t)0x00004000) |
| Kojto | 93:e188a91d3eaa | 688 | |
| Kojto | 93:e188a91d3eaa | 689 | #define IS_FMC_IT(IT) ((((IT) & (uint32_t)0xFFFFBFC7) == 0x00000000) && ((IT) != 0x00000000)) |
| Kojto | 93:e188a91d3eaa | 690 | |
| Kojto | 93:e188a91d3eaa | 691 | #define IS_FMC_GET_IT(IT) (((IT) == FMC_IT_RISING_EDGE) || \ |
| Kojto | 93:e188a91d3eaa | 692 | ((IT) == FMC_IT_LEVEL) || \ |
| Kojto | 93:e188a91d3eaa | 693 | ((IT) == FMC_IT_FALLING_EDGE) || \ |
| Kojto | 93:e188a91d3eaa | 694 | ((IT) == FMC_IT_REFRESH_ERROR)) |
| Kojto | 93:e188a91d3eaa | 695 | /** |
| Kojto | 93:e188a91d3eaa | 696 | * @} |
| Kojto | 93:e188a91d3eaa | 697 | */ |
| Kojto | 93:e188a91d3eaa | 698 | |
| Kojto | 93:e188a91d3eaa | 699 | /** @defgroup FMC_Flag_definition |
| Kojto | 93:e188a91d3eaa | 700 | * @brief FMC Flag definition |
| Kojto | 93:e188a91d3eaa | 701 | * @{ |
| Kojto | 93:e188a91d3eaa | 702 | */ |
| Kojto | 93:e188a91d3eaa | 703 | #define FMC_FLAG_RISING_EDGE ((uint32_t)0x00000001) |
| Kojto | 93:e188a91d3eaa | 704 | #define FMC_FLAG_LEVEL ((uint32_t)0x00000002) |
| Kojto | 93:e188a91d3eaa | 705 | #define FMC_FLAG_FALLING_EDGE ((uint32_t)0x00000004) |
| Kojto | 93:e188a91d3eaa | 706 | #define FMC_FLAG_FEMPT ((uint32_t)0x00000040) |
| Kojto | 93:e188a91d3eaa | 707 | |
| Kojto | 93:e188a91d3eaa | 708 | #define IS_FMC_GET_FLAG(FLAG) (((FLAG) == FMC_FLAG_RISING_EDGE) || \ |
| Kojto | 93:e188a91d3eaa | 709 | ((FLAG) == FMC_FLAG_LEVEL) || \ |
| Kojto | 93:e188a91d3eaa | 710 | ((FLAG) == FMC_FLAG_FALLING_EDGE) || \ |
| Kojto | 93:e188a91d3eaa | 711 | ((FLAG) == FMC_FLAG_FEMPT)) |
| Kojto | 93:e188a91d3eaa | 712 | |
| Kojto | 93:e188a91d3eaa | 713 | #define IS_FMC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFF8) == 0x00000000) && ((FLAG) != 0x00000000)) |
| Kojto | 93:e188a91d3eaa | 714 | /** |
| Kojto | 93:e188a91d3eaa | 715 | * @} |
| Kojto | 93:e188a91d3eaa | 716 | */ |
| Kojto | 93:e188a91d3eaa | 717 | |
| Kojto | 93:e188a91d3eaa | 718 | /* Exported macro ------------------------------------------------------------*/ |
| Kojto | 93:e188a91d3eaa | 719 | |
| Kojto | 93:e188a91d3eaa | 720 | /** @defgroup FMC_NOR_Macros |
| Kojto | 93:e188a91d3eaa | 721 | * @brief macros to handle NOR device enable/disable and read/write operations |
| Kojto | 93:e188a91d3eaa | 722 | * @{ |
| Kojto | 93:e188a91d3eaa | 723 | */ |
| Kojto | 93:e188a91d3eaa | 724 | |
| Kojto | 93:e188a91d3eaa | 725 | /** |
| Kojto | 93:e188a91d3eaa | 726 | * @brief Enable the NORSRAM device access. |
| Kojto | 93:e188a91d3eaa | 727 | * @param __INSTANCE__: FMC_NORSRAM Instance |
| Kojto | 93:e188a91d3eaa | 728 | * @param __BANK__: FMC_NORSRAM Bank |
| Kojto | 93:e188a91d3eaa | 729 | * @retval None |
| Kojto | 93:e188a91d3eaa | 730 | */ |
| Kojto | 93:e188a91d3eaa | 731 | #define __FMC_NORSRAM_ENABLE(__INSTANCE__, __BANK__) ((__INSTANCE__)->BTCR[(__BANK__)] |= FMC_BCR1_MBKEN) |
| Kojto | 93:e188a91d3eaa | 732 | |
| Kojto | 93:e188a91d3eaa | 733 | /** |
| Kojto | 93:e188a91d3eaa | 734 | * @brief Disable the NORSRAM device access. |
| Kojto | 93:e188a91d3eaa | 735 | * @param __INSTANCE__: FMC_NORSRAM Instance |
| Kojto | 93:e188a91d3eaa | 736 | * @param __BANK__: FMC_NORSRAM Bank |
| Kojto | 93:e188a91d3eaa | 737 | * @retval None |
| Kojto | 93:e188a91d3eaa | 738 | */ |
| Kojto | 93:e188a91d3eaa | 739 | #define __FMC_NORSRAM_DISABLE(__INSTANCE__, __BANK__) ((__INSTANCE__)->BTCR[(__BANK__)] &= ~FMC_BCR1_MBKEN) |
| Kojto | 93:e188a91d3eaa | 740 | |
| Kojto | 93:e188a91d3eaa | 741 | /** |
| Kojto | 93:e188a91d3eaa | 742 | * @} |
| Kojto | 93:e188a91d3eaa | 743 | */ |
| Kojto | 93:e188a91d3eaa | 744 | |
| Kojto | 93:e188a91d3eaa | 745 | /** @defgroup FMC_NAND_Macros |
| Kojto | 93:e188a91d3eaa | 746 | * @brief macros to handle NAND device enable/disable |
| Kojto | 93:e188a91d3eaa | 747 | * @{ |
| Kojto | 93:e188a91d3eaa | 748 | */ |
| Kojto | 93:e188a91d3eaa | 749 | |
| Kojto | 93:e188a91d3eaa | 750 | /** |
| Kojto | 93:e188a91d3eaa | 751 | * @brief Enable the NAND device access. |
| Kojto | 93:e188a91d3eaa | 752 | * @param __INSTANCE__: FMC_NAND Instance |
| Kojto | 93:e188a91d3eaa | 753 | * @param __BANK__: FMC_NAND Bank |
| Kojto | 93:e188a91d3eaa | 754 | * @retval None |
| Kojto | 93:e188a91d3eaa | 755 | */ |
| Kojto | 93:e188a91d3eaa | 756 | #define __FMC_NAND_ENABLE(__INSTANCE__, __BANK__) (((__BANK__) == FMC_NAND_BANK2)? ((__INSTANCE__)->PCR2 |= FMC_PCR2_PBKEN): \ |
| Kojto | 93:e188a91d3eaa | 757 | ((__INSTANCE__)->PCR3 |= FMC_PCR3_PBKEN)) |
| Kojto | 93:e188a91d3eaa | 758 | |
| Kojto | 93:e188a91d3eaa | 759 | /** |
| Kojto | 93:e188a91d3eaa | 760 | * @brief Disable the NAND device access. |
| Kojto | 93:e188a91d3eaa | 761 | * @param __INSTANCE__: FMC_NAND Instance |
| Kojto | 93:e188a91d3eaa | 762 | * @param __BANK__: FMC_NAND Bank |
| Kojto | 93:e188a91d3eaa | 763 | * @retval None |
| Kojto | 93:e188a91d3eaa | 764 | */ |
| Kojto | 93:e188a91d3eaa | 765 | #define __FMC_NAND_DISABLE(__INSTANCE__, __BANK__) (((__BANK__) == FMC_NAND_BANK2)? ((__INSTANCE__)->PCR2 &= ~FMC_PCR2_PBKEN): \ |
| Kojto | 93:e188a91d3eaa | 766 | ((__INSTANCE__)->PCR3 &= ~FMC_PCR3_PBKEN)) |
| Kojto | 93:e188a91d3eaa | 767 | /** |
| Kojto | 93:e188a91d3eaa | 768 | * @} |
| Kojto | 93:e188a91d3eaa | 769 | */ |
| Kojto | 93:e188a91d3eaa | 770 | |
| Kojto | 93:e188a91d3eaa | 771 | /** @defgroup FMC_PCCARD_Macros |
| Kojto | 93:e188a91d3eaa | 772 | * @brief macros to handle SRAM read/write operations |
| Kojto | 93:e188a91d3eaa | 773 | * @{ |
| Kojto | 93:e188a91d3eaa | 774 | */ |
| Kojto | 93:e188a91d3eaa | 775 | |
| Kojto | 93:e188a91d3eaa | 776 | /** |
| Kojto | 93:e188a91d3eaa | 777 | * @brief Enable the PCCARD device access. |
| Kojto | 93:e188a91d3eaa | 778 | * @param __INSTANCE__: FMC_PCCARD Instance |
| Kojto | 93:e188a91d3eaa | 779 | * @retval None |
| Kojto | 93:e188a91d3eaa | 780 | */ |
| Kojto | 93:e188a91d3eaa | 781 | #define __FMC_PCCARD_ENABLE(__INSTANCE__) ((__INSTANCE__)->PCR4 |= FMC_PCR4_PBKEN) |
| Kojto | 93:e188a91d3eaa | 782 | |
| Kojto | 93:e188a91d3eaa | 783 | /** |
| Kojto | 93:e188a91d3eaa | 784 | * @brief Disable the PCCARD device access. |
| Kojto | 93:e188a91d3eaa | 785 | * @param __INSTANCE__: FMC_PCCARD Instance |
| Kojto | 93:e188a91d3eaa | 786 | * @retval None |
| Kojto | 93:e188a91d3eaa | 787 | */ |
| Kojto | 93:e188a91d3eaa | 788 | #define __FMC_PCCARD_DISABLE(__INSTANCE__) ((__INSTANCE__)->PCR4 &= ~FMC_PCR4_PBKEN) |
| Kojto | 93:e188a91d3eaa | 789 | /** |
| Kojto | 93:e188a91d3eaa | 790 | * @} |
| Kojto | 93:e188a91d3eaa | 791 | */ |
| Kojto | 93:e188a91d3eaa | 792 | |
| Kojto | 93:e188a91d3eaa | 793 | /** @defgroup FMC_Interrupt |
| Kojto | 93:e188a91d3eaa | 794 | * @brief macros to handle FMC interrupts |
| Kojto | 93:e188a91d3eaa | 795 | * @{ |
| Kojto | 93:e188a91d3eaa | 796 | */ |
| Kojto | 93:e188a91d3eaa | 797 | |
| Kojto | 93:e188a91d3eaa | 798 | /** |
| Kojto | 93:e188a91d3eaa | 799 | * @brief Enable the NAND device interrupt. |
| Kojto | 93:e188a91d3eaa | 800 | * @param __INSTANCE__: FMC_NAND Instance |
| Kojto | 93:e188a91d3eaa | 801 | * @param __BANK__: FMC_NAND Bank |
| Kojto | 93:e188a91d3eaa | 802 | * @param __INTERRUPT__: FMC_NAND interrupt |
| Kojto | 93:e188a91d3eaa | 803 | * This parameter can be any combination of the following values: |
| Kojto | 93:e188a91d3eaa | 804 | * @arg FMC_IT_RISING_EDGE: Interrupt rising edge. |
| Kojto | 93:e188a91d3eaa | 805 | * @arg FMC_IT_LEVEL: Interrupt level. |
| Kojto | 93:e188a91d3eaa | 806 | * @arg FMC_IT_FALLING_EDGE: Interrupt falling edge. |
| Kojto | 93:e188a91d3eaa | 807 | * @retval None |
| Kojto | 93:e188a91d3eaa | 808 | */ |
| Kojto | 93:e188a91d3eaa | 809 | #define __FMC_NAND_ENABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) (((__BANK__) == FMC_NAND_BANK2)? ((__INSTANCE__)->SR2 |= (__INTERRUPT__)): \ |
| Kojto | 93:e188a91d3eaa | 810 | ((__INSTANCE__)->SR3 |= (__INTERRUPT__))) |
| Kojto | 93:e188a91d3eaa | 811 | |
| Kojto | 93:e188a91d3eaa | 812 | /** |
| Kojto | 93:e188a91d3eaa | 813 | * @brief Disable the NAND device interrupt. |
| Kojto | 93:e188a91d3eaa | 814 | * @param __INSTANCE__: FMC_NAND Instance |
| Kojto | 93:e188a91d3eaa | 815 | * @param __BANK__: FMC_NAND Bank |
| Kojto | 93:e188a91d3eaa | 816 | * @param __INTERRUPT__: FMC_NAND interrupt |
| Kojto | 93:e188a91d3eaa | 817 | * This parameter can be any combination of the following values: |
| Kojto | 93:e188a91d3eaa | 818 | * @arg FMC_IT_RISING_EDGE: Interrupt rising edge. |
| Kojto | 93:e188a91d3eaa | 819 | * @arg FMC_IT_LEVEL: Interrupt level. |
| Kojto | 93:e188a91d3eaa | 820 | * @arg FMC_IT_FALLING_EDGE: Interrupt falling edge. |
| Kojto | 93:e188a91d3eaa | 821 | * @retval None |
| Kojto | 93:e188a91d3eaa | 822 | */ |
| Kojto | 93:e188a91d3eaa | 823 | #define __FMC_NAND_DISABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) (((__BANK__) == FMC_NAND_BANK2)? ((__INSTANCE__)->SR2 &= ~(__INTERRUPT__)): \ |
| Kojto | 93:e188a91d3eaa | 824 | ((__INSTANCE__)->SR3 &= ~(__INTERRUPT__))) |
| Kojto | 93:e188a91d3eaa | 825 | |
| Kojto | 93:e188a91d3eaa | 826 | /** |
| Kojto | 93:e188a91d3eaa | 827 | * @brief Get flag status of the NAND device. |
| Kojto | 93:e188a91d3eaa | 828 | * @param __INSTANCE__: FMC_NAND Instance |
| Kojto | 93:e188a91d3eaa | 829 | * @param __BANK__: FMC_NAND Bank |
| Kojto | 93:e188a91d3eaa | 830 | * @param __FLAG__: FMC_NAND flag |
| Kojto | 93:e188a91d3eaa | 831 | * This parameter can be any combination of the following values: |
| Kojto | 93:e188a91d3eaa | 832 | * @arg FMC_FLAG_RISING_EDGE: Interrupt rising edge flag. |
| Kojto | 93:e188a91d3eaa | 833 | * @arg FMC_FLAG_LEVEL: Interrupt level edge flag. |
| Kojto | 93:e188a91d3eaa | 834 | * @arg FMC_FLAG_FALLING_EDGE: Interrupt falling edge flag. |
| Kojto | 93:e188a91d3eaa | 835 | * @arg FMC_FLAG_FEMPT: FIFO empty flag. |
| Kojto | 93:e188a91d3eaa | 836 | * @retval The state of FLAG (SET or RESET). |
| Kojto | 93:e188a91d3eaa | 837 | */ |
| Kojto | 93:e188a91d3eaa | 838 | #define __FMC_NAND_GET_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__BANK__) == FMC_NAND_BANK2)? (((__INSTANCE__)->SR2 &(__FLAG__)) == (__FLAG__)): \ |
| Kojto | 93:e188a91d3eaa | 839 | (((__INSTANCE__)->SR3 &(__FLAG__)) == (__FLAG__))) |
| Kojto | 93:e188a91d3eaa | 840 | /** |
| Kojto | 93:e188a91d3eaa | 841 | * @brief Clear flag status of the NAND device. |
| Kojto | 93:e188a91d3eaa | 842 | * @param __INSTANCE__: FMC_NAND Instance |
| Kojto | 93:e188a91d3eaa | 843 | * @param __BANK__: FMC_NAND Bank |
| Kojto | 93:e188a91d3eaa | 844 | * @param __FLAG__: FMC_NAND flag |
| Kojto | 93:e188a91d3eaa | 845 | * This parameter can be any combination of the following values: |
| Kojto | 93:e188a91d3eaa | 846 | * @arg FMC_FLAG_RISING_EDGE: Interrupt rising edge flag. |
| Kojto | 93:e188a91d3eaa | 847 | * @arg FMC_FLAG_LEVEL: Interrupt level edge flag. |
| Kojto | 93:e188a91d3eaa | 848 | * @arg FMC_FLAG_FALLING_EDGE: Interrupt falling edge flag. |
| Kojto | 93:e188a91d3eaa | 849 | * @arg FMC_FLAG_FEMPT: FIFO empty flag. |
| Kojto | 93:e188a91d3eaa | 850 | * @retval None |
| Kojto | 93:e188a91d3eaa | 851 | */ |
| Kojto | 93:e188a91d3eaa | 852 | #define __FMC_NAND_CLEAR_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__BANK__) == FMC_NAND_BANK2)? ((__INSTANCE__)->SR2 &= ~(__FLAG__)): \ |
| Kojto | 93:e188a91d3eaa | 853 | ((__INSTANCE__)->SR3 &= ~(__FLAG__))) |
| Kojto | 93:e188a91d3eaa | 854 | /** |
| Kojto | 93:e188a91d3eaa | 855 | * @brief Enable the PCCARD device interrupt. |
| Kojto | 93:e188a91d3eaa | 856 | * @param __INSTANCE__: FMC_PCCARD Instance |
| Kojto | 93:e188a91d3eaa | 857 | * @param __INTERRUPT__: FMC_PCCARD interrupt |
| Kojto | 93:e188a91d3eaa | 858 | * This parameter can be any combination of the following values: |
| Kojto | 93:e188a91d3eaa | 859 | * @arg FMC_IT_RISING_EDGE: Interrupt rising edge. |
| Kojto | 93:e188a91d3eaa | 860 | * @arg FMC_IT_LEVEL: Interrupt level. |
| Kojto | 93:e188a91d3eaa | 861 | * @arg FMC_IT_FALLING_EDGE: Interrupt falling edge. |
| Kojto | 93:e188a91d3eaa | 862 | * @retval None |
| Kojto | 93:e188a91d3eaa | 863 | */ |
| Kojto | 93:e188a91d3eaa | 864 | #define __FMC_PCCARD_ENABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->SR4 |= (__INTERRUPT__)) |
| Kojto | 93:e188a91d3eaa | 865 | |
| Kojto | 93:e188a91d3eaa | 866 | /** |
| Kojto | 93:e188a91d3eaa | 867 | * @brief Disable the PCCARD device interrupt. |
| Kojto | 93:e188a91d3eaa | 868 | * @param __INSTANCE__: FMC_PCCARD Instance |
| Kojto | 93:e188a91d3eaa | 869 | * @param __INTERRUPT__: FMC_PCCARD interrupt |
| Kojto | 93:e188a91d3eaa | 870 | * This parameter can be any combination of the following values: |
| Kojto | 93:e188a91d3eaa | 871 | * @arg FMC_IT_RISING_EDGE: Interrupt rising edge. |
| Kojto | 93:e188a91d3eaa | 872 | * @arg FMC_IT_LEVEL: Interrupt level. |
| Kojto | 93:e188a91d3eaa | 873 | * @arg FMC_IT_FALLING_EDGE: Interrupt falling edge. |
| Kojto | 93:e188a91d3eaa | 874 | * @retval None |
| Kojto | 93:e188a91d3eaa | 875 | */ |
| Kojto | 93:e188a91d3eaa | 876 | #define __FMC_PCCARD_DISABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->SR4 &= ~(__INTERRUPT__)) |
| Kojto | 93:e188a91d3eaa | 877 | |
| Kojto | 93:e188a91d3eaa | 878 | /** |
| Kojto | 93:e188a91d3eaa | 879 | * @brief Get flag status of the PCCARD device. |
| Kojto | 93:e188a91d3eaa | 880 | * @param __INSTANCE__: FMC_PCCARD Instance |
| Kojto | 93:e188a91d3eaa | 881 | * @param __FLAG__: FMC_PCCARD flag |
| Kojto | 93:e188a91d3eaa | 882 | * This parameter can be any combination of the following values: |
| Kojto | 93:e188a91d3eaa | 883 | * @arg FMC_FLAG_RISING_EDGE: Interrupt rising edge flag. |
| Kojto | 93:e188a91d3eaa | 884 | * @arg FMC_FLAG_LEVEL: Interrupt level edge flag. |
| Kojto | 93:e188a91d3eaa | 885 | * @arg FMC_FLAG_FALLING_EDGE: Interrupt falling edge flag. |
| Kojto | 93:e188a91d3eaa | 886 | * @arg FMC_FLAG_FEMPT: FIFO empty flag. |
| Kojto | 93:e188a91d3eaa | 887 | * @retval The state of FLAG (SET or RESET). |
| Kojto | 93:e188a91d3eaa | 888 | */ |
| Kojto | 93:e188a91d3eaa | 889 | #define __FMC_PCCARD_GET_FLAG(__INSTANCE__, __FLAG__) (((__INSTANCE__)->SR4 &(__FLAG__)) == (__FLAG__)) |
| Kojto | 93:e188a91d3eaa | 890 | |
| Kojto | 93:e188a91d3eaa | 891 | /** |
| Kojto | 93:e188a91d3eaa | 892 | * @brief Clear flag status of the PCCARD device. |
| Kojto | 93:e188a91d3eaa | 893 | * @param __INSTANCE__: FMC_PCCARD Instance |
| Kojto | 93:e188a91d3eaa | 894 | * @param __FLAG__: FMC_PCCARD flag |
| Kojto | 93:e188a91d3eaa | 895 | * This parameter can be any combination of the following values: |
| Kojto | 93:e188a91d3eaa | 896 | * @arg FMC_FLAG_RISING_EDGE: Interrupt rising edge flag. |
| Kojto | 93:e188a91d3eaa | 897 | * @arg FMC_FLAG_LEVEL: Interrupt level edge flag. |
| Kojto | 93:e188a91d3eaa | 898 | * @arg FMC_FLAG_FALLING_EDGE: Interrupt falling edge flag. |
| Kojto | 93:e188a91d3eaa | 899 | * @arg FMC_FLAG_FEMPT: FIFO empty flag. |
| Kojto | 93:e188a91d3eaa | 900 | * @retval None |
| Kojto | 93:e188a91d3eaa | 901 | */ |
| Kojto | 93:e188a91d3eaa | 902 | #define __FMC_PCCARD_CLEAR_FLAG(__INSTANCE__, __FLAG__) ((__INSTANCE__)->SR4 &= ~(__FLAG__)) |
| Kojto | 93:e188a91d3eaa | 903 | |
| Kojto | 93:e188a91d3eaa | 904 | /** |
| Kojto | 93:e188a91d3eaa | 905 | * @} |
| Kojto | 93:e188a91d3eaa | 906 | */ |
| Kojto | 93:e188a91d3eaa | 907 | |
| Kojto | 93:e188a91d3eaa | 908 | /* Exported functions --------------------------------------------------------*/ |
| Kojto | 93:e188a91d3eaa | 909 | |
| Kojto | 93:e188a91d3eaa | 910 | /* FMC_NORSRAM Controller functions *******************************************/ |
| Kojto | 93:e188a91d3eaa | 911 | /* Initialization/de-initialization functions */ |
| Kojto | 93:e188a91d3eaa | 912 | HAL_StatusTypeDef FMC_NORSRAM_Init(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_InitTypeDef *Init); |
| Kojto | 93:e188a91d3eaa | 913 | HAL_StatusTypeDef FMC_NORSRAM_Timing_Init(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank); |
| Kojto | 93:e188a91d3eaa | 914 | HAL_StatusTypeDef FMC_NORSRAM_Extended_Timing_Init(FMC_NORSRAM_EXTENDED_TypeDef *Device, FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, uint32_t ExtendedMode); |
| Kojto | 93:e188a91d3eaa | 915 | HAL_StatusTypeDef FMC_NORSRAM_DeInit(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank); |
| Kojto | 93:e188a91d3eaa | 916 | |
| Kojto | 93:e188a91d3eaa | 917 | /* FMC_NORSRAM Control functions */ |
| Kojto | 93:e188a91d3eaa | 918 | HAL_StatusTypeDef FMC_NORSRAM_WriteOperation_Enable(FMC_NORSRAM_TypeDef *Device, uint32_t Bank); |
| Kojto | 93:e188a91d3eaa | 919 | HAL_StatusTypeDef FMC_NORSRAM_WriteOperation_Disable(FMC_NORSRAM_TypeDef *Device, uint32_t Bank); |
| Kojto | 93:e188a91d3eaa | 920 | |
| Kojto | 93:e188a91d3eaa | 921 | /* FMC_NAND Controller functions **********************************************/ |
| Kojto | 93:e188a91d3eaa | 922 | /* Initialization/de-initialization functions */ |
| Kojto | 93:e188a91d3eaa | 923 | HAL_StatusTypeDef FMC_NAND_Init(FMC_NAND_TypeDef *Device, FMC_NAND_InitTypeDef *Init); |
| Kojto | 93:e188a91d3eaa | 924 | HAL_StatusTypeDef FMC_NAND_CommonSpace_Timing_Init(FMC_NAND_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank); |
| Kojto | 93:e188a91d3eaa | 925 | HAL_StatusTypeDef FMC_NAND_AttributeSpace_Timing_Init(FMC_NAND_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank); |
| Kojto | 93:e188a91d3eaa | 926 | HAL_StatusTypeDef FMC_NAND_DeInit(FMC_NAND_TypeDef *Device, uint32_t Bank); |
| Kojto | 93:e188a91d3eaa | 927 | |
| Kojto | 93:e188a91d3eaa | 928 | /* FMC_NAND Control functions */ |
| Kojto | 93:e188a91d3eaa | 929 | HAL_StatusTypeDef FMC_NAND_ECC_Enable(FMC_NAND_TypeDef *Device, uint32_t Bank); |
| Kojto | 93:e188a91d3eaa | 930 | HAL_StatusTypeDef FMC_NAND_ECC_Disable(FMC_NAND_TypeDef *Device, uint32_t Bank); |
| Kojto | 93:e188a91d3eaa | 931 | HAL_StatusTypeDef FMC_NAND_GetECC(FMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, uint32_t Timeout); |
| Kojto | 93:e188a91d3eaa | 932 | |
| Kojto | 93:e188a91d3eaa | 933 | /* FMC_PCCARD Controller functions ********************************************/ |
| Kojto | 93:e188a91d3eaa | 934 | /* Initialization/de-initialization functions */ |
| Kojto | 93:e188a91d3eaa | 935 | HAL_StatusTypeDef FMC_PCCARD_Init(FMC_PCCARD_TypeDef *Device, FMC_PCCARD_InitTypeDef *Init); |
| Kojto | 93:e188a91d3eaa | 936 | HAL_StatusTypeDef FMC_PCCARD_CommonSpace_Timing_Init(FMC_PCCARD_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing); |
| Kojto | 93:e188a91d3eaa | 937 | HAL_StatusTypeDef FMC_PCCARD_AttributeSpace_Timing_Init(FMC_PCCARD_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing); |
| Kojto | 93:e188a91d3eaa | 938 | HAL_StatusTypeDef FMC_PCCARD_IOSpace_Timing_Init(FMC_PCCARD_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing); |
| Kojto | 93:e188a91d3eaa | 939 | HAL_StatusTypeDef FMC_PCCARD_DeInit(FMC_PCCARD_TypeDef *Device); |
| Kojto | 93:e188a91d3eaa | 940 | |
| Kojto | 93:e188a91d3eaa | 941 | #endif /* STM32F302xE || STM32F303xE || STM32F398xx */ |
| Kojto | 93:e188a91d3eaa | 942 | /** |
| Kojto | 93:e188a91d3eaa | 943 | * @} |
| Kojto | 93:e188a91d3eaa | 944 | */ |
| Kojto | 93:e188a91d3eaa | 945 | |
| Kojto | 93:e188a91d3eaa | 946 | /** |
| Kojto | 93:e188a91d3eaa | 947 | * @} |
| Kojto | 93:e188a91d3eaa | 948 | */ |
| Kojto | 93:e188a91d3eaa | 949 | |
| Kojto | 93:e188a91d3eaa | 950 | #ifdef __cplusplus |
| Kojto | 93:e188a91d3eaa | 951 | } |
| Kojto | 93:e188a91d3eaa | 952 | #endif |
| Kojto | 93:e188a91d3eaa | 953 | |
| Kojto | 93:e188a91d3eaa | 954 | #endif /* __STM32F3xx_LL_FMC_H */ |
| Kojto | 93:e188a91d3eaa | 955 | |
| Kojto | 93:e188a91d3eaa | 956 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |