mbed(SerialHalfDuplex入り)
Fork of mbed by
TARGET_NUCLEO_F303RE/stm32f3xx_hal_pwr.h@93:e188a91d3eaa, 2015-02-03 (annotated)
- Committer:
- Kojto
- Date:
- Tue Feb 03 15:31:20 2015 +0000
- Revision:
- 93:e188a91d3eaa
Release 93 of the mbed library
Main changes:
- Renesas RZ_A1H bugfixes - i2c, ticker
- new targets - Nucleo F303RE, Nucleo F070RB, BLE SMURFS,
Dragonfly 411RE,
- BusXXX - is connected method, plus operators addition
- LPC8xx - I2c fixes
- timestamp_t reverted to uint32_t
- RTX - fixes regarding stack (alignment, magic word)
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Kojto | 93:e188a91d3eaa | 1 | /** |
Kojto | 93:e188a91d3eaa | 2 | ****************************************************************************** |
Kojto | 93:e188a91d3eaa | 3 | * @file stm32f3xx_hal_pwr.h |
Kojto | 93:e188a91d3eaa | 4 | * @author MCD Application Team |
Kojto | 93:e188a91d3eaa | 5 | * @version V1.1.0 |
Kojto | 93:e188a91d3eaa | 6 | * @date 12-Sept-2014 |
Kojto | 93:e188a91d3eaa | 7 | * @brief Header file of PWR HAL module. |
Kojto | 93:e188a91d3eaa | 8 | ****************************************************************************** |
Kojto | 93:e188a91d3eaa | 9 | * @attention |
Kojto | 93:e188a91d3eaa | 10 | * |
Kojto | 93:e188a91d3eaa | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
Kojto | 93:e188a91d3eaa | 12 | * |
Kojto | 93:e188a91d3eaa | 13 | * Redistribution and use in source and binary forms, with or without modification, |
Kojto | 93:e188a91d3eaa | 14 | * are permitted provided that the following conditions are met: |
Kojto | 93:e188a91d3eaa | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
Kojto | 93:e188a91d3eaa | 16 | * this list of conditions and the following disclaimer. |
Kojto | 93:e188a91d3eaa | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
Kojto | 93:e188a91d3eaa | 18 | * this list of conditions and the following disclaimer in the documentation |
Kojto | 93:e188a91d3eaa | 19 | * and/or other materials provided with the distribution. |
Kojto | 93:e188a91d3eaa | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
Kojto | 93:e188a91d3eaa | 21 | * may be used to endorse or promote products derived from this software |
Kojto | 93:e188a91d3eaa | 22 | * without specific prior written permission. |
Kojto | 93:e188a91d3eaa | 23 | * |
Kojto | 93:e188a91d3eaa | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
Kojto | 93:e188a91d3eaa | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
Kojto | 93:e188a91d3eaa | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
Kojto | 93:e188a91d3eaa | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
Kojto | 93:e188a91d3eaa | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
Kojto | 93:e188a91d3eaa | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
Kojto | 93:e188a91d3eaa | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
Kojto | 93:e188a91d3eaa | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
Kojto | 93:e188a91d3eaa | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
Kojto | 93:e188a91d3eaa | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Kojto | 93:e188a91d3eaa | 34 | * |
Kojto | 93:e188a91d3eaa | 35 | ****************************************************************************** |
Kojto | 93:e188a91d3eaa | 36 | */ |
Kojto | 93:e188a91d3eaa | 37 | |
Kojto | 93:e188a91d3eaa | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
Kojto | 93:e188a91d3eaa | 39 | #ifndef __STM32F3xx_HAL_PWR_H |
Kojto | 93:e188a91d3eaa | 40 | #define __STM32F3xx_HAL_PWR_H |
Kojto | 93:e188a91d3eaa | 41 | |
Kojto | 93:e188a91d3eaa | 42 | #ifdef __cplusplus |
Kojto | 93:e188a91d3eaa | 43 | extern "C" { |
Kojto | 93:e188a91d3eaa | 44 | #endif |
Kojto | 93:e188a91d3eaa | 45 | |
Kojto | 93:e188a91d3eaa | 46 | /* Includes ------------------------------------------------------------------*/ |
Kojto | 93:e188a91d3eaa | 47 | #include "stm32f3xx_hal_def.h" |
Kojto | 93:e188a91d3eaa | 48 | |
Kojto | 93:e188a91d3eaa | 49 | /** @addtogroup STM32F3xx_HAL_Driver |
Kojto | 93:e188a91d3eaa | 50 | * @{ |
Kojto | 93:e188a91d3eaa | 51 | */ |
Kojto | 93:e188a91d3eaa | 52 | |
Kojto | 93:e188a91d3eaa | 53 | /** @addtogroup PWR PWR HAL Driver module |
Kojto | 93:e188a91d3eaa | 54 | * @{ |
Kojto | 93:e188a91d3eaa | 55 | */ |
Kojto | 93:e188a91d3eaa | 56 | |
Kojto | 93:e188a91d3eaa | 57 | /* Exported types ------------------------------------------------------------*/ |
Kojto | 93:e188a91d3eaa | 58 | /* Exported constants --------------------------------------------------------*/ |
Kojto | 93:e188a91d3eaa | 59 | /** @defgroup PWR_Alias_Exported_Constants PWR Alias Exported Constants |
Kojto | 93:e188a91d3eaa | 60 | * @{ |
Kojto | 93:e188a91d3eaa | 61 | */ |
Kojto | 93:e188a91d3eaa | 62 | /* ------------- PWR registers bit address in the alias region ---------------*/ |
Kojto | 93:e188a91d3eaa | 63 | #define PWR_OFFSET (PWR_BASE - PERIPH_BASE) |
Kojto | 93:e188a91d3eaa | 64 | |
Kojto | 93:e188a91d3eaa | 65 | /* --- CR Register ---*/ |
Kojto | 93:e188a91d3eaa | 66 | #define CR_OFFSET (PWR_OFFSET + 0x00) |
Kojto | 93:e188a91d3eaa | 67 | /* Alias word address of DBP bit */ |
Kojto | 93:e188a91d3eaa | 68 | #define DBP_BitNumber POSITION_VAL(PWR_CR_DBP) |
Kojto | 93:e188a91d3eaa | 69 | #define CR_DBP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4)) |
Kojto | 93:e188a91d3eaa | 70 | |
Kojto | 93:e188a91d3eaa | 71 | /* Alias word address of PVDE bit */ |
Kojto | 93:e188a91d3eaa | 72 | #define PVDE_BitNumber POSITION_VAL(PWR_CR_PVDE) |
Kojto | 93:e188a91d3eaa | 73 | #define CR_PVDE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4)) |
Kojto | 93:e188a91d3eaa | 74 | |
Kojto | 93:e188a91d3eaa | 75 | /* --- CSR Register ---*/ |
Kojto | 93:e188a91d3eaa | 76 | #define CSR_OFFSET (PWR_OFFSET + 0x04) |
Kojto | 93:e188a91d3eaa | 77 | /* Alias word address of EWUP1 bit */ |
Kojto | 93:e188a91d3eaa | 78 | #define EWUP1_BitNumber POSITION_VAL(PWR_CSR_EWUP1) |
Kojto | 93:e188a91d3eaa | 79 | #define CSR_EWUP1_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP1_BitNumber * 4)) |
Kojto | 93:e188a91d3eaa | 80 | |
Kojto | 93:e188a91d3eaa | 81 | /* Alias word address of EWUP2 bit */ |
Kojto | 93:e188a91d3eaa | 82 | #define EWUP2_BitNumber POSITION_VAL(PWR_CSR_EWUP2) |
Kojto | 93:e188a91d3eaa | 83 | #define CSR_EWUP2_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP2_BitNumber * 4)) |
Kojto | 93:e188a91d3eaa | 84 | |
Kojto | 93:e188a91d3eaa | 85 | /* Alias word address of EWUP3 bit */ |
Kojto | 93:e188a91d3eaa | 86 | #define EWUP3_BitNumber POSITION_VAL(PWR_CSR_EWUP3) |
Kojto | 93:e188a91d3eaa | 87 | #define CSR_EWUP3_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP3_BitNumber * 4)) |
Kojto | 93:e188a91d3eaa | 88 | /** |
Kojto | 93:e188a91d3eaa | 89 | * @} |
Kojto | 93:e188a91d3eaa | 90 | */ |
Kojto | 93:e188a91d3eaa | 91 | |
Kojto | 93:e188a91d3eaa | 92 | /** @defgroup PWR_Exported_Constants PWR Exported Constants |
Kojto | 93:e188a91d3eaa | 93 | * @{ |
Kojto | 93:e188a91d3eaa | 94 | */ |
Kojto | 93:e188a91d3eaa | 95 | |
Kojto | 93:e188a91d3eaa | 96 | /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins |
Kojto | 93:e188a91d3eaa | 97 | * @{ |
Kojto | 93:e188a91d3eaa | 98 | */ |
Kojto | 93:e188a91d3eaa | 99 | |
Kojto | 93:e188a91d3eaa | 100 | #define PWR_WAKEUP_PIN1 ((uint32_t)0x00) |
Kojto | 93:e188a91d3eaa | 101 | #define PWR_WAKEUP_PIN2 ((uint32_t)0x01) |
Kojto | 93:e188a91d3eaa | 102 | #define PWR_WAKEUP_PIN3 ((uint32_t)0x02) |
Kojto | 93:e188a91d3eaa | 103 | #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \ |
Kojto | 93:e188a91d3eaa | 104 | ((PIN) == PWR_WAKEUP_PIN2) || \ |
Kojto | 93:e188a91d3eaa | 105 | ((PIN) == PWR_WAKEUP_PIN3)) |
Kojto | 93:e188a91d3eaa | 106 | /** |
Kojto | 93:e188a91d3eaa | 107 | * @} |
Kojto | 93:e188a91d3eaa | 108 | */ |
Kojto | 93:e188a91d3eaa | 109 | |
Kojto | 93:e188a91d3eaa | 110 | /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in STOP mode |
Kojto | 93:e188a91d3eaa | 111 | * @{ |
Kojto | 93:e188a91d3eaa | 112 | */ |
Kojto | 93:e188a91d3eaa | 113 | #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000) |
Kojto | 93:e188a91d3eaa | 114 | #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS |
Kojto | 93:e188a91d3eaa | 115 | |
Kojto | 93:e188a91d3eaa | 116 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ |
Kojto | 93:e188a91d3eaa | 117 | ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) |
Kojto | 93:e188a91d3eaa | 118 | /** |
Kojto | 93:e188a91d3eaa | 119 | * @} |
Kojto | 93:e188a91d3eaa | 120 | */ |
Kojto | 93:e188a91d3eaa | 121 | |
Kojto | 93:e188a91d3eaa | 122 | /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry |
Kojto | 93:e188a91d3eaa | 123 | * @{ |
Kojto | 93:e188a91d3eaa | 124 | */ |
Kojto | 93:e188a91d3eaa | 125 | #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) |
Kojto | 93:e188a91d3eaa | 126 | #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) |
Kojto | 93:e188a91d3eaa | 127 | #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) |
Kojto | 93:e188a91d3eaa | 128 | /** |
Kojto | 93:e188a91d3eaa | 129 | * @} |
Kojto | 93:e188a91d3eaa | 130 | */ |
Kojto | 93:e188a91d3eaa | 131 | |
Kojto | 93:e188a91d3eaa | 132 | /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry |
Kojto | 93:e188a91d3eaa | 133 | * @{ |
Kojto | 93:e188a91d3eaa | 134 | */ |
Kojto | 93:e188a91d3eaa | 135 | #define PWR_STOPENTRY_WFI ((uint8_t)0x01) |
Kojto | 93:e188a91d3eaa | 136 | #define PWR_STOPENTRY_WFE ((uint8_t)0x02) |
Kojto | 93:e188a91d3eaa | 137 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE)) |
Kojto | 93:e188a91d3eaa | 138 | /** |
Kojto | 93:e188a91d3eaa | 139 | * @} |
Kojto | 93:e188a91d3eaa | 140 | */ |
Kojto | 93:e188a91d3eaa | 141 | |
Kojto | 93:e188a91d3eaa | 142 | /** @defgroup PWR_Flag PWR Flag |
Kojto | 93:e188a91d3eaa | 143 | * @{ |
Kojto | 93:e188a91d3eaa | 144 | */ |
Kojto | 93:e188a91d3eaa | 145 | #define PWR_FLAG_WU PWR_CSR_WUF |
Kojto | 93:e188a91d3eaa | 146 | #define PWR_FLAG_SB PWR_CSR_SBF |
Kojto | 93:e188a91d3eaa | 147 | #define PWR_FLAG_PVDO PWR_CSR_PVDO |
Kojto | 93:e188a91d3eaa | 148 | #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF |
Kojto | 93:e188a91d3eaa | 149 | #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \ |
Kojto | 93:e188a91d3eaa | 150 | ((FLAG) == PWR_FLAG_PVDO) || ((FLAG) == PWR_FLAG_VREFINTRDY)) |
Kojto | 93:e188a91d3eaa | 151 | |
Kojto | 93:e188a91d3eaa | 152 | |
Kojto | 93:e188a91d3eaa | 153 | /** |
Kojto | 93:e188a91d3eaa | 154 | * @} |
Kojto | 93:e188a91d3eaa | 155 | */ |
Kojto | 93:e188a91d3eaa | 156 | |
Kojto | 93:e188a91d3eaa | 157 | /** |
Kojto | 93:e188a91d3eaa | 158 | * @} |
Kojto | 93:e188a91d3eaa | 159 | */ |
Kojto | 93:e188a91d3eaa | 160 | |
Kojto | 93:e188a91d3eaa | 161 | /* Exported macro ------------------------------------------------------------*/ |
Kojto | 93:e188a91d3eaa | 162 | /** @defgroup PWR_Exported_Macro PWR Exported Macro |
Kojto | 93:e188a91d3eaa | 163 | * @{ |
Kojto | 93:e188a91d3eaa | 164 | */ |
Kojto | 93:e188a91d3eaa | 165 | |
Kojto | 93:e188a91d3eaa | 166 | /** @brief Check PWR flag is set or not. |
Kojto | 93:e188a91d3eaa | 167 | * @param __FLAG__: specifies the flag to check. |
Kojto | 93:e188a91d3eaa | 168 | * This parameter can be one of the following values: |
Kojto | 93:e188a91d3eaa | 169 | * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event |
Kojto | 93:e188a91d3eaa | 170 | * was received from the WKUP pin or from the RTC alarm (Alarm A |
Kojto | 93:e188a91d3eaa | 171 | * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup. |
Kojto | 93:e188a91d3eaa | 172 | * An additional wakeup event is detected if the WKUP pin is enabled |
Kojto | 93:e188a91d3eaa | 173 | * (by setting the EWUP bit) when the WKUP pin level is already high. |
Kojto | 93:e188a91d3eaa | 174 | * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was |
Kojto | 93:e188a91d3eaa | 175 | * resumed from StandBy mode. |
Kojto | 93:e188a91d3eaa | 176 | * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled |
Kojto | 93:e188a91d3eaa | 177 | * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode |
Kojto | 93:e188a91d3eaa | 178 | * For this reason, this bit is equal to 0 after Standby or reset |
Kojto | 93:e188a91d3eaa | 179 | * until the PVDE bit is set. |
Kojto | 93:e188a91d3eaa | 180 | * @arg PWR_FLAG_VREFINTRDY: This flag indicates that the internal reference |
Kojto | 93:e188a91d3eaa | 181 | * voltage VREFINT is ready. |
Kojto | 93:e188a91d3eaa | 182 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
Kojto | 93:e188a91d3eaa | 183 | */ |
Kojto | 93:e188a91d3eaa | 184 | #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__)) |
Kojto | 93:e188a91d3eaa | 185 | |
Kojto | 93:e188a91d3eaa | 186 | /** @brief Clear the PWR's pending flags. |
Kojto | 93:e188a91d3eaa | 187 | * @param __FLAG__: specifies the flag to clear. |
Kojto | 93:e188a91d3eaa | 188 | * This parameter can be one of the following values: |
Kojto | 93:e188a91d3eaa | 189 | * @arg PWR_FLAG_WU: Wake Up flag |
Kojto | 93:e188a91d3eaa | 190 | * @arg PWR_FLAG_SB: StandBy flag |
Kojto | 93:e188a91d3eaa | 191 | */ |
Kojto | 93:e188a91d3eaa | 192 | #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2) |
Kojto | 93:e188a91d3eaa | 193 | |
Kojto | 93:e188a91d3eaa | 194 | /** |
Kojto | 93:e188a91d3eaa | 195 | * @} |
Kojto | 93:e188a91d3eaa | 196 | */ |
Kojto | 93:e188a91d3eaa | 197 | |
Kojto | 93:e188a91d3eaa | 198 | /* Include PWR HAL Extended module */ |
Kojto | 93:e188a91d3eaa | 199 | #include "stm32f3xx_hal_pwr_ex.h" |
Kojto | 93:e188a91d3eaa | 200 | |
Kojto | 93:e188a91d3eaa | 201 | /* Exported functions --------------------------------------------------------*/ |
Kojto | 93:e188a91d3eaa | 202 | |
Kojto | 93:e188a91d3eaa | 203 | /** @addtogroup PWR_Exported_Functions PWR Exported Functions |
Kojto | 93:e188a91d3eaa | 204 | * @{ |
Kojto | 93:e188a91d3eaa | 205 | */ |
Kojto | 93:e188a91d3eaa | 206 | |
Kojto | 93:e188a91d3eaa | 207 | /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions |
Kojto | 93:e188a91d3eaa | 208 | * @{ |
Kojto | 93:e188a91d3eaa | 209 | */ |
Kojto | 93:e188a91d3eaa | 210 | |
Kojto | 93:e188a91d3eaa | 211 | /* Initialization and de-initialization functions *****************************/ |
Kojto | 93:e188a91d3eaa | 212 | void HAL_PWR_DeInit(void); |
Kojto | 93:e188a91d3eaa | 213 | |
Kojto | 93:e188a91d3eaa | 214 | /** |
Kojto | 93:e188a91d3eaa | 215 | * @} |
Kojto | 93:e188a91d3eaa | 216 | */ |
Kojto | 93:e188a91d3eaa | 217 | |
Kojto | 93:e188a91d3eaa | 218 | /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions |
Kojto | 93:e188a91d3eaa | 219 | * @{ |
Kojto | 93:e188a91d3eaa | 220 | */ |
Kojto | 93:e188a91d3eaa | 221 | |
Kojto | 93:e188a91d3eaa | 222 | /* Peripheral Control functions **********************************************/ |
Kojto | 93:e188a91d3eaa | 223 | void HAL_PWR_EnableBkUpAccess(void); |
Kojto | 93:e188a91d3eaa | 224 | void HAL_PWR_DisableBkUpAccess(void); |
Kojto | 93:e188a91d3eaa | 225 | |
Kojto | 93:e188a91d3eaa | 226 | /* WakeUp pins configuration functions ****************************************/ |
Kojto | 93:e188a91d3eaa | 227 | void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx); |
Kojto | 93:e188a91d3eaa | 228 | void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); |
Kojto | 93:e188a91d3eaa | 229 | |
Kojto | 93:e188a91d3eaa | 230 | /* Low Power modes configuration functions ************************************/ |
Kojto | 93:e188a91d3eaa | 231 | void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); |
Kojto | 93:e188a91d3eaa | 232 | void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); |
Kojto | 93:e188a91d3eaa | 233 | void HAL_PWR_EnterSTANDBYMode(void); |
Kojto | 93:e188a91d3eaa | 234 | |
Kojto | 93:e188a91d3eaa | 235 | /** |
Kojto | 93:e188a91d3eaa | 236 | * @} |
Kojto | 93:e188a91d3eaa | 237 | */ |
Kojto | 93:e188a91d3eaa | 238 | |
Kojto | 93:e188a91d3eaa | 239 | /** |
Kojto | 93:e188a91d3eaa | 240 | * @} |
Kojto | 93:e188a91d3eaa | 241 | */ |
Kojto | 93:e188a91d3eaa | 242 | |
Kojto | 93:e188a91d3eaa | 243 | /** |
Kojto | 93:e188a91d3eaa | 244 | * @} |
Kojto | 93:e188a91d3eaa | 245 | */ |
Kojto | 93:e188a91d3eaa | 246 | |
Kojto | 93:e188a91d3eaa | 247 | /** |
Kojto | 93:e188a91d3eaa | 248 | * @} |
Kojto | 93:e188a91d3eaa | 249 | */ |
Kojto | 93:e188a91d3eaa | 250 | |
Kojto | 93:e188a91d3eaa | 251 | #ifdef __cplusplus |
Kojto | 93:e188a91d3eaa | 252 | } |
Kojto | 93:e188a91d3eaa | 253 | #endif |
Kojto | 93:e188a91d3eaa | 254 | |
Kojto | 93:e188a91d3eaa | 255 | |
Kojto | 93:e188a91d3eaa | 256 | #endif /* __STM32F3xx_HAL_PWR_H */ |
Kojto | 93:e188a91d3eaa | 257 | |
Kojto | 93:e188a91d3eaa | 258 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |