雄介 太田 / mbed

mbed(SerialHalfDuplex入り)

Fork of mbed by mbed official

SPI.h@63:b3110cd2dd17, 2013-05-08 (annotated)

Committer:
samux
Date:
Wed May 08 14:50:20 2013 +0100
Revision:
63:b3110cd2dd17
Parent:
59:0883845fe643
Child:
65:5798e58a58b1
spi slave and i2c slave support

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 44:24d45a770a51 1 /* mbed Microcontroller Library
emilmont 54:71b101360fb9 2 * Copyright (c) 2006-2013 ARM Limited
emilmont 44:24d45a770a51 3 *
emilmont 59:0883845fe643 4 * Licensed under the Apache License, Version 2.0 (the "License");
emilmont 59:0883845fe643 5 * you may not use this file except in compliance with the License.
emilmont 59:0883845fe643 6 * You may obtain a copy of the License at
emilmont 59:0883845fe643 7 *
emilmont 59:0883845fe643 8 * http://www.apache.org/licenses/LICENSE-2.0
emilmont 44:24d45a770a51 9 *
emilmont 59:0883845fe643 10 * Unless required by applicable law or agreed to in writing, software
emilmont 59:0883845fe643 11 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 59:0883845fe643 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 59:0883845fe643 13 * See the License for the specific language governing permissions and
emilmont 59:0883845fe643 14 * limitations under the License.
emilmont 44:24d45a770a51 15 */
emilmont 44:24d45a770a51 16 #ifndef MBED_SPI_H
emilmont 44:24d45a770a51 17 #define MBED_SPI_H
emilmont 44:24d45a770a51 18
emilmont 44:24d45a770a51 19 #include "platform.h"
emilmont 44:24d45a770a51 20
emilmont 44:24d45a770a51 21 #if DEVICE_SPI
emilmont 44:24d45a770a51 22
emilmont 44:24d45a770a51 23 #include "spi_api.h"
emilmont 44:24d45a770a51 24
emilmont 44:24d45a770a51 25 namespace mbed {
emilmont 44:24d45a770a51 26
emilmont 44:24d45a770a51 27 /** A SPI Master, used for communicating with SPI slave devices
emilmont 44:24d45a770a51 28 *
emilmont 44:24d45a770a51 29 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
emilmont 44:24d45a770a51 30 *
emilmont 44:24d45a770a51 31 * Most SPI devices will also require Chip Select and Reset signals. These
emilmont 44:24d45a770a51 32 * can be controlled using <DigitalOut> pins
emilmont 44:24d45a770a51 33 *
emilmont 44:24d45a770a51 34 * Example:
emilmont 44:24d45a770a51 35 * @code
emilmont 44:24d45a770a51 36 * // Send a byte to a SPI slave, and record the response
emilmont 44:24d45a770a51 37 *
emilmont 44:24d45a770a51 38 * #include "mbed.h"
emilmont 44:24d45a770a51 39 *
emilmont 44:24d45a770a51 40 * SPI device(p5, p6, p7); // mosi, miso, sclk
emilmont 44:24d45a770a51 41 *
emilmont 44:24d45a770a51 42 * int main() {
emilmont 44:24d45a770a51 43 * int response = device.write(0xFF);
emilmont 44:24d45a770a51 44 * }
emilmont 44:24d45a770a51 45 * @endcode
emilmont 44:24d45a770a51 46 */
emilmont 44:24d45a770a51 47 class SPI {
emilmont 44:24d45a770a51 48
emilmont 44:24d45a770a51 49 public:
emilmont 44:24d45a770a51 50
emilmont 44:24d45a770a51 51 /** Create a SPI master connected to the specified pins
emilmont 44:24d45a770a51 52 *
emilmont 44:24d45a770a51 53 * Pin Options:
emilmont 44:24d45a770a51 54 * (5, 6, 7) or (11, 12, 13)
emilmont 44:24d45a770a51 55 *
emilmont 44:24d45a770a51 56 * mosi or miso can be specfied as NC if not used
emilmont 44:24d45a770a51 57 *
emilmont 44:24d45a770a51 58 * @param mosi SPI Master Out, Slave In pin
emilmont 44:24d45a770a51 59 * @param miso SPI Master In, Slave Out pin
emilmont 44:24d45a770a51 60 * @param sclk SPI Clock pin
emilmont 44:24d45a770a51 61 */
emilmont 44:24d45a770a51 62 SPI(PinName mosi, PinName miso, PinName sclk);
emilmont 44:24d45a770a51 63
emilmont 44:24d45a770a51 64 /** Configure the data transmission format
emilmont 44:24d45a770a51 65 *
emilmont 44:24d45a770a51 66 * @param bits Number of bits per SPI frame (4 - 16)
emilmont 44:24d45a770a51 67 * @param mode Clock polarity and phase mode (0 - 3)
emilmont 44:24d45a770a51 68 *
emilmont 44:24d45a770a51 69 * @code
emilmont 55:d722ed6a4237 70 * mode | POL PHA
emilmont 55:d722ed6a4237 71 * -----+--------
emilmont 55:d722ed6a4237 72 * 0 | 0 0
emilmont 44:24d45a770a51 73 * 1 | 0 1
emilmont 55:d722ed6a4237 74 * 2 | 1 0
emilmont 44:24d45a770a51 75 * 3 | 1 1
emilmont 44:24d45a770a51 76 * @endcode
emilmont 44:24d45a770a51 77 */
emilmont 44:24d45a770a51 78 void format(int bits, int mode = 0);
emilmont 44:24d45a770a51 79
emilmont 44:24d45a770a51 80 /** Set the spi bus clock frequency
emilmont 44:24d45a770a51 81 *
emilmont 44:24d45a770a51 82 * @param hz SCLK frequency in hz (default = 1MHz)
emilmont 44:24d45a770a51 83 */
emilmont 44:24d45a770a51 84 void frequency(int hz = 1000000);
emilmont 44:24d45a770a51 85
emilmont 44:24d45a770a51 86 /** Write to the SPI Slave and return the response
emilmont 44:24d45a770a51 87 *
emilmont 44:24d45a770a51 88 * @param value Data to be sent to the SPI slave
emilmont 44:24d45a770a51 89 *
emilmont 44:24d45a770a51 90 * @returns
emilmont 44:24d45a770a51 91 * Response from the SPI slave
emilmont 44:24d45a770a51 92 */
emilmont 44:24d45a770a51 93 virtual int write(int value);
emilmont 44:24d45a770a51 94
emilmont 44:24d45a770a51 95 protected:
emilmont 44:24d45a770a51 96 spi_t _spi;
emilmont 55:d722ed6a4237 97
emilmont 44:24d45a770a51 98 void aquire(void);
emilmont 44:24d45a770a51 99 static SPI *_owner;
emilmont 44:24d45a770a51 100 int _bits;
emilmont 44:24d45a770a51 101 int _mode;
emilmont 44:24d45a770a51 102 int _hz;
emilmont 44:24d45a770a51 103 };
emilmont 44:24d45a770a51 104
emilmont 44:24d45a770a51 105 } // namespace mbed
emilmont 44:24d45a770a51 106
emilmont 44:24d45a770a51 107 #endif
emilmont 44:24d45a770a51 108
emilmont 44:24d45a770a51 109 #endif