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LPC11U24/GCC_ARM/system_LPC11Uxx.h@27:7110ebee3484, 2011-11-29 (annotated)

Committer:
emilmont
Date:
Tue Nov 29 14:59:27 2011 +0000
Revision:
27:7110ebee3484
New Libraries 11.11

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 27:7110ebee3484 1 /**************************************************************************//**
emilmont 27:7110ebee3484 2 * @file system_LPC11Uxx.h
emilmont 27:7110ebee3484 3 * @brief CMSIS Cortex-M0 Device Peripheral Access Layer Header File
emilmont 27:7110ebee3484 4 * for the NXP LPC11Uxx Device Series
emilmont 27:7110ebee3484 5 * @version V1.10
emilmont 27:7110ebee3484 6 * @date 24. November 2010
emilmont 27:7110ebee3484 7 *
emilmont 27:7110ebee3484 8 * @note
emilmont 27:7110ebee3484 9 * Copyright (C) 2009-2010 ARM Limited. All rights reserved.
emilmont 27:7110ebee3484 10 *
emilmont 27:7110ebee3484 11 * @par
emilmont 27:7110ebee3484 12 * ARM Limited (ARM) is supplying this software for use with Cortex-M
emilmont 27:7110ebee3484 13 * processor based microcontrollers. This file can be freely distributed
emilmont 27:7110ebee3484 14 * within development tools that are supporting such ARM based processors.
emilmont 27:7110ebee3484 15 *
emilmont 27:7110ebee3484 16 * @par
emilmont 27:7110ebee3484 17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
emilmont 27:7110ebee3484 18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
emilmont 27:7110ebee3484 19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
emilmont 27:7110ebee3484 20 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
emilmont 27:7110ebee3484 21 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
emilmont 27:7110ebee3484 22 *
emilmont 27:7110ebee3484 23 ******************************************************************************/
emilmont 27:7110ebee3484 24
emilmont 27:7110ebee3484 25
emilmont 27:7110ebee3484 26 #ifndef __SYSTEM_LPC11Uxx_H
emilmont 27:7110ebee3484 27 #define __SYSTEM_LPC11Uxx_H
emilmont 27:7110ebee3484 28
emilmont 27:7110ebee3484 29 #ifdef __cplusplus
emilmont 27:7110ebee3484 30 extern "C" {
emilmont 27:7110ebee3484 31 #endif
emilmont 27:7110ebee3484 32
emilmont 27:7110ebee3484 33 #include <stdint.h>
emilmont 27:7110ebee3484 34
emilmont 27:7110ebee3484 35 extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
emilmont 27:7110ebee3484 36
emilmont 27:7110ebee3484 37
emilmont 27:7110ebee3484 38 /**
emilmont 27:7110ebee3484 39 * Initialize the system
emilmont 27:7110ebee3484 40 *
emilmont 27:7110ebee3484 41 * @param none
emilmont 27:7110ebee3484 42 * @return none
emilmont 27:7110ebee3484 43 *
emilmont 27:7110ebee3484 44 * @brief Setup the microcontroller system.
emilmont 27:7110ebee3484 45 * Initialize the System and update the SystemCoreClock variable.
emilmont 27:7110ebee3484 46 */
emilmont 27:7110ebee3484 47 extern void SystemInit (void);
emilmont 27:7110ebee3484 48
emilmont 27:7110ebee3484 49 /**
emilmont 27:7110ebee3484 50 * Update SystemCoreClock variable
emilmont 27:7110ebee3484 51 *
emilmont 27:7110ebee3484 52 * @param none
emilmont 27:7110ebee3484 53 * @return none
emilmont 27:7110ebee3484 54 *
emilmont 27:7110ebee3484 55 * @brief Updates the SystemCoreClock with current core Clock
emilmont 27:7110ebee3484 56 * retrieved from cpu registers.
emilmont 27:7110ebee3484 57 */
emilmont 27:7110ebee3484 58 extern void SystemCoreClockUpdate (void);
emilmont 27:7110ebee3484 59
emilmont 27:7110ebee3484 60 #ifdef __cplusplus
emilmont 27:7110ebee3484 61 }
emilmont 27:7110ebee3484 62 #endif
emilmont 27:7110ebee3484 63
emilmont 27:7110ebee3484 64 #endif /* __SYSTEM_LPC11Uxx_H */