雄介 太田 / mbed

mbed(SerialHalfDuplex入り)

Fork of mbed by mbed official

TARGET_ARCH_MAX/stm32f4xx_hal_nand.h@89:552587b429a1, 2014-09-12 (annotated)

Committer:
bogdanm
Date:
Fri Sep 12 16:41:52 2014 +0100
Revision:
89:552587b429a1
Child:
92:4fc01daae5a5
Release 89 of the mbed library



Main changes:



- low power optimizations for Nordic targets

- code structure changes for Freescale K64F targets

- bug fixes in various backends

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 89:552587b429a1 1 /**
bogdanm 89:552587b429a1 2 ******************************************************************************
bogdanm 89:552587b429a1 3 * @file stm32f4xx_hal_nand.h
bogdanm 89:552587b429a1 4 * @author MCD Application Team
bogdanm 89:552587b429a1 5 * @version V1.1.0RC2
bogdanm 89:552587b429a1 6 * @date 14-May-2014
bogdanm 89:552587b429a1 7 * @brief Header file of NAND HAL module.
bogdanm 89:552587b429a1 8 ******************************************************************************
bogdanm 89:552587b429a1 9 * @attention
bogdanm 89:552587b429a1 10 *
bogdanm 89:552587b429a1 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 89:552587b429a1 12 *
bogdanm 89:552587b429a1 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 89:552587b429a1 14 * are permitted provided that the following conditions are met:
bogdanm 89:552587b429a1 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 89:552587b429a1 16 * this list of conditions and the following disclaimer.
bogdanm 89:552587b429a1 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 89:552587b429a1 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 89:552587b429a1 19 * and/or other materials provided with the distribution.
bogdanm 89:552587b429a1 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 89:552587b429a1 21 * may be used to endorse or promote products derived from this software
bogdanm 89:552587b429a1 22 * without specific prior written permission.
bogdanm 89:552587b429a1 23 *
bogdanm 89:552587b429a1 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 89:552587b429a1 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 89:552587b429a1 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 89:552587b429a1 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 89:552587b429a1 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 89:552587b429a1 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 89:552587b429a1 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 89:552587b429a1 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 89:552587b429a1 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 89:552587b429a1 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 89:552587b429a1 34 *
bogdanm 89:552587b429a1 35 ******************************************************************************
bogdanm 89:552587b429a1 36 */
bogdanm 89:552587b429a1 37
bogdanm 89:552587b429a1 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 89:552587b429a1 39 #ifndef __STM32F4xx_HAL_NAND_H
bogdanm 89:552587b429a1 40 #define __STM32F4xx_HAL_NAND_H
bogdanm 89:552587b429a1 41
bogdanm 89:552587b429a1 42 #ifdef __cplusplus
bogdanm 89:552587b429a1 43 extern "C" {
bogdanm 89:552587b429a1 44 #endif
bogdanm 89:552587b429a1 45
bogdanm 89:552587b429a1 46 /* Includes ------------------------------------------------------------------*/
bogdanm 89:552587b429a1 47 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
bogdanm 89:552587b429a1 48 #include "stm32f4xx_ll_fsmc.h"
bogdanm 89:552587b429a1 49 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
bogdanm 89:552587b429a1 50
bogdanm 89:552587b429a1 51 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
bogdanm 89:552587b429a1 52 #include "stm32f4xx_ll_fmc.h"
bogdanm 89:552587b429a1 53 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
bogdanm 89:552587b429a1 54
bogdanm 89:552587b429a1 55 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 89:552587b429a1 56 * @{
bogdanm 89:552587b429a1 57 */
bogdanm 89:552587b429a1 58
bogdanm 89:552587b429a1 59 /** @addtogroup NAND
bogdanm 89:552587b429a1 60 * @{
bogdanm 89:552587b429a1 61 */
bogdanm 89:552587b429a1 62
bogdanm 89:552587b429a1 63 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
bogdanm 89:552587b429a1 64
bogdanm 89:552587b429a1 65 /* Exported typedef ----------------------------------------------------------*/
bogdanm 89:552587b429a1 66 /* Exported types ------------------------------------------------------------*/
bogdanm 89:552587b429a1 67
bogdanm 89:552587b429a1 68 /**
bogdanm 89:552587b429a1 69 * @brief HAL NAND State structures definition
bogdanm 89:552587b429a1 70 */
bogdanm 89:552587b429a1 71 typedef enum
bogdanm 89:552587b429a1 72 {
bogdanm 89:552587b429a1 73 HAL_NAND_STATE_RESET = 0x00, /*!< NAND not yet initialized or disabled */
bogdanm 89:552587b429a1 74 HAL_NAND_STATE_READY = 0x01, /*!< NAND initialized and ready for use */
bogdanm 89:552587b429a1 75 HAL_NAND_STATE_BUSY = 0x02, /*!< NAND internal process is ongoing */
bogdanm 89:552587b429a1 76 HAL_NAND_STATE_ERROR = 0x03 /*!< NAND error state */
bogdanm 89:552587b429a1 77 }HAL_NAND_StateTypeDef;
bogdanm 89:552587b429a1 78
bogdanm 89:552587b429a1 79 /**
bogdanm 89:552587b429a1 80 * @brief NAND Memory electronic signature Structure definition
bogdanm 89:552587b429a1 81 */
bogdanm 89:552587b429a1 82 typedef struct
bogdanm 89:552587b429a1 83 {
bogdanm 89:552587b429a1 84 /*<! NAND memory electronic signature maker and device IDs */
bogdanm 89:552587b429a1 85
bogdanm 89:552587b429a1 86 uint8_t Maker_Id;
bogdanm 89:552587b429a1 87
bogdanm 89:552587b429a1 88 uint8_t Device_Id;
bogdanm 89:552587b429a1 89
bogdanm 89:552587b429a1 90 uint8_t Third_Id;
bogdanm 89:552587b429a1 91
bogdanm 89:552587b429a1 92 uint8_t Fourth_Id;
bogdanm 89:552587b429a1 93 }NAND_IDTypeDef;
bogdanm 89:552587b429a1 94
bogdanm 89:552587b429a1 95 /**
bogdanm 89:552587b429a1 96 * @brief NAND Memory address Structure definition
bogdanm 89:552587b429a1 97 */
bogdanm 89:552587b429a1 98 typedef struct
bogdanm 89:552587b429a1 99 {
bogdanm 89:552587b429a1 100 uint16_t Page; /*!< NAND memory Page address */
bogdanm 89:552587b429a1 101
bogdanm 89:552587b429a1 102 uint16_t Zone; /*!< NAND memory Zone address */
bogdanm 89:552587b429a1 103
bogdanm 89:552587b429a1 104 uint16_t Block; /*!< NAND memory Block address */
bogdanm 89:552587b429a1 105
bogdanm 89:552587b429a1 106 }NAND_AddressTypedef;
bogdanm 89:552587b429a1 107
bogdanm 89:552587b429a1 108 /**
bogdanm 89:552587b429a1 109 * @brief NAND Memory info Structure definition
bogdanm 89:552587b429a1 110 */
bogdanm 89:552587b429a1 111 typedef struct
bogdanm 89:552587b429a1 112 {
bogdanm 89:552587b429a1 113 uint32_t PageSize; /*!< NAND memory page (without spare area) size measured in K. bytes */
bogdanm 89:552587b429a1 114
bogdanm 89:552587b429a1 115 uint32_t SpareAreaSize; /*!< NAND memory spare area size measured in K. bytes */
bogdanm 89:552587b429a1 116
bogdanm 89:552587b429a1 117 uint32_t BlockSize; /*!< NAND memory block size number of pages */
bogdanm 89:552587b429a1 118
bogdanm 89:552587b429a1 119 uint32_t BlockNbr; /*!< NAND memory number of blocks */
bogdanm 89:552587b429a1 120
bogdanm 89:552587b429a1 121 uint32_t ZoneSize; /*!< NAND memory zone size measured in number of blocks */
bogdanm 89:552587b429a1 122 }NAND_InfoTypeDef;
bogdanm 89:552587b429a1 123
bogdanm 89:552587b429a1 124 /**
bogdanm 89:552587b429a1 125 * @brief NAND handle Structure definition
bogdanm 89:552587b429a1 126 */
bogdanm 89:552587b429a1 127 typedef struct
bogdanm 89:552587b429a1 128 {
bogdanm 89:552587b429a1 129 FMC_NAND_TypeDef *Instance; /*!< Register base address */
bogdanm 89:552587b429a1 130
bogdanm 89:552587b429a1 131 FMC_NAND_InitTypeDef Init; /*!< NAND device control configuration parameters */
bogdanm 89:552587b429a1 132
bogdanm 89:552587b429a1 133 HAL_LockTypeDef Lock; /*!< NAND locking object */
bogdanm 89:552587b429a1 134
bogdanm 89:552587b429a1 135 __IO HAL_NAND_StateTypeDef State; /*!< NAND device access state */
bogdanm 89:552587b429a1 136
bogdanm 89:552587b429a1 137 NAND_InfoTypeDef Info; /*!< NAND characteristic information structure */
bogdanm 89:552587b429a1 138 }NAND_HandleTypeDef;
bogdanm 89:552587b429a1 139
bogdanm 89:552587b429a1 140
bogdanm 89:552587b429a1 141 /* Exported constants --------------------------------------------------------*/
bogdanm 89:552587b429a1 142 /** @defgroup NAND_Exported_Constants
bogdanm 89:552587b429a1 143 * @{
bogdanm 89:552587b429a1 144 */
bogdanm 89:552587b429a1 145 #define NAND_DEVICE1 ((uint32_t)0x70000000)
bogdanm 89:552587b429a1 146 #define NAND_DEVICE2 ((uint32_t)0x80000000)
bogdanm 89:552587b429a1 147 #define NAND_WRITE_TIMEOUT ((uint32_t)0x01000000)
bogdanm 89:552587b429a1 148
bogdanm 89:552587b429a1 149 #define CMD_AREA ((uint32_t)(1<<16)) /* A16 = CLE high */
bogdanm 89:552587b429a1 150 #define ADDR_AREA ((uint32_t)(1<<17)) /* A17 = ALE high */
bogdanm 89:552587b429a1 151
bogdanm 89:552587b429a1 152 #define NAND_CMD_AREA_A ((uint8_t)0x00)
bogdanm 89:552587b429a1 153 #define NAND_CMD_AREA_B ((uint8_t)0x01)
bogdanm 89:552587b429a1 154 #define NAND_CMD_AREA_C ((uint8_t)0x50)
bogdanm 89:552587b429a1 155
bogdanm 89:552587b429a1 156 /* NAND memory status */
bogdanm 89:552587b429a1 157 #define NAND_VALID_ADDRESS ((uint32_t)0x00000100)
bogdanm 89:552587b429a1 158 #define NAND_INVALID_ADDRESS ((uint32_t)0x00000200)
bogdanm 89:552587b429a1 159 #define NAND_TIMEOUT_ERROR ((uint32_t)0x00000400)
bogdanm 89:552587b429a1 160 #define NAND_BUSY ((uint32_t)0x00000000)
bogdanm 89:552587b429a1 161 #define NAND_ERROR ((uint32_t)0x00000001)
bogdanm 89:552587b429a1 162 #define NAND_READY ((uint32_t)0x00000040)
bogdanm 89:552587b429a1 163
bogdanm 89:552587b429a1 164 /**
bogdanm 89:552587b429a1 165 * @}
bogdanm 89:552587b429a1 166 */
bogdanm 89:552587b429a1 167
bogdanm 89:552587b429a1 168 /* Exported macro ------------------------------------------------------------*/
bogdanm 89:552587b429a1 169
bogdanm 89:552587b429a1 170 /** @brief Reset NAND handle state
bogdanm 89:552587b429a1 171 * @param __HANDLE__: specifies the NAND handle.
bogdanm 89:552587b429a1 172 * @retval None
bogdanm 89:552587b429a1 173 */
bogdanm 89:552587b429a1 174 #define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET)
bogdanm 89:552587b429a1 175
bogdanm 89:552587b429a1 176 /**
bogdanm 89:552587b429a1 177 * @brief NAND memory address computation.
bogdanm 89:552587b429a1 178 * @param __ADDRESS__: NAND memory address.
bogdanm 89:552587b429a1 179 * @param __HANDLE__ : NAND handle.
bogdanm 89:552587b429a1 180 * @retval NAND Raw address value
bogdanm 89:552587b429a1 181 */
bogdanm 89:552587b429a1 182 #define ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) ((__ADDRESS__)->Page + (((__ADDRESS__)->Block + (((__ADDRESS__)->Zone) * ((__HANDLE__)->Info.BlockSize)))* ((__HANDLE__)->Info.ZoneSize)))
bogdanm 89:552587b429a1 183
bogdanm 89:552587b429a1 184 /**
bogdanm 89:552587b429a1 185 * @brief NAND memory address cycling.
bogdanm 89:552587b429a1 186 * @param __ADDRESS__: NAND memory address.
bogdanm 89:552587b429a1 187 * @retval NAND address cycling value.
bogdanm 89:552587b429a1 188 */
bogdanm 89:552587b429a1 189 #define ADDR_1st_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__)& 0xFF) /* 1st addressing cycle */
bogdanm 89:552587b429a1 190 #define ADDR_2nd_CYCLE(__ADDRESS__) (uint8_t)(((__ADDRESS__)& 0xFF00) >> 8) /* 2nd addressing cycle */
bogdanm 89:552587b429a1 191 #define ADDR_3rd_CYCLE(__ADDRESS__) (uint8_t)(((__ADDRESS__)& 0xFF0000) >> 16) /* 3rd addressing cycle */
bogdanm 89:552587b429a1 192 #define ADDR_4th_CYCLE(__ADDRESS__) (uint8_t)(((__ADDRESS__)& 0xFF000000) >> 24) /* 4th addressing cycle */
bogdanm 89:552587b429a1 193
bogdanm 89:552587b429a1 194 /* Exported functions --------------------------------------------------------*/
bogdanm 89:552587b429a1 195
bogdanm 89:552587b429a1 196 /* Initialization/de-initialization functions ********************************/
bogdanm 89:552587b429a1 197 HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing);
bogdanm 89:552587b429a1 198 HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand);
bogdanm 89:552587b429a1 199 void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand);
bogdanm 89:552587b429a1 200 void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand);
bogdanm 89:552587b429a1 201 void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand);
bogdanm 89:552587b429a1 202 void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand);
bogdanm 89:552587b429a1 203
bogdanm 89:552587b429a1 204 /* IO operation functions ****************************************************/
bogdanm 89:552587b429a1 205 HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID);
bogdanm 89:552587b429a1 206 HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand);
bogdanm 89:552587b429a1 207 HAL_StatusTypeDef HAL_NAND_Read_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead);
bogdanm 89:552587b429a1 208 HAL_StatusTypeDef HAL_NAND_Write_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite);
bogdanm 89:552587b429a1 209 HAL_StatusTypeDef HAL_NAND_Read_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead);
bogdanm 89:552587b429a1 210 HAL_StatusTypeDef HAL_NAND_Write_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite);
bogdanm 89:552587b429a1 211 HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress);
bogdanm 89:552587b429a1 212 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
bogdanm 89:552587b429a1 213 uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress);
bogdanm 89:552587b429a1 214
bogdanm 89:552587b429a1 215 /* NAND Control functions ****************************************************/
bogdanm 89:552587b429a1 216 HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand);
bogdanm 89:552587b429a1 217 HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand);
bogdanm 89:552587b429a1 218 HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout);
bogdanm 89:552587b429a1 219
bogdanm 89:552587b429a1 220 /* NAND State functions *******************************************************/
bogdanm 89:552587b429a1 221 HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
bogdanm 89:552587b429a1 222 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
bogdanm 89:552587b429a1 223
bogdanm 89:552587b429a1 224 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
bogdanm 89:552587b429a1 225 /**
bogdanm 89:552587b429a1 226 * @}
bogdanm 89:552587b429a1 227 */
bogdanm 89:552587b429a1 228
bogdanm 89:552587b429a1 229 /**
bogdanm 89:552587b429a1 230 * @}
bogdanm 89:552587b429a1 231 */
bogdanm 89:552587b429a1 232
bogdanm 89:552587b429a1 233 #ifdef __cplusplus
bogdanm 89:552587b429a1 234 }
bogdanm 89:552587b429a1 235 #endif
bogdanm 89:552587b429a1 236
bogdanm 89:552587b429a1 237 #endif /* __STM32F4xx_HAL_NAND_H */
bogdanm 89:552587b429a1 238
bogdanm 89:552587b429a1 239 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/