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mbed(SerialHalfDuplex入り)

TARGET_NUCLEO_F103RB/stm32f1xx_hal_tim.h@96:487b796308b0, 2015-03-17 (annotated)

Committer:: Kojto
Date:: Tue Mar 17 14:27:45 2015 +0000
Revision:: 96:487b796308b0

Release 96 of the mbed library



Changes:

- IAR support for ble boards, lpc, ethernet stack

- RTC - attach function to redirect time functions

- Nucleo F103RB - cube driver

- k20xx - fixes for teensy and k20 platforms in sleep/deepsleep and usb

- STM32L0, Nucleo/Disco L053 - refactoring

Who changed what in which revision?

User	Revision	Line number	New contents of line
Kojto	96:487b796308b0	1	/**
Kojto	96:487b796308b0	2	******************************************************************************
Kojto	96:487b796308b0	3	* @file stm32f1xx_hal_tim.h
Kojto	96:487b796308b0	4	* @author MCD Application Team
Kojto	96:487b796308b0	5	* @version V1.0.0
Kojto	96:487b796308b0	6	* @date 15-December-2014
Kojto	96:487b796308b0	7	* @brief Header file of TIM HAL module.
Kojto	96:487b796308b0	8	******************************************************************************
Kojto	96:487b796308b0	9	* @attention
Kojto	96:487b796308b0	10	*
Kojto	96:487b796308b0	11	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
Kojto	96:487b796308b0	12	*
Kojto	96:487b796308b0	13	* Redistribution and use in source and binary forms, with or without modification,
Kojto	96:487b796308b0	14	* are permitted provided that the following conditions are met:
Kojto	96:487b796308b0	15	* 1. Redistributions of source code must retain the above copyright notice,
Kojto	96:487b796308b0	16	* this list of conditions and the following disclaimer.
Kojto	96:487b796308b0	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto	96:487b796308b0	18	* this list of conditions and the following disclaimer in the documentation
Kojto	96:487b796308b0	19	* and/or other materials provided with the distribution.
Kojto	96:487b796308b0	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto	96:487b796308b0	21	* may be used to endorse or promote products derived from this software
Kojto	96:487b796308b0	22	* without specific prior written permission.
Kojto	96:487b796308b0	23	*
Kojto	96:487b796308b0	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto	96:487b796308b0	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto	96:487b796308b0	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto	96:487b796308b0	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto	96:487b796308b0	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto	96:487b796308b0	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto	96:487b796308b0	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto	96:487b796308b0	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto	96:487b796308b0	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto	96:487b796308b0	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto	96:487b796308b0	34	*
Kojto	96:487b796308b0	35	******************************************************************************
Kojto	96:487b796308b0	36	*/
Kojto	96:487b796308b0	37
Kojto	96:487b796308b0	38	/* Define to prevent recursive inclusion -------------------------------------*/
Kojto	96:487b796308b0	39	#ifndef __STM32F1xx_HAL_TIM_H
Kojto	96:487b796308b0	40	#define __STM32F1xx_HAL_TIM_H
Kojto	96:487b796308b0	41
Kojto	96:487b796308b0	42	#ifdef __cplusplus
Kojto	96:487b796308b0	43	extern "C" {
Kojto	96:487b796308b0	44	#endif
Kojto	96:487b796308b0	45
Kojto	96:487b796308b0	46	/* Includes ------------------------------------------------------------------*/
Kojto	96:487b796308b0	47	#include "stm32f1xx_hal_def.h"
Kojto	96:487b796308b0	48
Kojto	96:487b796308b0	49	/** @addtogroup STM32F1xx_HAL_Driver
Kojto	96:487b796308b0	50	* @{
Kojto	96:487b796308b0	51	*/
Kojto	96:487b796308b0	52
Kojto	96:487b796308b0	53	/** @addtogroup TIM
Kojto	96:487b796308b0	54	* @{
Kojto	96:487b796308b0	55	*/
Kojto	96:487b796308b0	56
Kojto	96:487b796308b0	57	/* Exported types ------------------------------------------------------------*/
Kojto	96:487b796308b0	58	/** @defgroup TIM_Exported_Types TIM Exported Types
Kojto	96:487b796308b0	59	* @{
Kojto	96:487b796308b0	60	*/
Kojto	96:487b796308b0	61	/**
Kojto	96:487b796308b0	62	* @brief TIM Time base Configuration Structure definition
Kojto	96:487b796308b0	63	*/
Kojto	96:487b796308b0	64	typedef struct
Kojto	96:487b796308b0	65	{
Kojto	96:487b796308b0	66	uint32_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
Kojto	96:487b796308b0	67	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
Kojto	96:487b796308b0	68
Kojto	96:487b796308b0	69	uint32_t CounterMode; /*!< Specifies the counter mode.
Kojto	96:487b796308b0	70	This parameter can be a value of @ref TIM_Counter_Mode */
Kojto	96:487b796308b0	71
Kojto	96:487b796308b0	72	uint32_t Period; /*!< Specifies the period value to be loaded into the active
Kojto	96:487b796308b0	73	Auto-Reload Register at the next update event.
Kojto	96:487b796308b0	74	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
Kojto	96:487b796308b0	75
Kojto	96:487b796308b0	76	uint32_t ClockDivision; /*!< Specifies the clock division.
Kojto	96:487b796308b0	77	This parameter can be a value of @ref TIM_ClockDivision */
Kojto	96:487b796308b0	78
Kojto	96:487b796308b0	79	uint32_t RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter
Kojto	96:487b796308b0	80	reaches zero, an update event is generated and counting restarts
Kojto	96:487b796308b0	81	from the RCR value (N).
Kojto	96:487b796308b0	82	This means in PWM mode that (N+1) corresponds to:
Kojto	96:487b796308b0	83	- the number of PWM periods in edge-aligned mode
Kojto	96:487b796308b0	84	- the number of half PWM period in center-aligned mode
Kojto	96:487b796308b0	85	This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
Kojto	96:487b796308b0	86	@note This parameter is valid only for TIM1 and TIM8. */
Kojto	96:487b796308b0	87	} TIM_Base_InitTypeDef;
Kojto	96:487b796308b0	88
Kojto	96:487b796308b0	89	/**
Kojto	96:487b796308b0	90	* @brief TIM Output Compare Configuration Structure definition
Kojto	96:487b796308b0	91	*/
Kojto	96:487b796308b0	92	typedef struct
Kojto	96:487b796308b0	93	{
Kojto	96:487b796308b0	94	uint32_t OCMode; /*!< Specifies the TIM mode.
Kojto	96:487b796308b0	95	This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
Kojto	96:487b796308b0	96
Kojto	96:487b796308b0	97	uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
Kojto	96:487b796308b0	98	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
Kojto	96:487b796308b0	99
Kojto	96:487b796308b0	100	uint32_t OCPolarity; /*!< Specifies the output polarity.
Kojto	96:487b796308b0	101	This parameter can be a value of @ref TIM_Output_Compare_Polarity */
Kojto	96:487b796308b0	102
Kojto	96:487b796308b0	103	uint32_t OCNPolarity; /*!< Specifies the complementary output polarity.
Kojto	96:487b796308b0	104	This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
Kojto	96:487b796308b0	105	@note This parameter is valid only for TIM1 and TIM8. */
Kojto	96:487b796308b0	106
Kojto	96:487b796308b0	107	uint32_t OCFastMode; /*!< Specifies the Fast mode state.
Kojto	96:487b796308b0	108	This parameter can be a value of @ref TIM_Output_Fast_State
Kojto	96:487b796308b0	109	@note This parameter is valid only in PWM1 and PWM2 mode. */
Kojto	96:487b796308b0	110
Kojto	96:487b796308b0	111
Kojto	96:487b796308b0	112	uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
Kojto	96:487b796308b0	113	This parameter can be a value of @ref TIM_Output_Compare_Idle_State
Kojto	96:487b796308b0	114	@note This parameter is valid only for TIM1 and TIM8. */
Kojto	96:487b796308b0	115
Kojto	96:487b796308b0	116	uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
Kojto	96:487b796308b0	117	This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
Kojto	96:487b796308b0	118	@note This parameter is valid only for TIM1 and TIM8. */
Kojto	96:487b796308b0	119	} TIM_OC_InitTypeDef;
Kojto	96:487b796308b0	120
Kojto	96:487b796308b0	121	/**
Kojto	96:487b796308b0	122	* @brief TIM One Pulse Mode Configuration Structure definition
Kojto	96:487b796308b0	123	*/
Kojto	96:487b796308b0	124	typedef struct
Kojto	96:487b796308b0	125	{
Kojto	96:487b796308b0	126	uint32_t OCMode; /*!< Specifies the TIM mode.
Kojto	96:487b796308b0	127	This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
Kojto	96:487b796308b0	128
Kojto	96:487b796308b0	129	uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
Kojto	96:487b796308b0	130	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
Kojto	96:487b796308b0	131
Kojto	96:487b796308b0	132	uint32_t OCPolarity; /*!< Specifies the output polarity.
Kojto	96:487b796308b0	133	This parameter can be a value of @ref TIM_Output_Compare_Polarity */
Kojto	96:487b796308b0	134
Kojto	96:487b796308b0	135	uint32_t OCNPolarity; /*!< Specifies the complementary output polarity.
Kojto	96:487b796308b0	136	This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
Kojto	96:487b796308b0	137	@note This parameter is valid only for TIM1 and TIM8. */
Kojto	96:487b796308b0	138
Kojto	96:487b796308b0	139	uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
Kojto	96:487b796308b0	140	This parameter can be a value of @ref TIM_Output_Compare_Idle_State
Kojto	96:487b796308b0	141	@note This parameter is valid only for TIM1 and TIM8. */
Kojto	96:487b796308b0	142
Kojto	96:487b796308b0	143	uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
Kojto	96:487b796308b0	144	This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
Kojto	96:487b796308b0	145	@note This parameter is valid only for TIM1 and TIM8. */
Kojto	96:487b796308b0	146
Kojto	96:487b796308b0	147	uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
Kojto	96:487b796308b0	148	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
Kojto	96:487b796308b0	149
Kojto	96:487b796308b0	150	uint32_t ICSelection; /*!< Specifies the input.
Kojto	96:487b796308b0	151	This parameter can be a value of @ref TIM_Input_Capture_Selection */
Kojto	96:487b796308b0	152
Kojto	96:487b796308b0	153	uint32_t ICFilter; /*!< Specifies the input capture filter.
Kojto	96:487b796308b0	154	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
Kojto	96:487b796308b0	155	} TIM_OnePulse_InitTypeDef;
Kojto	96:487b796308b0	156
Kojto	96:487b796308b0	157
Kojto	96:487b796308b0	158	/**
Kojto	96:487b796308b0	159	* @brief TIM Input Capture Configuration Structure definition
Kojto	96:487b796308b0	160	*/
Kojto	96:487b796308b0	161	typedef struct
Kojto	96:487b796308b0	162	{
Kojto	96:487b796308b0	163	uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
Kojto	96:487b796308b0	164	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
Kojto	96:487b796308b0	165
Kojto	96:487b796308b0	166	uint32_t ICSelection; /*!< Specifies the input.
Kojto	96:487b796308b0	167	This parameter can be a value of @ref TIM_Input_Capture_Selection */
Kojto	96:487b796308b0	168
Kojto	96:487b796308b0	169	uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler.
Kojto	96:487b796308b0	170	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
Kojto	96:487b796308b0	171
Kojto	96:487b796308b0	172	uint32_t ICFilter; /*!< Specifies the input capture filter.
Kojto	96:487b796308b0	173	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
Kojto	96:487b796308b0	174	} TIM_IC_InitTypeDef;
Kojto	96:487b796308b0	175
Kojto	96:487b796308b0	176	/**
Kojto	96:487b796308b0	177	* @brief TIM Encoder Configuration Structure definition
Kojto	96:487b796308b0	178	*/
Kojto	96:487b796308b0	179	typedef struct
Kojto	96:487b796308b0	180	{
Kojto	96:487b796308b0	181	uint32_t EncoderMode; /*!< Specifies the active edge of the input signal.
Kojto	96:487b796308b0	182	This parameter can be a value of @ref TIM_Encoder_Mode */
Kojto	96:487b796308b0	183
Kojto	96:487b796308b0	184	uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
Kojto	96:487b796308b0	185	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
Kojto	96:487b796308b0	186
Kojto	96:487b796308b0	187	uint32_t IC1Selection; /*!< Specifies the input.
Kojto	96:487b796308b0	188	This parameter can be a value of @ref TIM_Input_Capture_Selection */
Kojto	96:487b796308b0	189
Kojto	96:487b796308b0	190	uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
Kojto	96:487b796308b0	191	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
Kojto	96:487b796308b0	192
Kojto	96:487b796308b0	193	uint32_t IC1Filter; /*!< Specifies the input capture filter.
Kojto	96:487b796308b0	194	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
Kojto	96:487b796308b0	195
Kojto	96:487b796308b0	196	uint32_t IC2Polarity; /*!< Specifies the active edge of the input signal.
Kojto	96:487b796308b0	197	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
Kojto	96:487b796308b0	198
Kojto	96:487b796308b0	199	uint32_t IC2Selection; /*!< Specifies the input.
Kojto	96:487b796308b0	200	This parameter can be a value of @ref TIM_Input_Capture_Selection */
Kojto	96:487b796308b0	201
Kojto	96:487b796308b0	202	uint32_t IC2Prescaler; /*!< Specifies the Input Capture Prescaler.
Kojto	96:487b796308b0	203	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
Kojto	96:487b796308b0	204
Kojto	96:487b796308b0	205	uint32_t IC2Filter; /*!< Specifies the input capture filter.
Kojto	96:487b796308b0	206	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
Kojto	96:487b796308b0	207	} TIM_Encoder_InitTypeDef;
Kojto	96:487b796308b0	208
Kojto	96:487b796308b0	209
Kojto	96:487b796308b0	210	/**
Kojto	96:487b796308b0	211	* @brief TIM Clock Configuration Handle Structure definition
Kojto	96:487b796308b0	212	*/
Kojto	96:487b796308b0	213	typedef struct
Kojto	96:487b796308b0	214	{
Kojto	96:487b796308b0	215	uint32_t ClockSource; /*!< TIM clock sources
Kojto	96:487b796308b0	216	This parameter can be a value of @ref TIM_Clock_Source */
Kojto	96:487b796308b0	217	uint32_t ClockPolarity; /*!< TIM clock polarity
Kojto	96:487b796308b0	218	This parameter can be a value of @ref TIM_Clock_Polarity */
Kojto	96:487b796308b0	219	uint32_t ClockPrescaler; /*!< TIM clock prescaler
Kojto	96:487b796308b0	220	This parameter can be a value of @ref TIM_Clock_Prescaler */
Kojto	96:487b796308b0	221	uint32_t ClockFilter; /*!< TIM clock filter
Kojto	96:487b796308b0	222	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
Kojto	96:487b796308b0	223	}TIM_ClockConfigTypeDef;
Kojto	96:487b796308b0	224
Kojto	96:487b796308b0	225	/**
Kojto	96:487b796308b0	226	* @brief TIM Clear Input Configuration Handle Structure definition
Kojto	96:487b796308b0	227	*/
Kojto	96:487b796308b0	228	typedef struct
Kojto	96:487b796308b0	229	{
Kojto	96:487b796308b0	230	uint32_t ClearInputState; /*!< TIM clear Input state
Kojto	96:487b796308b0	231	This parameter can be ENABLE or DISABLE */
Kojto	96:487b796308b0	232	uint32_t ClearInputSource; /*!< TIM clear Input sources
Kojto	96:487b796308b0	233	This parameter can be a value of @ref TIM_ClearInput_Source */
Kojto	96:487b796308b0	234	uint32_t ClearInputPolarity; /*!< TIM Clear Input polarity
Kojto	96:487b796308b0	235	This parameter can be a value of @ref TIM_ClearInput_Polarity */
Kojto	96:487b796308b0	236	uint32_t ClearInputPrescaler; /*!< TIM Clear Input prescaler
Kojto	96:487b796308b0	237	This parameter can be a value of @ref TIM_ClearInput_Prescaler */
Kojto	96:487b796308b0	238	uint32_t ClearInputFilter; /*!< TIM Clear Input filter
Kojto	96:487b796308b0	239	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
Kojto	96:487b796308b0	240	}TIM_ClearInputConfigTypeDef;
Kojto	96:487b796308b0	241
Kojto	96:487b796308b0	242	/**
Kojto	96:487b796308b0	243	* @brief TIM Slave configuration Structure definition
Kojto	96:487b796308b0	244	*/
Kojto	96:487b796308b0	245	typedef struct {
Kojto	96:487b796308b0	246	uint32_t SlaveMode; /*!< Slave mode selection
Kojto	96:487b796308b0	247	This parameter can be a value of @ref TIM_Slave_Mode */
Kojto	96:487b796308b0	248	uint32_t InputTrigger; /*!< Input Trigger source
Kojto	96:487b796308b0	249	This parameter can be a value of @ref TIM_Trigger_Selection */
Kojto	96:487b796308b0	250	uint32_t TriggerPolarity; /*!< Input Trigger polarity
Kojto	96:487b796308b0	251	This parameter can be a value of @ref TIM_Trigger_Polarity */
Kojto	96:487b796308b0	252	uint32_t TriggerPrescaler; /*!< Input trigger prescaler
Kojto	96:487b796308b0	253	This parameter can be a value of @ref TIM_Trigger_Prescaler */
Kojto	96:487b796308b0	254	uint32_t TriggerFilter; /*!< Input trigger filter
Kojto	96:487b796308b0	255	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
Kojto	96:487b796308b0	256
Kojto	96:487b796308b0	257	}TIM_SlaveConfigTypeDef;
Kojto	96:487b796308b0	258
Kojto	96:487b796308b0	259	/**
Kojto	96:487b796308b0	260	* @brief HAL State structures definition
Kojto	96:487b796308b0	261	*/
Kojto	96:487b796308b0	262	typedef enum
Kojto	96:487b796308b0	263	{
Kojto	96:487b796308b0	264	HAL_TIM_STATE_RESET = 0x00, /!< Peripheral not yet initialized or disabled /
Kojto	96:487b796308b0	265	HAL_TIM_STATE_READY = 0x01, /!< Peripheral Initialized and ready for use /
Kojto	96:487b796308b0	266	HAL_TIM_STATE_BUSY = 0x02, /!< An internal process is ongoing /
Kojto	96:487b796308b0	267	HAL_TIM_STATE_TIMEOUT = 0x03, /!< Timeout state /
Kojto	96:487b796308b0	268	HAL_TIM_STATE_ERROR = 0x04 /!< Reception process is ongoing /
Kojto	96:487b796308b0	269	}HAL_TIM_StateTypeDef;
Kojto	96:487b796308b0	270
Kojto	96:487b796308b0	271	/**
Kojto	96:487b796308b0	272	* @brief HAL Active channel structures definition
Kojto	96:487b796308b0	273	*/
Kojto	96:487b796308b0	274	typedef enum
Kojto	96:487b796308b0	275	{
Kojto	96:487b796308b0	276	HAL_TIM_ACTIVE_CHANNEL_1 = 0x01, /!< The active channel is 1 /
Kojto	96:487b796308b0	277	HAL_TIM_ACTIVE_CHANNEL_2 = 0x02, /!< The active channel is 2 /
Kojto	96:487b796308b0	278	HAL_TIM_ACTIVE_CHANNEL_3 = 0x04, /!< The active channel is 3 /
Kojto	96:487b796308b0	279	HAL_TIM_ACTIVE_CHANNEL_4 = 0x08, /!< The active channel is 4 /
Kojto	96:487b796308b0	280	HAL_TIM_ACTIVE_CHANNEL_CLEARED = 0x00 /!< All active channels cleared /
Kojto	96:487b796308b0	281	}HAL_TIM_ActiveChannel;
Kojto	96:487b796308b0	282
Kojto	96:487b796308b0	283	/**
Kojto	96:487b796308b0	284	* @brief TIM Time Base Handle Structure definition
Kojto	96:487b796308b0	285	*/
Kojto	96:487b796308b0	286	typedef struct
Kojto	96:487b796308b0	287	{
Kojto	96:487b796308b0	288	TIM_TypeDef Instance; /!< Register base address */
Kojto	96:487b796308b0	289	TIM_Base_InitTypeDef Init; /!< TIM Time Base required parameters /
Kojto	96:487b796308b0	290	HAL_TIM_ActiveChannel Channel; /!< Active channel /
Kojto	96:487b796308b0	291	DMA_HandleTypeDef hdma[7]; /!< DMA Handlers array
Kojto	96:487b796308b0	292	This array is accessed by a @ref TIM_DMA_Handle_index */
Kojto	96:487b796308b0	293	HAL_LockTypeDef Lock; /!< Locking object /
Kojto	96:487b796308b0	294	__IO HAL_TIM_StateTypeDef State; /!< TIM operation state /
Kojto	96:487b796308b0	295	}TIM_HandleTypeDef;
Kojto	96:487b796308b0	296
Kojto	96:487b796308b0	297	/**
Kojto	96:487b796308b0	298	* @}
Kojto	96:487b796308b0	299	*/
Kojto	96:487b796308b0	300
Kojto	96:487b796308b0	301	/* Exported constants --------------------------------------------------------*/
Kojto	96:487b796308b0	302	/** @defgroup TIM_Exported_Constants TIM Exported Constants
Kojto	96:487b796308b0	303	* @{
Kojto	96:487b796308b0	304	*/
Kojto	96:487b796308b0	305
Kojto	96:487b796308b0	306	/** @defgroup TIM_Input_Channel_Polarity TIM Input Channel Polarity
Kojto	96:487b796308b0	307	* @{
Kojto	96:487b796308b0	308	*/
Kojto	96:487b796308b0	309	#define TIM_INPUTCHANNELPOLARITY_RISING ((uint32_t)0x00000000) /!< Polarity for TIx source /
Kojto	96:487b796308b0	310	#define TIM_INPUTCHANNELPOLARITY_FALLING (TIM_CCER_CC1P) /!< Polarity for TIx source /
Kojto	96:487b796308b0	311	#define TIM_INPUTCHANNELPOLARITY_BOTHEDGE (TIM_CCER_CC1P \| TIM_CCER_CC1NP) /!< Polarity for TIx source /
Kojto	96:487b796308b0	312	/**
Kojto	96:487b796308b0	313	* @}
Kojto	96:487b796308b0	314	*/
Kojto	96:487b796308b0	315
Kojto	96:487b796308b0	316	/** @defgroup TIM_ETR_Polarity TIM ETR Polarity
Kojto	96:487b796308b0	317	* @{
Kojto	96:487b796308b0	318	*/
Kojto	96:487b796308b0	319	#define TIM_ETRPOLARITY_INVERTED (TIM_SMCR_ETP) /!< Polarity for ETR source /
Kojto	96:487b796308b0	320	#define TIM_ETRPOLARITY_NONINVERTED ((uint32_t)0x0000) /!< Polarity for ETR source /
Kojto	96:487b796308b0	321	/**
Kojto	96:487b796308b0	322	* @}
Kojto	96:487b796308b0	323	*/
Kojto	96:487b796308b0	324
Kojto	96:487b796308b0	325	/** @defgroup TIM_ETR_Prescaler TIM ETR Prescaler
Kojto	96:487b796308b0	326	* @{
Kojto	96:487b796308b0	327	*/
Kojto	96:487b796308b0	328	#define TIM_ETRPRESCALER_DIV1 ((uint32_t)0x0000) /!< No prescaler is used /
Kojto	96:487b796308b0	329	#define TIM_ETRPRESCALER_DIV2 (TIM_SMCR_ETPS_0) /!< ETR input source is divided by 2 /
Kojto	96:487b796308b0	330	#define TIM_ETRPRESCALER_DIV4 (TIM_SMCR_ETPS_1) /!< ETR input source is divided by 4 /
Kojto	96:487b796308b0	331	#define TIM_ETRPRESCALER_DIV8 (TIM_SMCR_ETPS) /!< ETR input source is divided by 8 /
Kojto	96:487b796308b0	332	/**
Kojto	96:487b796308b0	333	* @}
Kojto	96:487b796308b0	334	*/
Kojto	96:487b796308b0	335
Kojto	96:487b796308b0	336	/** @defgroup TIM_Counter_Mode TIM Counter Mode
Kojto	96:487b796308b0	337	* @{
Kojto	96:487b796308b0	338	*/
Kojto	96:487b796308b0	339	#define TIM_COUNTERMODE_UP ((uint32_t)0x0000)
Kojto	96:487b796308b0	340	#define TIM_COUNTERMODE_DOWN TIM_CR1_DIR
Kojto	96:487b796308b0	341	#define TIM_COUNTERMODE_CENTERALIGNED1 TIM_CR1_CMS_0
Kojto	96:487b796308b0	342	#define TIM_COUNTERMODE_CENTERALIGNED2 TIM_CR1_CMS_1
Kojto	96:487b796308b0	343	#define TIM_COUNTERMODE_CENTERALIGNED3 TIM_CR1_CMS
Kojto	96:487b796308b0	344	/**
Kojto	96:487b796308b0	345	* @}
Kojto	96:487b796308b0	346	*/
Kojto	96:487b796308b0	347
Kojto	96:487b796308b0	348	/** @defgroup TIM_ClockDivision TIM ClockDivision
Kojto	96:487b796308b0	349	* @{
Kojto	96:487b796308b0	350	*/
Kojto	96:487b796308b0	351	#define TIM_CLOCKDIVISION_DIV1 ((uint32_t)0x0000)
Kojto	96:487b796308b0	352	#define TIM_CLOCKDIVISION_DIV2 (TIM_CR1_CKD_0)
Kojto	96:487b796308b0	353	#define TIM_CLOCKDIVISION_DIV4 (TIM_CR1_CKD_1)
Kojto	96:487b796308b0	354	/**
Kojto	96:487b796308b0	355	* @}
Kojto	96:487b796308b0	356	*/
Kojto	96:487b796308b0	357
Kojto	96:487b796308b0	358	/** @defgroup TIM_Output_Compare_and_PWM_modes TIM Output Compare and PWM modes
Kojto	96:487b796308b0	359	* @{
Kojto	96:487b796308b0	360	*/
Kojto	96:487b796308b0	361	#define TIM_OCMODE_TIMING ((uint32_t)0x0000)
Kojto	96:487b796308b0	362	#define TIM_OCMODE_ACTIVE (TIM_CCMR1_OC1M_0)
Kojto	96:487b796308b0	363	#define TIM_OCMODE_INACTIVE (TIM_CCMR1_OC1M_1)
Kojto	96:487b796308b0	364	#define TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_0 \| TIM_CCMR1_OC1M_1)
Kojto	96:487b796308b0	365	#define TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_2)
Kojto	96:487b796308b0	366	#define TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M)
Kojto	96:487b796308b0	367	#define TIM_OCMODE_FORCED_ACTIVE (TIM_CCMR1_OC1M_0 \| TIM_CCMR1_OC1M_2)
Kojto	96:487b796308b0	368	#define TIM_OCMODE_FORCED_INACTIVE (TIM_CCMR1_OC1M_2)
Kojto	96:487b796308b0	369	/**
Kojto	96:487b796308b0	370	* @}
Kojto	96:487b796308b0	371	*/
Kojto	96:487b796308b0	372
Kojto	96:487b796308b0	373	/** @defgroup TIM_Output_Compare_State TIM Output Compare State
Kojto	96:487b796308b0	374	* @{
Kojto	96:487b796308b0	375	*/
Kojto	96:487b796308b0	376	#define TIM_OUTPUTSTATE_DISABLE ((uint32_t)0x0000)
Kojto	96:487b796308b0	377	#define TIM_OUTPUTSTATE_ENABLE (TIM_CCER_CC1E)
Kojto	96:487b796308b0	378	/**
Kojto	96:487b796308b0	379	* @}
Kojto	96:487b796308b0	380	*/
Kojto	96:487b796308b0	381
Kojto	96:487b796308b0	382	/** @defgroup TIM_Output_Fast_State TIM Output Fast State
Kojto	96:487b796308b0	383	* @{
Kojto	96:487b796308b0	384	*/
Kojto	96:487b796308b0	385	#define TIM_OCFAST_DISABLE ((uint32_t)0x0000)
Kojto	96:487b796308b0	386	#define TIM_OCFAST_ENABLE (TIM_CCMR1_OC1FE)
Kojto	96:487b796308b0	387	/**
Kojto	96:487b796308b0	388	* @}
Kojto	96:487b796308b0	389	*/
Kojto	96:487b796308b0	390
Kojto	96:487b796308b0	391	/** @defgroup TIM_Output_Compare_N_State TIM Complementary Output Compare State
Kojto	96:487b796308b0	392	* @{
Kojto	96:487b796308b0	393	*/
Kojto	96:487b796308b0	394	#define TIM_OUTPUTNSTATE_DISABLE ((uint32_t)0x0000)
Kojto	96:487b796308b0	395	#define TIM_OUTPUTNSTATE_ENABLE (TIM_CCER_CC1NE)
Kojto	96:487b796308b0	396	/**
Kojto	96:487b796308b0	397	* @}
Kojto	96:487b796308b0	398	*/
Kojto	96:487b796308b0	399
Kojto	96:487b796308b0	400	/** @defgroup TIM_Output_Compare_Polarity TIM Output Compare Polarity
Kojto	96:487b796308b0	401	* @{
Kojto	96:487b796308b0	402	*/
Kojto	96:487b796308b0	403	#define TIM_OCPOLARITY_HIGH ((uint32_t)0x0000)
Kojto	96:487b796308b0	404	#define TIM_OCPOLARITY_LOW (TIM_CCER_CC1P)
Kojto	96:487b796308b0	405	/**
Kojto	96:487b796308b0	406	* @}
Kojto	96:487b796308b0	407	*/
Kojto	96:487b796308b0	408
Kojto	96:487b796308b0	409	/** @defgroup TIM_Output_Compare_N_Polarity TIM Complementary Output Compare Polarity
Kojto	96:487b796308b0	410	* @{
Kojto	96:487b796308b0	411	*/
Kojto	96:487b796308b0	412	#define TIM_OCNPOLARITY_HIGH ((uint32_t)0x0000)
Kojto	96:487b796308b0	413	#define TIM_OCNPOLARITY_LOW (TIM_CCER_CC1NP)
Kojto	96:487b796308b0	414	/**
Kojto	96:487b796308b0	415	* @}
Kojto	96:487b796308b0	416	*/
Kojto	96:487b796308b0	417
Kojto	96:487b796308b0	418	/** @defgroup TIM_Output_Compare_Idle_State TIM Output Compare Idle State
Kojto	96:487b796308b0	419	* @{
Kojto	96:487b796308b0	420	*/
Kojto	96:487b796308b0	421	#define TIM_OCIDLESTATE_SET (TIM_CR2_OIS1)
Kojto	96:487b796308b0	422	#define TIM_OCIDLESTATE_RESET ((uint32_t)0x0000)
Kojto	96:487b796308b0	423	/**
Kojto	96:487b796308b0	424	* @}
Kojto	96:487b796308b0	425	*/
Kojto	96:487b796308b0	426
Kojto	96:487b796308b0	427	/** @defgroup TIM_Output_Compare_N_Idle_State TIM Complementary Output Compare Idle State
Kojto	96:487b796308b0	428	* @{
Kojto	96:487b796308b0	429	*/
Kojto	96:487b796308b0	430	#define TIM_OCNIDLESTATE_SET (TIM_CR2_OIS1N)
Kojto	96:487b796308b0	431	#define TIM_OCNIDLESTATE_RESET ((uint32_t)0x0000)
Kojto	96:487b796308b0	432	/**
Kojto	96:487b796308b0	433	* @}
Kojto	96:487b796308b0	434	*/
Kojto	96:487b796308b0	435
Kojto	96:487b796308b0	436	/** @defgroup TIM_Channel TIM Channel
Kojto	96:487b796308b0	437	* @{
Kojto	96:487b796308b0	438	*/
Kojto	96:487b796308b0	439	#define TIM_CHANNEL_1 ((uint32_t)0x0000)
Kojto	96:487b796308b0	440	#define TIM_CHANNEL_2 ((uint32_t)0x0004)
Kojto	96:487b796308b0	441	#define TIM_CHANNEL_3 ((uint32_t)0x0008)
Kojto	96:487b796308b0	442	#define TIM_CHANNEL_4 ((uint32_t)0x000C)
Kojto	96:487b796308b0	443	#define TIM_CHANNEL_ALL ((uint32_t)0x0018)
Kojto	96:487b796308b0	444	/**
Kojto	96:487b796308b0	445	* @}
Kojto	96:487b796308b0	446	*/
Kojto	96:487b796308b0	447
Kojto	96:487b796308b0	448	/** @defgroup TIM_Input_Capture_Polarity TIM Input Capture Polarity
Kojto	96:487b796308b0	449	* @{
Kojto	96:487b796308b0	450	*/
Kojto	96:487b796308b0	451	#define TIM_ICPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING
Kojto	96:487b796308b0	452	#define TIM_ICPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING
Kojto	96:487b796308b0	453	#define TIM_ICPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE
Kojto	96:487b796308b0	454	/**
Kojto	96:487b796308b0	455	* @}
Kojto	96:487b796308b0	456	*/
Kojto	96:487b796308b0	457
Kojto	96:487b796308b0	458	/** @defgroup TIM_Input_Capture_Selection TIM Input Capture Selection
Kojto	96:487b796308b0	459	* @{
Kojto	96:487b796308b0	460	*/
Kojto	96:487b796308b0	461	#define TIM_ICSELECTION_DIRECTTI (TIM_CCMR1_CC1S_0) /*!< TIM Input 1, 2, 3 or 4 is selected to be
Kojto	96:487b796308b0	462	connected to IC1, IC2, IC3 or IC4, respectively */
Kojto	96:487b796308b0	463	#define TIM_ICSELECTION_INDIRECTTI (TIM_CCMR1_CC1S_1) /*!< TIM Input 1, 2, 3 or 4 is selected to be
Kojto	96:487b796308b0	464	connected to IC2, IC1, IC4 or IC3, respectively */
Kojto	96:487b796308b0	465	#define TIM_ICSELECTION_TRC (TIM_CCMR1_CC1S) /!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC /
Kojto	96:487b796308b0	466	/**
Kojto	96:487b796308b0	467	* @}
Kojto	96:487b796308b0	468	*/
Kojto	96:487b796308b0	469
Kojto	96:487b796308b0	470	/** @defgroup TIM_Input_Capture_Prescaler TIM Input Capture Prescaler
Kojto	96:487b796308b0	471	* @{
Kojto	96:487b796308b0	472	*/
Kojto	96:487b796308b0	473	#define TIM_ICPSC_DIV1 ((uint32_t)0x0000) /!< Capture performed each time an edge is detected on the capture input /
Kojto	96:487b796308b0	474	#define TIM_ICPSC_DIV2 (TIM_CCMR1_IC1PSC_0) /!< Capture performed once every 2 events /
Kojto	96:487b796308b0	475	#define TIM_ICPSC_DIV4 (TIM_CCMR1_IC1PSC_1) /!< Capture performed once every 4 events /
Kojto	96:487b796308b0	476	#define TIM_ICPSC_DIV8 (TIM_CCMR1_IC1PSC) /!< Capture performed once every 8 events /
Kojto	96:487b796308b0	477	/**
Kojto	96:487b796308b0	478	* @}
Kojto	96:487b796308b0	479	*/
Kojto	96:487b796308b0	480
Kojto	96:487b796308b0	481	/** @defgroup TIM_One_Pulse_Mode TIM One Pulse Mode
Kojto	96:487b796308b0	482	* @{
Kojto	96:487b796308b0	483	*/
Kojto	96:487b796308b0	484	#define TIM_OPMODE_SINGLE (TIM_CR1_OPM)
Kojto	96:487b796308b0	485	#define TIM_OPMODE_REPETITIVE ((uint32_t)0x0000)
Kojto	96:487b796308b0	486	/**
Kojto	96:487b796308b0	487	* @}
Kojto	96:487b796308b0	488	*/
Kojto	96:487b796308b0	489
Kojto	96:487b796308b0	490	/** @defgroup TIM_Encoder_Mode TIM Encoder Mode
Kojto	96:487b796308b0	491	* @{
Kojto	96:487b796308b0	492	*/
Kojto	96:487b796308b0	493	#define TIM_ENCODERMODE_TI1 (TIM_SMCR_SMS_0)
Kojto	96:487b796308b0	494	#define TIM_ENCODERMODE_TI2 (TIM_SMCR_SMS_1)
Kojto	96:487b796308b0	495	#define TIM_ENCODERMODE_TI12 (TIM_SMCR_SMS_1 \| TIM_SMCR_SMS_0)
Kojto	96:487b796308b0	496	/**
Kojto	96:487b796308b0	497	* @}
Kojto	96:487b796308b0	498	*/
Kojto	96:487b796308b0	499
Kojto	96:487b796308b0	500	/** @defgroup TIM_Interrupt_definition TIM Interrupt Definition
Kojto	96:487b796308b0	501	* @{
Kojto	96:487b796308b0	502	*/
Kojto	96:487b796308b0	503	#define TIM_IT_UPDATE (TIM_DIER_UIE)
Kojto	96:487b796308b0	504	#define TIM_IT_CC1 (TIM_DIER_CC1IE)
Kojto	96:487b796308b0	505	#define TIM_IT_CC2 (TIM_DIER_CC2IE)
Kojto	96:487b796308b0	506	#define TIM_IT_CC3 (TIM_DIER_CC3IE)
Kojto	96:487b796308b0	507	#define TIM_IT_CC4 (TIM_DIER_CC4IE)
Kojto	96:487b796308b0	508	#define TIM_IT_COM (TIM_DIER_COMIE)
Kojto	96:487b796308b0	509	#define TIM_IT_TRIGGER (TIM_DIER_TIE)
Kojto	96:487b796308b0	510	#define TIM_IT_BREAK (TIM_DIER_BIE)
Kojto	96:487b796308b0	511	/**
Kojto	96:487b796308b0	512	* @}
Kojto	96:487b796308b0	513	*/
Kojto	96:487b796308b0	514
Kojto	96:487b796308b0	515	/** @defgroup TIM_Commutation_Source TIM Commutation Source
Kojto	96:487b796308b0	516	* @{
Kojto	96:487b796308b0	517	*/
Kojto	96:487b796308b0	518	#define TIM_COMMUTATION_TRGI (TIM_CR2_CCUS)
Kojto	96:487b796308b0	519	#define TIM_COMMUTATION_SOFTWARE ((uint32_t)0x0000)
Kojto	96:487b796308b0	520
Kojto	96:487b796308b0	521	/**
Kojto	96:487b796308b0	522	* @}
Kojto	96:487b796308b0	523	*/
Kojto	96:487b796308b0	524
Kojto	96:487b796308b0	525	/** @defgroup TIM_DMA_sources TIM DMA Sources
Kojto	96:487b796308b0	526	* @{
Kojto	96:487b796308b0	527	*/
Kojto	96:487b796308b0	528	#define TIM_DMA_UPDATE (TIM_DIER_UDE)
Kojto	96:487b796308b0	529	#define TIM_DMA_CC1 (TIM_DIER_CC1DE)
Kojto	96:487b796308b0	530	#define TIM_DMA_CC2 (TIM_DIER_CC2DE)
Kojto	96:487b796308b0	531	#define TIM_DMA_CC3 (TIM_DIER_CC3DE)
Kojto	96:487b796308b0	532	#define TIM_DMA_CC4 (TIM_DIER_CC4DE)
Kojto	96:487b796308b0	533	#define TIM_DMA_COM (TIM_DIER_COMDE)
Kojto	96:487b796308b0	534	#define TIM_DMA_TRIGGER (TIM_DIER_TDE)
Kojto	96:487b796308b0	535	/**
Kojto	96:487b796308b0	536	* @}
Kojto	96:487b796308b0	537	*/
Kojto	96:487b796308b0	538
Kojto	96:487b796308b0	539	/** @defgroup TIM_Event_Source TIM Event Source
Kojto	96:487b796308b0	540	* @{
Kojto	96:487b796308b0	541	*/
Kojto	96:487b796308b0	542	#define TIM_EVENTSOURCE_UPDATE TIM_EGR_UG
Kojto	96:487b796308b0	543	#define TIM_EVENTSOURCE_CC1 TIM_EGR_CC1G
Kojto	96:487b796308b0	544	#define TIM_EVENTSOURCE_CC2 TIM_EGR_CC2G
Kojto	96:487b796308b0	545	#define TIM_EVENTSOURCE_CC3 TIM_EGR_CC3G
Kojto	96:487b796308b0	546	#define TIM_EVENTSOURCE_CC4 TIM_EGR_CC4G
Kojto	96:487b796308b0	547	#define TIM_EVENTSOURCE_COM TIM_EGR_COMG
Kojto	96:487b796308b0	548	#define TIM_EVENTSOURCE_TRIGGER TIM_EGR_TG
Kojto	96:487b796308b0	549	#define TIM_EVENTSOURCE_BREAK TIM_EGR_BG
Kojto	96:487b796308b0	550	/**
Kojto	96:487b796308b0	551	* @}
Kojto	96:487b796308b0	552	*/
Kojto	96:487b796308b0	553
Kojto	96:487b796308b0	554	/** @defgroup TIM_Flag_definition TIM Flag Definition
Kojto	96:487b796308b0	555	* @{
Kojto	96:487b796308b0	556	*/
Kojto	96:487b796308b0	557	#define TIM_FLAG_UPDATE (TIM_SR_UIF)
Kojto	96:487b796308b0	558	#define TIM_FLAG_CC1 (TIM_SR_CC1IF)
Kojto	96:487b796308b0	559	#define TIM_FLAG_CC2 (TIM_SR_CC2IF)
Kojto	96:487b796308b0	560	#define TIM_FLAG_CC3 (TIM_SR_CC3IF)
Kojto	96:487b796308b0	561	#define TIM_FLAG_CC4 (TIM_SR_CC4IF)
Kojto	96:487b796308b0	562	#define TIM_FLAG_COM (TIM_SR_COMIF)
Kojto	96:487b796308b0	563	#define TIM_FLAG_TRIGGER (TIM_SR_TIF)
Kojto	96:487b796308b0	564	#define TIM_FLAG_BREAK (TIM_SR_BIF)
Kojto	96:487b796308b0	565	#define TIM_FLAG_CC1OF (TIM_SR_CC1OF)
Kojto	96:487b796308b0	566	#define TIM_FLAG_CC2OF (TIM_SR_CC2OF)
Kojto	96:487b796308b0	567	#define TIM_FLAG_CC3OF (TIM_SR_CC3OF)
Kojto	96:487b796308b0	568	#define TIM_FLAG_CC4OF (TIM_SR_CC4OF)
Kojto	96:487b796308b0	569	/**
Kojto	96:487b796308b0	570	* @}
Kojto	96:487b796308b0	571	*/
Kojto	96:487b796308b0	572
Kojto	96:487b796308b0	573	/** @defgroup TIM_Clock_Source TIM Clock Source
Kojto	96:487b796308b0	574	* @{
Kojto	96:487b796308b0	575	*/
Kojto	96:487b796308b0	576	#define TIM_CLOCKSOURCE_ETRMODE2 (TIM_SMCR_ETPS_1)
Kojto	96:487b796308b0	577	#define TIM_CLOCKSOURCE_INTERNAL (TIM_SMCR_ETPS_0)
Kojto	96:487b796308b0	578	#define TIM_CLOCKSOURCE_ITR0 ((uint32_t)0x0000)
Kojto	96:487b796308b0	579	#define TIM_CLOCKSOURCE_ITR1 (TIM_SMCR_TS_0)
Kojto	96:487b796308b0	580	#define TIM_CLOCKSOURCE_ITR2 (TIM_SMCR_TS_1)
Kojto	96:487b796308b0	581	#define TIM_CLOCKSOURCE_ITR3 (TIM_SMCR_TS_0 \| TIM_SMCR_TS_1)
Kojto	96:487b796308b0	582	#define TIM_CLOCKSOURCE_TI1ED (TIM_SMCR_TS_2)
Kojto	96:487b796308b0	583	#define TIM_CLOCKSOURCE_TI1 (TIM_SMCR_TS_0 \| TIM_SMCR_TS_2)
Kojto	96:487b796308b0	584	#define TIM_CLOCKSOURCE_TI2 (TIM_SMCR_TS_1 \| TIM_SMCR_TS_2)
Kojto	96:487b796308b0	585	#define TIM_CLOCKSOURCE_ETRMODE1 (TIM_SMCR_TS)
Kojto	96:487b796308b0	586	/**
Kojto	96:487b796308b0	587	* @}
Kojto	96:487b796308b0	588	*/
Kojto	96:487b796308b0	589
Kojto	96:487b796308b0	590	/** @defgroup TIM_Clock_Polarity TIM Clock Polarity
Kojto	96:487b796308b0	591	* @{
Kojto	96:487b796308b0	592	*/
Kojto	96:487b796308b0	593	#define TIM_CLOCKPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /!< Polarity for ETRx clock sources /
Kojto	96:487b796308b0	594	#define TIM_CLOCKPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /!< Polarity for ETRx clock sources /
Kojto	96:487b796308b0	595	#define TIM_CLOCKPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /!< Polarity for TIx clock sources /
Kojto	96:487b796308b0	596	#define TIM_CLOCKPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /!< Polarity for TIx clock sources /
Kojto	96:487b796308b0	597	#define TIM_CLOCKPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /!< Polarity for TIx clock sources /
Kojto	96:487b796308b0	598	/**
Kojto	96:487b796308b0	599	* @}
Kojto	96:487b796308b0	600	*/
Kojto	96:487b796308b0	601
Kojto	96:487b796308b0	602	/** @defgroup TIM_Clock_Prescaler TIM Clock Prescaler
Kojto	96:487b796308b0	603	* @{
Kojto	96:487b796308b0	604	*/
Kojto	96:487b796308b0	605	#define TIM_CLOCKPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /!< No prescaler is used /
Kojto	96:487b796308b0	606	#define TIM_CLOCKPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /!< Prescaler for External ETR Clock: Capture performed once every 2 events. /
Kojto	96:487b796308b0	607	#define TIM_CLOCKPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /!< Prescaler for External ETR Clock: Capture performed once every 4 events. /
Kojto	96:487b796308b0	608	#define TIM_CLOCKPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /!< Prescaler for External ETR Clock: Capture performed once every 8 events. /
Kojto	96:487b796308b0	609	/**
Kojto	96:487b796308b0	610	* @}
Kojto	96:487b796308b0	611	*/
Kojto	96:487b796308b0	612
Kojto	96:487b796308b0	613	/** @defgroup TIM_ClearInput_Source TIM ClearInput Source
Kojto	96:487b796308b0	614	* @{
Kojto	96:487b796308b0	615	*/
Kojto	96:487b796308b0	616	#define TIM_CLEARINPUTSOURCE_ETR ((uint32_t)0x0001)
Kojto	96:487b796308b0	617	#define TIM_CLEARINPUTSOURCE_OCREFCLR ((uint32_t)0x0002)
Kojto	96:487b796308b0	618	#define TIM_CLEARINPUTSOURCE_NONE ((uint32_t)0x0000)
Kojto	96:487b796308b0	619	/**
Kojto	96:487b796308b0	620	* @}
Kojto	96:487b796308b0	621	*/
Kojto	96:487b796308b0	622
Kojto	96:487b796308b0	623	/** @defgroup TIM_ClearInput_Polarity TIM Clear Input Polarity
Kojto	96:487b796308b0	624	* @{
Kojto	96:487b796308b0	625	*/
Kojto	96:487b796308b0	626	#define TIM_CLEARINPUTPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /!< Polarity for ETRx pin /
Kojto	96:487b796308b0	627	#define TIM_CLEARINPUTPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /!< Polarity for ETRx pin /
Kojto	96:487b796308b0	628	/**
Kojto	96:487b796308b0	629	* @}
Kojto	96:487b796308b0	630	*/
Kojto	96:487b796308b0	631
Kojto	96:487b796308b0	632	/** @defgroup TIM_ClearInput_Prescaler TIM Clear Input Prescaler
Kojto	96:487b796308b0	633	* @{
Kojto	96:487b796308b0	634	*/
Kojto	96:487b796308b0	635	#define TIM_CLEARINPUTPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /!< No prescaler is used /
Kojto	96:487b796308b0	636	#define TIM_CLEARINPUTPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /!< Prescaler for External ETR pin: Capture performed once every 2 events. /
Kojto	96:487b796308b0	637	#define TIM_CLEARINPUTPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /!< Prescaler for External ETR pin: Capture performed once every 4 events. /
Kojto	96:487b796308b0	638	#define TIM_CLEARINPUTPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /!< Prescaler for External ETR pin: Capture performed once every 8 events. /
Kojto	96:487b796308b0	639	/**
Kojto	96:487b796308b0	640	* @}
Kojto	96:487b796308b0	641	*/
Kojto	96:487b796308b0	642
Kojto	96:487b796308b0	643	/** @defgroup TIM_OSSR_Off_State_Selection_for_Run_mode_state TIM OSSR Off State Selection for Run mode state
Kojto	96:487b796308b0	644	* @{
Kojto	96:487b796308b0	645	*/
Kojto	96:487b796308b0	646	#define TIM_OSSR_ENABLE (TIM_BDTR_OSSR)
Kojto	96:487b796308b0	647	#define TIM_OSSR_DISABLE ((uint32_t)0x0000)
Kojto	96:487b796308b0	648	/**
Kojto	96:487b796308b0	649	* @}
Kojto	96:487b796308b0	650	*/
Kojto	96:487b796308b0	651
Kojto	96:487b796308b0	652	/** @defgroup TIM_OSSI_Off_State_Selection_for_Idle_mode_state TIM OSSI Off State Selection for Idle mode state
Kojto	96:487b796308b0	653	* @{
Kojto	96:487b796308b0	654	*/
Kojto	96:487b796308b0	655	#define TIM_OSSI_ENABLE (TIM_BDTR_OSSI)
Kojto	96:487b796308b0	656	#define TIM_OSSI_DISABLE ((uint32_t)0x0000)
Kojto	96:487b796308b0	657	/**
Kojto	96:487b796308b0	658	* @}
Kojto	96:487b796308b0	659	*/
Kojto	96:487b796308b0	660
Kojto	96:487b796308b0	661	/** @defgroup TIM_Lock_level TIM Lock level
Kojto	96:487b796308b0	662	* @{
Kojto	96:487b796308b0	663	*/
Kojto	96:487b796308b0	664	#define TIM_LOCKLEVEL_OFF ((uint32_t)0x0000)
Kojto	96:487b796308b0	665	#define TIM_LOCKLEVEL_1 (TIM_BDTR_LOCK_0)
Kojto	96:487b796308b0	666	#define TIM_LOCKLEVEL_2 (TIM_BDTR_LOCK_1)
Kojto	96:487b796308b0	667	#define TIM_LOCKLEVEL_3 (TIM_BDTR_LOCK)
Kojto	96:487b796308b0	668	/**
Kojto	96:487b796308b0	669	* @}
Kojto	96:487b796308b0	670	*/
Kojto	96:487b796308b0	671
Kojto	96:487b796308b0	672	/** @defgroup TIM_Break_Input_enable_disable TIM Break Input Enable Disable
Kojto	96:487b796308b0	673	* @{
Kojto	96:487b796308b0	674	*/
Kojto	96:487b796308b0	675	#define TIM_BREAK_ENABLE (TIM_BDTR_BKE)
Kojto	96:487b796308b0	676	#define TIM_BREAK_DISABLE ((uint32_t)0x0000)
Kojto	96:487b796308b0	677	/**
Kojto	96:487b796308b0	678	* @}
Kojto	96:487b796308b0	679	*/
Kojto	96:487b796308b0	680
Kojto	96:487b796308b0	681	/** @defgroup TIM_Break_Polarity TIM Break Input Polarity
Kojto	96:487b796308b0	682	* @{
Kojto	96:487b796308b0	683	*/
Kojto	96:487b796308b0	684	#define TIM_BREAKPOLARITY_LOW ((uint32_t)0x0000)
Kojto	96:487b796308b0	685	#define TIM_BREAKPOLARITY_HIGH (TIM_BDTR_BKP)
Kojto	96:487b796308b0	686	/**
Kojto	96:487b796308b0	687	* @}
Kojto	96:487b796308b0	688	*/
Kojto	96:487b796308b0	689	/** @defgroup TIM_AOE_Bit_Set_Reset TIM Automatic Output Enable
Kojto	96:487b796308b0	690	* @{
Kojto	96:487b796308b0	691	*/
Kojto	96:487b796308b0	692	#define TIM_AUTOMATICOUTPUT_ENABLE (TIM_BDTR_AOE)
Kojto	96:487b796308b0	693	#define TIM_AUTOMATICOUTPUT_DISABLE ((uint32_t)0x0000)
Kojto	96:487b796308b0	694	/**
Kojto	96:487b796308b0	695	* @}
Kojto	96:487b796308b0	696	*/
Kojto	96:487b796308b0	697
Kojto	96:487b796308b0	698	/** @defgroup TIM_Master_Mode_Selection TIM Master Mode Selection
Kojto	96:487b796308b0	699	* @{
Kojto	96:487b796308b0	700	*/
Kojto	96:487b796308b0	701	#define TIM_TRGO_RESET ((uint32_t)0x0000)
Kojto	96:487b796308b0	702	#define TIM_TRGO_ENABLE (TIM_CR2_MMS_0)
Kojto	96:487b796308b0	703	#define TIM_TRGO_UPDATE (TIM_CR2_MMS_1)
Kojto	96:487b796308b0	704	#define TIM_TRGO_OC1 ((TIM_CR2_MMS_1 \| TIM_CR2_MMS_0))
Kojto	96:487b796308b0	705	#define TIM_TRGO_OC1REF (TIM_CR2_MMS_2)
Kojto	96:487b796308b0	706	#define TIM_TRGO_OC2REF ((TIM_CR2_MMS_2 \| TIM_CR2_MMS_0))
Kojto	96:487b796308b0	707	#define TIM_TRGO_OC3REF ((TIM_CR2_MMS_2 \| TIM_CR2_MMS_1))
Kojto	96:487b796308b0	708	#define TIM_TRGO_OC4REF ((TIM_CR2_MMS_2 \| TIM_CR2_MMS_1 \| TIM_CR2_MMS_0))
Kojto	96:487b796308b0	709	/**
Kojto	96:487b796308b0	710	* @}
Kojto	96:487b796308b0	711	*/
Kojto	96:487b796308b0	712
Kojto	96:487b796308b0	713	/** @defgroup TIM_Slave_Mode TIM Slave Mode
Kojto	96:487b796308b0	714	* @{
Kojto	96:487b796308b0	715	*/
Kojto	96:487b796308b0	716	#define TIM_SLAVEMODE_DISABLE ((uint32_t)0x0000)
Kojto	96:487b796308b0	717	#define TIM_SLAVEMODE_RESET ((uint32_t)0x0004)
Kojto	96:487b796308b0	718	#define TIM_SLAVEMODE_GATED ((uint32_t)0x0005)
Kojto	96:487b796308b0	719	#define TIM_SLAVEMODE_TRIGGER ((uint32_t)0x0006)
Kojto	96:487b796308b0	720	#define TIM_SLAVEMODE_EXTERNAL1 ((uint32_t)0x0007)
Kojto	96:487b796308b0	721	/**
Kojto	96:487b796308b0	722	* @}
Kojto	96:487b796308b0	723	*/
Kojto	96:487b796308b0	724
Kojto	96:487b796308b0	725	/** @defgroup TIM_Master_Slave_Mode TIM Master Slave Mode
Kojto	96:487b796308b0	726	* @{
Kojto	96:487b796308b0	727	*/
Kojto	96:487b796308b0	728	#define TIM_MASTERSLAVEMODE_ENABLE ((uint32_t)0x0080)
Kojto	96:487b796308b0	729	#define TIM_MASTERSLAVEMODE_DISABLE ((uint32_t)0x0000)
Kojto	96:487b796308b0	730	/**
Kojto	96:487b796308b0	731	* @}
Kojto	96:487b796308b0	732	*/
Kojto	96:487b796308b0	733
Kojto	96:487b796308b0	734	/** @defgroup TIM_Trigger_Selection TIM Trigger Selection
Kojto	96:487b796308b0	735	* @{
Kojto	96:487b796308b0	736	*/
Kojto	96:487b796308b0	737	#define TIM_TS_ITR0 ((uint32_t)0x0000)
Kojto	96:487b796308b0	738	#define TIM_TS_ITR1 ((uint32_t)0x0010)
Kojto	96:487b796308b0	739	#define TIM_TS_ITR2 ((uint32_t)0x0020)
Kojto	96:487b796308b0	740	#define TIM_TS_ITR3 ((uint32_t)0x0030)
Kojto	96:487b796308b0	741	#define TIM_TS_TI1F_ED ((uint32_t)0x0040)
Kojto	96:487b796308b0	742	#define TIM_TS_TI1FP1 ((uint32_t)0x0050)
Kojto	96:487b796308b0	743	#define TIM_TS_TI2FP2 ((uint32_t)0x0060)
Kojto	96:487b796308b0	744	#define TIM_TS_ETRF ((uint32_t)0x0070)
Kojto	96:487b796308b0	745	#define TIM_TS_NONE ((uint32_t)0xFFFF)
Kojto	96:487b796308b0	746	/**
Kojto	96:487b796308b0	747	* @}
Kojto	96:487b796308b0	748	*/
Kojto	96:487b796308b0	749
Kojto	96:487b796308b0	750	/** @defgroup TIM_Trigger_Polarity TIM Trigger Polarity
Kojto	96:487b796308b0	751	* @{
Kojto	96:487b796308b0	752	*/
Kojto	96:487b796308b0	753	#define TIM_TRIGGERPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /!< Polarity for ETRx trigger sources /
Kojto	96:487b796308b0	754	#define TIM_TRIGGERPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /!< Polarity for ETRx trigger sources /
Kojto	96:487b796308b0	755	#define TIM_TRIGGERPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /!< Polarity for TIxFPx or TI1_ED trigger sources /
Kojto	96:487b796308b0	756	#define TIM_TRIGGERPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /!< Polarity for TIxFPx or TI1_ED trigger sources /
Kojto	96:487b796308b0	757	#define TIM_TRIGGERPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /!< Polarity for TIxFPx or TI1_ED trigger sources /
Kojto	96:487b796308b0	758	/**
Kojto	96:487b796308b0	759	* @}
Kojto	96:487b796308b0	760	*/
Kojto	96:487b796308b0	761
Kojto	96:487b796308b0	762	/** @defgroup TIM_Trigger_Prescaler TIM Trigger Prescaler
Kojto	96:487b796308b0	763	* @{
Kojto	96:487b796308b0	764	*/
Kojto	96:487b796308b0	765	#define TIM_TRIGGERPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /!< No prescaler is used /
Kojto	96:487b796308b0	766	#define TIM_TRIGGERPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /!< Prescaler for External ETR Trigger: Capture performed once every 2 events. /
Kojto	96:487b796308b0	767	#define TIM_TRIGGERPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /!< Prescaler for External ETR Trigger: Capture performed once every 4 events. /
Kojto	96:487b796308b0	768	#define TIM_TRIGGERPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /!< Prescaler for External ETR Trigger: Capture performed once every 8 events. /
Kojto	96:487b796308b0	769	/**
Kojto	96:487b796308b0	770	* @}
Kojto	96:487b796308b0	771	*/
Kojto	96:487b796308b0	772
Kojto	96:487b796308b0	773	/** @defgroup TIM_TI1_Selection TIM TI1 Input Selection
Kojto	96:487b796308b0	774	* @{
Kojto	96:487b796308b0	775	*/
Kojto	96:487b796308b0	776	#define TIM_TI1SELECTION_CH1 ((uint32_t)0x0000)
Kojto	96:487b796308b0	777	#define TIM_TI1SELECTION_XORCOMBINATION (TIM_CR2_TI1S)
Kojto	96:487b796308b0	778	/**
Kojto	96:487b796308b0	779	* @}
Kojto	96:487b796308b0	780	*/
Kojto	96:487b796308b0	781
Kojto	96:487b796308b0	782	/** @defgroup TIM_DMA_Base_address TIM DMA Base Address
Kojto	96:487b796308b0	783	* @{
Kojto	96:487b796308b0	784	*/
Kojto	96:487b796308b0	785	#define TIM_DMABASE_CR1 (0x00000000)
Kojto	96:487b796308b0	786	#define TIM_DMABASE_CR2 (0x00000001)
Kojto	96:487b796308b0	787	#define TIM_DMABASE_SMCR (0x00000002)
Kojto	96:487b796308b0	788	#define TIM_DMABASE_DIER (0x00000003)
Kojto	96:487b796308b0	789	#define TIM_DMABASE_SR (0x00000004)
Kojto	96:487b796308b0	790	#define TIM_DMABASE_EGR (0x00000005)
Kojto	96:487b796308b0	791	#define TIM_DMABASE_CCMR1 (0x00000006)
Kojto	96:487b796308b0	792	#define TIM_DMABASE_CCMR2 (0x00000007)
Kojto	96:487b796308b0	793	#define TIM_DMABASE_CCER (0x00000008)
Kojto	96:487b796308b0	794	#define TIM_DMABASE_CNT (0x00000009)
Kojto	96:487b796308b0	795	#define TIM_DMABASE_PSC (0x0000000A)
Kojto	96:487b796308b0	796	#define TIM_DMABASE_ARR (0x0000000B)
Kojto	96:487b796308b0	797	#define TIM_DMABASE_RCR (0x0000000C)
Kojto	96:487b796308b0	798	#define TIM_DMABASE_CCR1 (0x0000000D)
Kojto	96:487b796308b0	799	#define TIM_DMABASE_CCR2 (0x0000000E)
Kojto	96:487b796308b0	800	#define TIM_DMABASE_CCR3 (0x0000000F)
Kojto	96:487b796308b0	801	#define TIM_DMABASE_CCR4 (0x00000010)
Kojto	96:487b796308b0	802	#define TIM_DMABASE_BDTR (0x00000011)
Kojto	96:487b796308b0	803	#define TIM_DMABASE_DCR (0x00000012)
Kojto	96:487b796308b0	804	/**
Kojto	96:487b796308b0	805	* @}
Kojto	96:487b796308b0	806	*/
Kojto	96:487b796308b0	807
Kojto	96:487b796308b0	808	/** @defgroup TIM_DMA_Burst_Length TIM DMA Burst Length
Kojto	96:487b796308b0	809	* @{
Kojto	96:487b796308b0	810	*/
Kojto	96:487b796308b0	811	#define TIM_DMABURSTLENGTH_1TRANSFER (0x00000000)
Kojto	96:487b796308b0	812	#define TIM_DMABURSTLENGTH_2TRANSFERS (0x00000100)
Kojto	96:487b796308b0	813	#define TIM_DMABURSTLENGTH_3TRANSFERS (0x00000200)
Kojto	96:487b796308b0	814	#define TIM_DMABURSTLENGTH_4TRANSFERS (0x00000300)
Kojto	96:487b796308b0	815	#define TIM_DMABURSTLENGTH_5TRANSFERS (0x00000400)
Kojto	96:487b796308b0	816	#define TIM_DMABURSTLENGTH_6TRANSFERS (0x00000500)
Kojto	96:487b796308b0	817	#define TIM_DMABURSTLENGTH_7TRANSFERS (0x00000600)
Kojto	96:487b796308b0	818	#define TIM_DMABURSTLENGTH_8TRANSFERS (0x00000700)
Kojto	96:487b796308b0	819	#define TIM_DMABURSTLENGTH_9TRANSFERS (0x00000800)
Kojto	96:487b796308b0	820	#define TIM_DMABURSTLENGTH_10TRANSFERS (0x00000900)
Kojto	96:487b796308b0	821	#define TIM_DMABURSTLENGTH_11TRANSFERS (0x00000A00)
Kojto	96:487b796308b0	822	#define TIM_DMABURSTLENGTH_12TRANSFERS (0x00000B00)
Kojto	96:487b796308b0	823	#define TIM_DMABURSTLENGTH_13TRANSFERS (0x00000C00)
Kojto	96:487b796308b0	824	#define TIM_DMABURSTLENGTH_14TRANSFERS (0x00000D00)
Kojto	96:487b796308b0	825	#define TIM_DMABURSTLENGTH_15TRANSFERS (0x00000E00)
Kojto	96:487b796308b0	826	#define TIM_DMABURSTLENGTH_16TRANSFERS (0x00000F00)
Kojto	96:487b796308b0	827	#define TIM_DMABURSTLENGTH_17TRANSFERS (0x00001000)
Kojto	96:487b796308b0	828	#define TIM_DMABURSTLENGTH_18TRANSFERS (0x00001100)
Kojto	96:487b796308b0	829	/**
Kojto	96:487b796308b0	830	* @}
Kojto	96:487b796308b0	831	*/
Kojto	96:487b796308b0	832
Kojto	96:487b796308b0	833	/** @defgroup TIM_DMA_Handle_index TIM DMA Handle Index
Kojto	96:487b796308b0	834	* @{
Kojto	96:487b796308b0	835	*/
Kojto	96:487b796308b0	836	#define TIM_DMA_ID_UPDATE ((uint16_t) 0x0) /!< Index of the DMA handle used for Update DMA requests /
Kojto	96:487b796308b0	837	#define TIM_DMA_ID_CC1 ((uint16_t) 0x1) /!< Index of the DMA handle used for Capture/Compare 1 DMA requests /
Kojto	96:487b796308b0	838	#define TIM_DMA_ID_CC2 ((uint16_t) 0x2) /!< Index of the DMA handle used for Capture/Compare 2 DMA requests /
Kojto	96:487b796308b0	839	#define TIM_DMA_ID_CC3 ((uint16_t) 0x3) /!< Index of the DMA handle used for Capture/Compare 3 DMA requests /
Kojto	96:487b796308b0	840	#define TIM_DMA_ID_CC4 ((uint16_t) 0x4) /!< Index of the DMA handle used for Capture/Compare 4 DMA requests /
Kojto	96:487b796308b0	841	#define TIM_DMA_ID_COMMUTATION ((uint16_t) 0x5) /!< Index of the DMA handle used for Commutation DMA requests /
Kojto	96:487b796308b0	842	#define TIM_DMA_ID_TRIGGER ((uint16_t) 0x6) /!< Index of the DMA handle used for Trigger DMA requests /
Kojto	96:487b796308b0	843	/**
Kojto	96:487b796308b0	844	* @}
Kojto	96:487b796308b0	845	*/
Kojto	96:487b796308b0	846
Kojto	96:487b796308b0	847	/** @defgroup TIM_Channel_CC_State TIM Capture/Compare Channel State
Kojto	96:487b796308b0	848	* @{
Kojto	96:487b796308b0	849	*/
Kojto	96:487b796308b0	850	#define TIM_CCx_ENABLE ((uint32_t)0x0001)
Kojto	96:487b796308b0	851	#define TIM_CCx_DISABLE ((uint32_t)0x0000)
Kojto	96:487b796308b0	852	#define TIM_CCxN_ENABLE ((uint32_t)0x0004)
Kojto	96:487b796308b0	853	#define TIM_CCxN_DISABLE ((uint32_t)0x0000)
Kojto	96:487b796308b0	854	/**
Kojto	96:487b796308b0	855	* @}
Kojto	96:487b796308b0	856	*/
Kojto	96:487b796308b0	857
Kojto	96:487b796308b0	858	/**
Kojto	96:487b796308b0	859	* @}
Kojto	96:487b796308b0	860	*/
Kojto	96:487b796308b0	861
Kojto	96:487b796308b0	862	/* Private Constants -----------------------------------------------------------*/
Kojto	96:487b796308b0	863	/** @defgroup TIM_Private_Constants TIM Private Constants
Kojto	96:487b796308b0	864	* @{
Kojto	96:487b796308b0	865	*/
Kojto	96:487b796308b0	866
Kojto	96:487b796308b0	867	/* The counter of a timer instance is disabled only if all the CCx
Kojto	96:487b796308b0	868	channels have been disabled */
Kojto	96:487b796308b0	869	#define TIM_CCER_CCxE_MASK ((uint32_t)(TIM_CCER_CC1E \| TIM_CCER_CC2E \| TIM_CCER_CC3E \| TIM_CCER_CC4E))
Kojto	96:487b796308b0	870
Kojto	96:487b796308b0	871	/* The counter of a timer instance is disabled only if all the CCx and CCxN
Kojto	96:487b796308b0	872	channels have been disabled */
Kojto	96:487b796308b0	873	#define TIM_CCER_CCxE_MASK ((uint32_t)(TIM_CCER_CC1E \| TIM_CCER_CC2E \| TIM_CCER_CC3E \| TIM_CCER_CC4E))
Kojto	96:487b796308b0	874	#define TIM_CCER_CCxNE_MASK ((uint32_t)(TIM_CCER_CC1NE \| TIM_CCER_CC2NE \| TIM_CCER_CC3NE))
Kojto	96:487b796308b0	875
Kojto	96:487b796308b0	876	/**
Kojto	96:487b796308b0	877	* @}
Kojto	96:487b796308b0	878	*/
Kojto	96:487b796308b0	879
Kojto	96:487b796308b0	880	/* Private Macros -----------------------------------------------------------*/
Kojto	96:487b796308b0	881	/** @defgroup TIM_Private_Macros TIM Private Macros
Kojto	96:487b796308b0	882	* @{
Kojto	96:487b796308b0	883	*/
Kojto	96:487b796308b0	884
Kojto	96:487b796308b0	885	#define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_COUNTERMODE_UP) \|\| \
Kojto	96:487b796308b0	886	((MODE) == TIM_COUNTERMODE_DOWN) \|\| \
Kojto	96:487b796308b0	887	((MODE) == TIM_COUNTERMODE_CENTERALIGNED1) \|\| \
Kojto	96:487b796308b0	888	((MODE) == TIM_COUNTERMODE_CENTERALIGNED2) \|\| \
Kojto	96:487b796308b0	889	((MODE) == TIM_COUNTERMODE_CENTERALIGNED3))
Kojto	96:487b796308b0	890
Kojto	96:487b796308b0	891	#define IS_TIM_CLOCKDIVISION_DIV(DIV) (((DIV) == TIM_CLOCKDIVISION_DIV1) \|\| \
Kojto	96:487b796308b0	892	((DIV) == TIM_CLOCKDIVISION_DIV2) \|\| \
Kojto	96:487b796308b0	893	((DIV) == TIM_CLOCKDIVISION_DIV4))
Kojto	96:487b796308b0	894
Kojto	96:487b796308b0	895	#define IS_TIM_PWM_MODE(MODE) (((MODE) == TIM_OCMODE_PWM1) \|\| \
Kojto	96:487b796308b0	896	((MODE) == TIM_OCMODE_PWM2))
Kojto	96:487b796308b0	897
Kojto	96:487b796308b0	898	#define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMODE_TIMING) \|\| \
Kojto	96:487b796308b0	899	((MODE) == TIM_OCMODE_ACTIVE) \|\| \
Kojto	96:487b796308b0	900	((MODE) == TIM_OCMODE_INACTIVE) \|\| \
Kojto	96:487b796308b0	901	((MODE) == TIM_OCMODE_TOGGLE) \|\| \
Kojto	96:487b796308b0	902	((MODE) == TIM_OCMODE_FORCED_ACTIVE) \|\| \
Kojto	96:487b796308b0	903	((MODE) == TIM_OCMODE_FORCED_INACTIVE))
Kojto	96:487b796308b0	904
Kojto	96:487b796308b0	905	#define IS_TIM_FAST_STATE(STATE) (((STATE) == TIM_OCFAST_DISABLE) \|\| \
Kojto	96:487b796308b0	906	((STATE) == TIM_OCFAST_ENABLE))
Kojto	96:487b796308b0	907
Kojto	96:487b796308b0	908	#define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPOLARITY_HIGH) \|\| \
Kojto	96:487b796308b0	909	((POLARITY) == TIM_OCPOLARITY_LOW))
Kojto	96:487b796308b0	910
Kojto	96:487b796308b0	911	#define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPOLARITY_HIGH) \|\| \
Kojto	96:487b796308b0	912	((POLARITY) == TIM_OCNPOLARITY_LOW))
Kojto	96:487b796308b0	913
Kojto	96:487b796308b0	914	#define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIDLESTATE_SET) \|\| \
Kojto	96:487b796308b0	915	((STATE) == TIM_OCIDLESTATE_RESET))
Kojto	96:487b796308b0	916
Kojto	96:487b796308b0	917	#define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIDLESTATE_SET) \|\| \
Kojto	96:487b796308b0	918	((STATE) == TIM_OCNIDLESTATE_RESET))
Kojto	96:487b796308b0	919
Kojto	96:487b796308b0	920	#define IS_TIM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) \|\| \
Kojto	96:487b796308b0	921	((CHANNEL) == TIM_CHANNEL_2) \|\| \
Kojto	96:487b796308b0	922	((CHANNEL) == TIM_CHANNEL_3) \|\| \
Kojto	96:487b796308b0	923	((CHANNEL) == TIM_CHANNEL_4) \|\| \
Kojto	96:487b796308b0	924	((CHANNEL) == TIM_CHANNEL_ALL))
Kojto	96:487b796308b0	925
Kojto	96:487b796308b0	926	#define IS_TIM_OPM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) \|\| \
Kojto	96:487b796308b0	927	((CHANNEL) == TIM_CHANNEL_2))
Kojto	96:487b796308b0	928
Kojto	96:487b796308b0	929	#define IS_TIM_COMPLEMENTARY_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) \|\| \
Kojto	96:487b796308b0	930	((CHANNEL) == TIM_CHANNEL_2) \|\| \
Kojto	96:487b796308b0	931	((CHANNEL) == TIM_CHANNEL_3))
Kojto	96:487b796308b0	932
Kojto	96:487b796308b0	933	#define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPOLARITY_RISING) \|\| \
Kojto	96:487b796308b0	934	((POLARITY) == TIM_ICPOLARITY_FALLING) \|\| \
Kojto	96:487b796308b0	935	((POLARITY) == TIM_ICPOLARITY_BOTHEDGE))
Kojto	96:487b796308b0	936
Kojto	96:487b796308b0	937	#define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSELECTION_DIRECTTI) \|\| \
Kojto	96:487b796308b0	938	((SELECTION) == TIM_ICSELECTION_INDIRECTTI) \|\| \
Kojto	96:487b796308b0	939	((SELECTION) == TIM_ICSELECTION_TRC))
Kojto	96:487b796308b0	940
Kojto	96:487b796308b0	941	#define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) \|\| \
Kojto	96:487b796308b0	942	((PRESCALER) == TIM_ICPSC_DIV2) \|\| \
Kojto	96:487b796308b0	943	((PRESCALER) == TIM_ICPSC_DIV4) \|\| \
Kojto	96:487b796308b0	944	((PRESCALER) == TIM_ICPSC_DIV8))
Kojto	96:487b796308b0	945
Kojto	96:487b796308b0	946	#define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMODE_SINGLE) \|\| \
Kojto	96:487b796308b0	947	((MODE) == TIM_OPMODE_REPETITIVE))
Kojto	96:487b796308b0	948
Kojto	96:487b796308b0	949	#define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_ENCODERMODE_TI1) \|\| \
Kojto	96:487b796308b0	950	((MODE) == TIM_ENCODERMODE_TI2) \|\| \
Kojto	96:487b796308b0	951	((MODE) == TIM_ENCODERMODE_TI12))
Kojto	96:487b796308b0	952
Kojto	96:487b796308b0	953	#define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & 0xFFFF80FF) == 0x00000000) && ((SOURCE) != 0x00000000))
Kojto	96:487b796308b0	954
Kojto	96:487b796308b0	955	#define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & 0xFFFFFF00) == 0x00000000) && ((SOURCE) != 0x00000000))
Kojto	96:487b796308b0	956
Kojto	96:487b796308b0	957	#define IS_TIM_CLOCKSOURCE(CLOCK) (((CLOCK) == TIM_CLOCKSOURCE_INTERNAL) \|\| \
Kojto	96:487b796308b0	958	((CLOCK) == TIM_CLOCKSOURCE_ETRMODE2) \|\| \
Kojto	96:487b796308b0	959	((CLOCK) == TIM_CLOCKSOURCE_ITR0) \|\| \
Kojto	96:487b796308b0	960	((CLOCK) == TIM_CLOCKSOURCE_ITR1) \|\| \
Kojto	96:487b796308b0	961	((CLOCK) == TIM_CLOCKSOURCE_ITR2) \|\| \
Kojto	96:487b796308b0	962	((CLOCK) == TIM_CLOCKSOURCE_ITR3) \|\| \
Kojto	96:487b796308b0	963	((CLOCK) == TIM_CLOCKSOURCE_TI1ED) \|\| \
Kojto	96:487b796308b0	964	((CLOCK) == TIM_CLOCKSOURCE_TI1) \|\| \
Kojto	96:487b796308b0	965	((CLOCK) == TIM_CLOCKSOURCE_TI2) \|\| \
Kojto	96:487b796308b0	966	((CLOCK) == TIM_CLOCKSOURCE_ETRMODE1))
Kojto	96:487b796308b0	967
Kojto	96:487b796308b0	968	#define IS_TIM_CLOCKPOLARITY(POLARITY) (((POLARITY) == TIM_CLOCKPOLARITY_INVERTED) \|\| \
Kojto	96:487b796308b0	969	((POLARITY) == TIM_CLOCKPOLARITY_NONINVERTED) \|\| \
Kojto	96:487b796308b0	970	((POLARITY) == TIM_CLOCKPOLARITY_RISING) \|\| \
Kojto	96:487b796308b0	971	((POLARITY) == TIM_CLOCKPOLARITY_FALLING) \|\| \
Kojto	96:487b796308b0	972	((POLARITY) == TIM_CLOCKPOLARITY_BOTHEDGE))
Kojto	96:487b796308b0	973
Kojto	96:487b796308b0	974	#define IS_TIM_CLOCKPRESCALER(PRESCALER) (((PRESCALER) == TIM_CLOCKPRESCALER_DIV1) \|\| \
Kojto	96:487b796308b0	975	((PRESCALER) == TIM_CLOCKPRESCALER_DIV2) \|\| \
Kojto	96:487b796308b0	976	((PRESCALER) == TIM_CLOCKPRESCALER_DIV4) \|\| \
Kojto	96:487b796308b0	977	((PRESCALER) == TIM_CLOCKPRESCALER_DIV8))
Kojto	96:487b796308b0	978
Kojto	96:487b796308b0	979	#define IS_TIM_CLOCKFILTER(ICFILTER) ((ICFILTER) <= 0xF)
Kojto	96:487b796308b0	980
Kojto	96:487b796308b0	981	#define IS_TIM_CLEARINPUT_SOURCE(SOURCE) (((SOURCE) == TIM_CLEARINPUTSOURCE_ETR) \|\| \
Kojto	96:487b796308b0	982	((SOURCE) == TIM_CLEARINPUTSOURCE_OCREFCLR) \|\| \
Kojto	96:487b796308b0	983	((SOURCE) == TIM_CLEARINPUTSOURCE_NONE))
Kojto	96:487b796308b0	984
Kojto	96:487b796308b0	985	#define IS_TIM_CLEARINPUT_POLARITY(POLARITY) (((POLARITY) == TIM_CLEARINPUTPOLARITY_INVERTED) \|\| \
Kojto	96:487b796308b0	986	((POLARITY) == TIM_CLEARINPUTPOLARITY_NONINVERTED))
Kojto	96:487b796308b0	987
Kojto	96:487b796308b0	988	#define IS_TIM_CLEARINPUT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_CLEARINPUTPRESCALER_DIV1) \|\| \
Kojto	96:487b796308b0	989	((PRESCALER) == TIM_CLEARINPUTPRESCALER_DIV2) \|\| \
Kojto	96:487b796308b0	990	((PRESCALER) == TIM_CLEARINPUTPRESCALER_DIV4) \|\| \
Kojto	96:487b796308b0	991	((PRESCALER) == TIM_CLEARINPUTPRESCALER_DIV8))
Kojto	96:487b796308b0	992
Kojto	96:487b796308b0	993	#define IS_TIM_CLEARINPUT_FILTER(ICFILTER) ((ICFILTER) <= 0xF)
Kojto	96:487b796308b0	994
Kojto	96:487b796308b0	995	#define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSR_ENABLE) \|\| \
Kojto	96:487b796308b0	996	((STATE) == TIM_OSSR_DISABLE))
Kojto	96:487b796308b0	997
Kojto	96:487b796308b0	998	#define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSI_ENABLE) \|\| \
Kojto	96:487b796308b0	999	((STATE) == TIM_OSSI_DISABLE))
Kojto	96:487b796308b0	1000
Kojto	96:487b796308b0	1001	#define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLEVEL_OFF) \|\| \
Kojto	96:487b796308b0	1002	((LEVEL) == TIM_LOCKLEVEL_1) \|\| \
Kojto	96:487b796308b0	1003	((LEVEL) == TIM_LOCKLEVEL_2) \|\| \
Kojto	96:487b796308b0	1004	((LEVEL) == TIM_LOCKLEVEL_3))
Kojto	96:487b796308b0	1005
Kojto	96:487b796308b0	1006	#define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_BREAK_ENABLE) \|\| \
Kojto	96:487b796308b0	1007	((STATE) == TIM_BREAK_DISABLE))
Kojto	96:487b796308b0	1008
Kojto	96:487b796308b0	1009	#define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BREAKPOLARITY_LOW) \|\| \
Kojto	96:487b796308b0	1010	((POLARITY) == TIM_BREAKPOLARITY_HIGH))
Kojto	96:487b796308b0	1011
Kojto	96:487b796308b0	1012	#define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AUTOMATICOUTPUT_ENABLE) \|\| \
Kojto	96:487b796308b0	1013	((STATE) == TIM_AUTOMATICOUTPUT_DISABLE))
Kojto	96:487b796308b0	1014
Kojto	96:487b796308b0	1015	#define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGO_RESET) \|\| \
Kojto	96:487b796308b0	1016	((SOURCE) == TIM_TRGO_ENABLE) \|\| \
Kojto	96:487b796308b0	1017	((SOURCE) == TIM_TRGO_UPDATE) \|\| \
Kojto	96:487b796308b0	1018	((SOURCE) == TIM_TRGO_OC1) \|\| \
Kojto	96:487b796308b0	1019	((SOURCE) == TIM_TRGO_OC1REF) \|\| \
Kojto	96:487b796308b0	1020	((SOURCE) == TIM_TRGO_OC2REF) \|\| \
Kojto	96:487b796308b0	1021	((SOURCE) == TIM_TRGO_OC3REF) \|\| \
Kojto	96:487b796308b0	1022	((SOURCE) == TIM_TRGO_OC4REF))
Kojto	96:487b796308b0	1023
Kojto	96:487b796308b0	1024	#define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SLAVEMODE_DISABLE) \|\| \
Kojto	96:487b796308b0	1025	((MODE) == TIM_SLAVEMODE_GATED) \|\| \
Kojto	96:487b796308b0	1026	((MODE) == TIM_SLAVEMODE_RESET) \|\| \
Kojto	96:487b796308b0	1027	((MODE) == TIM_SLAVEMODE_TRIGGER) \|\| \
Kojto	96:487b796308b0	1028	((MODE) == TIM_SLAVEMODE_EXTERNAL1))
Kojto	96:487b796308b0	1029
Kojto	96:487b796308b0	1030	#define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MASTERSLAVEMODE_ENABLE) \|\| \
Kojto	96:487b796308b0	1031	((STATE) == TIM_MASTERSLAVEMODE_DISABLE))
Kojto	96:487b796308b0	1032
Kojto	96:487b796308b0	1033	#define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) \|\| \
Kojto	96:487b796308b0	1034	((SELECTION) == TIM_TS_ITR1) \|\| \
Kojto	96:487b796308b0	1035	((SELECTION) == TIM_TS_ITR2) \|\| \
Kojto	96:487b796308b0	1036	((SELECTION) == TIM_TS_ITR3) \|\| \
Kojto	96:487b796308b0	1037	((SELECTION) == TIM_TS_TI1F_ED) \|\| \
Kojto	96:487b796308b0	1038	((SELECTION) == TIM_TS_TI1FP1) \|\| \
Kojto	96:487b796308b0	1039	((SELECTION) == TIM_TS_TI2FP2) \|\| \
Kojto	96:487b796308b0	1040	((SELECTION) == TIM_TS_ETRF))
Kojto	96:487b796308b0	1041
Kojto	96:487b796308b0	1042	#define IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) \|\| \
Kojto	96:487b796308b0	1043	((SELECTION) == TIM_TS_ITR1) \|\| \
Kojto	96:487b796308b0	1044	((SELECTION) == TIM_TS_ITR2) \|\| \
Kojto	96:487b796308b0	1045	((SELECTION) == TIM_TS_ITR3) \|\| \
Kojto	96:487b796308b0	1046	((SELECTION) == TIM_TS_NONE))
Kojto	96:487b796308b0	1047
Kojto	96:487b796308b0	1048	#define IS_TIM_TRIGGERPOLARITY(POLARITY) (((POLARITY) == TIM_TRIGGERPOLARITY_INVERTED ) \|\| \
Kojto	96:487b796308b0	1049	((POLARITY) == TIM_TRIGGERPOLARITY_NONINVERTED) \|\| \
Kojto	96:487b796308b0	1050	((POLARITY) == TIM_TRIGGERPOLARITY_RISING ) \|\| \
Kojto	96:487b796308b0	1051	((POLARITY) == TIM_TRIGGERPOLARITY_FALLING ) \|\| \
Kojto	96:487b796308b0	1052	((POLARITY) == TIM_TRIGGERPOLARITY_BOTHEDGE ))
Kojto	96:487b796308b0	1053
Kojto	96:487b796308b0	1054	#define IS_TIM_TRIGGERPRESCALER(PRESCALER) (((PRESCALER) == TIM_TRIGGERPRESCALER_DIV1) \|\| \
Kojto	96:487b796308b0	1055	((PRESCALER) == TIM_TRIGGERPRESCALER_DIV2) \|\| \
Kojto	96:487b796308b0	1056	((PRESCALER) == TIM_TRIGGERPRESCALER_DIV4) \|\| \
Kojto	96:487b796308b0	1057	((PRESCALER) == TIM_TRIGGERPRESCALER_DIV8))
Kojto	96:487b796308b0	1058
Kojto	96:487b796308b0	1059	#define IS_TIM_TRIGGERFILTER(ICFILTER) ((ICFILTER) <= 0xF)
Kojto	96:487b796308b0	1060
Kojto	96:487b796308b0	1061	#define IS_TIM_TI1SELECTION(TI1SELECTION) (((TI1SELECTION) == TIM_TI1SELECTION_CH1) \|\| \
Kojto	96:487b796308b0	1062	((TI1SELECTION) == TIM_TI1SELECTION_XORCOMBINATION))
Kojto	96:487b796308b0	1063
Kojto	96:487b796308b0	1064	#define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABASE_CR1) \|\| \
Kojto	96:487b796308b0	1065	((BASE) == TIM_DMABASE_CR2) \|\| \
Kojto	96:487b796308b0	1066	((BASE) == TIM_DMABASE_SMCR) \|\| \
Kojto	96:487b796308b0	1067	((BASE) == TIM_DMABASE_DIER) \|\| \
Kojto	96:487b796308b0	1068	((BASE) == TIM_DMABASE_SR) \|\| \
Kojto	96:487b796308b0	1069	((BASE) == TIM_DMABASE_EGR) \|\| \
Kojto	96:487b796308b0	1070	((BASE) == TIM_DMABASE_CCMR1) \|\| \
Kojto	96:487b796308b0	1071	((BASE) == TIM_DMABASE_CCMR2) \|\| \
Kojto	96:487b796308b0	1072	((BASE) == TIM_DMABASE_CCER) \|\| \
Kojto	96:487b796308b0	1073	((BASE) == TIM_DMABASE_CNT) \|\| \
Kojto	96:487b796308b0	1074	((BASE) == TIM_DMABASE_PSC) \|\| \
Kojto	96:487b796308b0	1075	((BASE) == TIM_DMABASE_ARR) \|\| \
Kojto	96:487b796308b0	1076	((BASE) == TIM_DMABASE_RCR) \|\| \
Kojto	96:487b796308b0	1077	((BASE) == TIM_DMABASE_CCR1) \|\| \
Kojto	96:487b796308b0	1078	((BASE) == TIM_DMABASE_CCR2) \|\| \
Kojto	96:487b796308b0	1079	((BASE) == TIM_DMABASE_CCR3) \|\| \
Kojto	96:487b796308b0	1080	((BASE) == TIM_DMABASE_CCR4) \|\| \
Kojto	96:487b796308b0	1081	((BASE) == TIM_DMABASE_BDTR) \|\| \
Kojto	96:487b796308b0	1082	((BASE) == TIM_DMABASE_DCR))
Kojto	96:487b796308b0	1083
Kojto	96:487b796308b0	1084	#define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABURSTLENGTH_1TRANSFER) \|\| \
Kojto	96:487b796308b0	1085	((LENGTH) == TIM_DMABURSTLENGTH_2TRANSFERS) \|\| \
Kojto	96:487b796308b0	1086	((LENGTH) == TIM_DMABURSTLENGTH_3TRANSFERS) \|\| \
Kojto	96:487b796308b0	1087	((LENGTH) == TIM_DMABURSTLENGTH_4TRANSFERS) \|\| \
Kojto	96:487b796308b0	1088	((LENGTH) == TIM_DMABURSTLENGTH_5TRANSFERS) \|\| \
Kojto	96:487b796308b0	1089	((LENGTH) == TIM_DMABURSTLENGTH_6TRANSFERS) \|\| \
Kojto	96:487b796308b0	1090	((LENGTH) == TIM_DMABURSTLENGTH_7TRANSFERS) \|\| \
Kojto	96:487b796308b0	1091	((LENGTH) == TIM_DMABURSTLENGTH_8TRANSFERS) \|\| \
Kojto	96:487b796308b0	1092	((LENGTH) == TIM_DMABURSTLENGTH_9TRANSFERS) \|\| \
Kojto	96:487b796308b0	1093	((LENGTH) == TIM_DMABURSTLENGTH_10TRANSFERS) \|\| \
Kojto	96:487b796308b0	1094	((LENGTH) == TIM_DMABURSTLENGTH_11TRANSFERS) \|\| \
Kojto	96:487b796308b0	1095	((LENGTH) == TIM_DMABURSTLENGTH_12TRANSFERS) \|\| \
Kojto	96:487b796308b0	1096	((LENGTH) == TIM_DMABURSTLENGTH_13TRANSFERS) \|\| \
Kojto	96:487b796308b0	1097	((LENGTH) == TIM_DMABURSTLENGTH_14TRANSFERS) \|\| \
Kojto	96:487b796308b0	1098	((LENGTH) == TIM_DMABURSTLENGTH_15TRANSFERS) \|\| \
Kojto	96:487b796308b0	1099	((LENGTH) == TIM_DMABURSTLENGTH_16TRANSFERS) \|\| \
Kojto	96:487b796308b0	1100	((LENGTH) == TIM_DMABURSTLENGTH_17TRANSFERS) \|\| \
Kojto	96:487b796308b0	1101	((LENGTH) == TIM_DMABURSTLENGTH_18TRANSFERS))
Kojto	96:487b796308b0	1102
Kojto	96:487b796308b0	1103	#define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF)
Kojto	96:487b796308b0	1104
Kojto	96:487b796308b0	1105	/** @brief Set TIM IC prescaler
Kojto	96:487b796308b0	1106	* @param __HANDLE__: TIM handle
Kojto	96:487b796308b0	1107	* @param __CHANNEL__: specifies TIM Channel
Kojto	96:487b796308b0	1108	* @param __ICPSC__: specifies the prescaler value.
Kojto	96:487b796308b0	1109	* @retval None
Kojto	96:487b796308b0	1110	*/
Kojto	96:487b796308b0	1111	#define TIM_SET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__, __ICPSC__) \
Kojto	96:487b796308b0	1112	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 \|= (__ICPSC__)) :\
Kojto	96:487b796308b0	1113	((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 \|= ((__ICPSC__) << 8)) :\
Kojto	96:487b796308b0	1114	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 \|= (__ICPSC__)) :\
Kojto	96:487b796308b0	1115	((__HANDLE__)->Instance->CCMR2 \|= ((__ICPSC__) << 8)))
Kojto	96:487b796308b0	1116
Kojto	96:487b796308b0	1117	/** @brief Reset TIM IC prescaler
Kojto	96:487b796308b0	1118	* @param __HANDLE__: TIM handle
Kojto	96:487b796308b0	1119	* @param __CHANNEL__: specifies TIM Channel
Kojto	96:487b796308b0	1120	* @retval None
Kojto	96:487b796308b0	1121	*/
Kojto	96:487b796308b0	1122	#define TIM_RESET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__) \
Kojto	96:487b796308b0	1123	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC) :\
Kojto	96:487b796308b0	1124	((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC) :\
Kojto	96:487b796308b0	1125	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC) :\
Kojto	96:487b796308b0	1126	((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC))
Kojto	96:487b796308b0	1127
Kojto	96:487b796308b0	1128
Kojto	96:487b796308b0	1129	/** @brief Set TIM IC polarity
Kojto	96:487b796308b0	1130	* @param __HANDLE__: TIM handle
Kojto	96:487b796308b0	1131	* @param __CHANNEL__: specifies TIM Channel
Kojto	96:487b796308b0	1132	* @param __POLARITY__: specifies TIM Channel Polarity
Kojto	96:487b796308b0	1133	* @retval None
Kojto	96:487b796308b0	1134	*/
Kojto	96:487b796308b0	1135	#define TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \
Kojto	96:487b796308b0	1136	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER \|= (__POLARITY__)) :\
Kojto	96:487b796308b0	1137	((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER \|= ((__POLARITY__) << 4)) :\
Kojto	96:487b796308b0	1138	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER \|= ((__POLARITY__) << 8)) :\
Kojto	96:487b796308b0	1139	((__HANDLE__)->Instance->CCER \|= (((__POLARITY__) << 12) & TIM_CCER_CC4P)))
Kojto	96:487b796308b0	1140
Kojto	96:487b796308b0	1141	/** @brief Reset TIM IC polarity
Kojto	96:487b796308b0	1142	* @param __HANDLE__: TIM handle
Kojto	96:487b796308b0	1143	* @param __CHANNEL__: specifies TIM Channel
Kojto	96:487b796308b0	1144	* @retval None
Kojto	96:487b796308b0	1145	*/
Kojto	96:487b796308b0	1146	#define TIM_RESET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__) \
Kojto	96:487b796308b0	1147	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC1P \| TIM_CCER_CC1NP)) :\
Kojto	96:487b796308b0	1148	((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC2P \| TIM_CCER_CC2NP)) :\
Kojto	96:487b796308b0	1149	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC3P \| TIM_CCER_CC3NP)) :\
Kojto	96:487b796308b0	1150	((__HANDLE__)->Instance->CCER &= (uint16_t)~TIM_CCER_CC4P))
Kojto	96:487b796308b0	1151
Kojto	96:487b796308b0	1152	/**
Kojto	96:487b796308b0	1153	* @}
Kojto	96:487b796308b0	1154	*/
Kojto	96:487b796308b0	1155
Kojto	96:487b796308b0	1156	/* Private Functions --------------------------------------------------------*/
Kojto	96:487b796308b0	1157	/** @addtogroup TIM_Private_Functions
Kojto	96:487b796308b0	1158	* @{
Kojto	96:487b796308b0	1159	*/
Kojto	96:487b796308b0	1160	void TIM_Base_SetConfig(TIM_TypeDef TIMx, TIM_Base_InitTypeDef Structure);
Kojto	96:487b796308b0	1161	void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter);
Kojto	96:487b796308b0	1162	void TIM_OC2_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config);
Kojto	96:487b796308b0	1163	void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma);
Kojto	96:487b796308b0	1164	void TIM_DMAError(DMA_HandleTypeDef *hdma);
Kojto	96:487b796308b0	1165	void TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma);
Kojto	96:487b796308b0	1166	void TIM_CCxChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelState);
Kojto	96:487b796308b0	1167	/**
Kojto	96:487b796308b0	1168	* @}
Kojto	96:487b796308b0	1169	*/
Kojto	96:487b796308b0	1170
Kojto	96:487b796308b0	1171	/* Exported macros -----------------------------------------------------------*/
Kojto	96:487b796308b0	1172	/** @defgroup TIM_Exported_Macros TIM Exported Macros
Kojto	96:487b796308b0	1173	* @{
Kojto	96:487b796308b0	1174	*/
Kojto	96:487b796308b0	1175
Kojto	96:487b796308b0	1176	/** @brief Reset TIM handle state
Kojto	96:487b796308b0	1177	* @param __HANDLE__: TIM handle.
Kojto	96:487b796308b0	1178	* @retval None
Kojto	96:487b796308b0	1179	*/
Kojto	96:487b796308b0	1180	#define __HAL_TIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TIM_STATE_RESET)
Kojto	96:487b796308b0	1181
Kojto	96:487b796308b0	1182	/**
Kojto	96:487b796308b0	1183	* @brief Enable the TIM peripheral.
Kojto	96:487b796308b0	1184	* @param __HANDLE__: TIM handle
Kojto	96:487b796308b0	1185	* @retval None
Kojto	96:487b796308b0	1186	*/
Kojto	96:487b796308b0	1187	#define __HAL_TIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1\|=(TIM_CR1_CEN))
Kojto	96:487b796308b0	1188
Kojto	96:487b796308b0	1189	/**
Kojto	96:487b796308b0	1190	* @brief Enable the TIM main Output.
Kojto	96:487b796308b0	1191	* @param __HANDLE__: TIM handle
Kojto	96:487b796308b0	1192	* @retval None
Kojto	96:487b796308b0	1193	*/
Kojto	96:487b796308b0	1194	#define __HAL_TIM_MOE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->BDTR\|=(TIM_BDTR_MOE))
Kojto	96:487b796308b0	1195
Kojto	96:487b796308b0	1196	/**
Kojto	96:487b796308b0	1197	* @brief Disable the TIM peripheral.
Kojto	96:487b796308b0	1198	* @param __HANDLE__: TIM handle
Kojto	96:487b796308b0	1199	* @retval None
Kojto	96:487b796308b0	1200	*/
Kojto	96:487b796308b0	1201	#define __HAL_TIM_DISABLE(__HANDLE__) \
Kojto	96:487b796308b0	1202	do { \
Kojto	96:487b796308b0	1203	if (((__HANDLE__)->Instance->CCER & TIM_CCER_CCxE_MASK) == 0) \
Kojto	96:487b796308b0	1204	{ \
Kojto	96:487b796308b0	1205	if(((__HANDLE__)->Instance->CCER & TIM_CCER_CCxNE_MASK) == 0) \
Kojto	96:487b796308b0	1206	{ \
Kojto	96:487b796308b0	1207	(__HANDLE__)->Instance->CR1 &= ~(TIM_CR1_CEN); \
Kojto	96:487b796308b0	1208	} \
Kojto	96:487b796308b0	1209	} \
Kojto	96:487b796308b0	1210	} while(0)
Kojto	96:487b796308b0	1211	/* The Main Output Enable of a timer instance is disabled only if all the CCx and CCxN
Kojto	96:487b796308b0	1212	channels have been disabled */
Kojto	96:487b796308b0	1213	/**
Kojto	96:487b796308b0	1214	* @brief Disable the TIM main Output.
Kojto	96:487b796308b0	1215	* @param __HANDLE__: TIM handle
Kojto	96:487b796308b0	1216	* @retval None
Kojto	96:487b796308b0	1217	* @note The Main Output Enable of a timer instance is disabled only if all the CCx and CCxN channels have been disabled
Kojto	96:487b796308b0	1218	*/
Kojto	96:487b796308b0	1219	#define __HAL_TIM_MOE_DISABLE(__HANDLE__) \
Kojto	96:487b796308b0	1220	do { \
Kojto	96:487b796308b0	1221	if (((__HANDLE__)->Instance->CCER & TIM_CCER_CCxE_MASK) == 0) \
Kojto	96:487b796308b0	1222	{ \
Kojto	96:487b796308b0	1223	if(((__HANDLE__)->Instance->CCER & TIM_CCER_CCxNE_MASK) == 0) \
Kojto	96:487b796308b0	1224	{ \
Kojto	96:487b796308b0	1225	(__HANDLE__)->Instance->BDTR &= ~(TIM_BDTR_MOE); \
Kojto	96:487b796308b0	1226	} \
Kojto	96:487b796308b0	1227	} \
Kojto	96:487b796308b0	1228	} while(0)
Kojto	96:487b796308b0	1229
Kojto	96:487b796308b0	1230	/**
Kojto	96:487b796308b0	1231	* @brief Enables the specified TIM interrupt.
Kojto	96:487b796308b0	1232	* @param __HANDLE__: specifies the TIM Handle.
Kojto	96:487b796308b0	1233	* @param __INTERRUPT__: specifies the TIM interrupt source to enable.
Kojto	96:487b796308b0	1234	* This parameter can be one of the following values:
Kojto	96:487b796308b0	1235	* @arg TIM_IT_UPDATE: Update interrupt
Kojto	96:487b796308b0	1236	* @arg TIM_IT_CC1: Capture/Compare 1 interrupt
Kojto	96:487b796308b0	1237	* @arg TIM_IT_CC2: Capture/Compare 2 interrupt
Kojto	96:487b796308b0	1238	* @arg TIM_IT_CC3: Capture/Compare 3 interrupt
Kojto	96:487b796308b0	1239	* @arg TIM_IT_CC4: Capture/Compare 4 interrupt
Kojto	96:487b796308b0	1240	* @arg TIM_IT_COM: Commutation interrupt
Kojto	96:487b796308b0	1241	* @arg TIM_IT_TRIGGER: Trigger interrupt
Kojto	96:487b796308b0	1242	* @arg TIM_IT_BREAK: Break interrupt
Kojto	96:487b796308b0	1243	* @retval None
Kojto	96:487b796308b0	1244	*/
Kojto	96:487b796308b0	1245	#define __HAL_TIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER \|= (__INTERRUPT__))
Kojto	96:487b796308b0	1246
Kojto	96:487b796308b0	1247	/**
Kojto	96:487b796308b0	1248	* @brief Disables the specified TIM interrupt.
Kojto	96:487b796308b0	1249	* @param __HANDLE__: specifies the TIM Handle.
Kojto	96:487b796308b0	1250	* @param __INTERRUPT__: specifies the TIM interrupt source to disable.
Kojto	96:487b796308b0	1251	* This parameter can be one of the following values:
Kojto	96:487b796308b0	1252	* @arg TIM_IT_UPDATE: Update interrupt
Kojto	96:487b796308b0	1253	* @arg TIM_IT_CC1: Capture/Compare 1 interrupt
Kojto	96:487b796308b0	1254	* @arg TIM_IT_CC2: Capture/Compare 2 interrupt
Kojto	96:487b796308b0	1255	* @arg TIM_IT_CC3: Capture/Compare 3 interrupt
Kojto	96:487b796308b0	1256	* @arg TIM_IT_CC4: Capture/Compare 4 interrupt
Kojto	96:487b796308b0	1257	* @arg TIM_IT_COM: Commutation interrupt
Kojto	96:487b796308b0	1258	* @arg TIM_IT_TRIGGER: Trigger interrupt
Kojto	96:487b796308b0	1259	* @arg TIM_IT_BREAK: Break interrupt
Kojto	96:487b796308b0	1260	* @retval None
Kojto	96:487b796308b0	1261	*/
Kojto	96:487b796308b0	1262	#define __HAL_TIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER &= ~(__INTERRUPT__))
Kojto	96:487b796308b0	1263
Kojto	96:487b796308b0	1264	/**
Kojto	96:487b796308b0	1265	* @brief Enables the specified DMA request.
Kojto	96:487b796308b0	1266	* @param __HANDLE__: specifies the TIM Handle.
Kojto	96:487b796308b0	1267	* @param __DMA__: specifies the TIM DMA request to enable.
Kojto	96:487b796308b0	1268	* This parameter can be one of the following values:
Kojto	96:487b796308b0	1269	* @arg TIM_DMA_UPDATE: Update DMA request
Kojto	96:487b796308b0	1270	* @arg TIM_DMA_CC1: Capture/Compare 1 DMA request
Kojto	96:487b796308b0	1271	* @arg TIM_DMA_CC2: Capture/Compare 2 DMA request
Kojto	96:487b796308b0	1272	* @arg TIM_DMA_CC3: Capture/Compare 3 DMA request
Kojto	96:487b796308b0	1273	* @arg TIM_DMA_CC4: Capture/Compare 4 DMA request
Kojto	96:487b796308b0	1274	* @arg TIM_DMA_COM: Commutation DMA request
Kojto	96:487b796308b0	1275	* @arg TIM_DMA_TRIGGER: Trigger DMA request
Kojto	96:487b796308b0	1276	* @retval None
Kojto	96:487b796308b0	1277	*/
Kojto	96:487b796308b0	1278	#define __HAL_TIM_ENABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER \|= (__DMA__))
Kojto	96:487b796308b0	1279
Kojto	96:487b796308b0	1280	/**
Kojto	96:487b796308b0	1281	* @brief Disables the specified DMA request.
Kojto	96:487b796308b0	1282	* @param __HANDLE__: specifies the TIM Handle.
Kojto	96:487b796308b0	1283	* @param __DMA__: specifies the TIM DMA request to disable.
Kojto	96:487b796308b0	1284	* This parameter can be one of the following values:
Kojto	96:487b796308b0	1285	* @arg TIM_DMA_UPDATE: Update DMA request
Kojto	96:487b796308b0	1286	* @arg TIM_DMA_CC1: Capture/Compare 1 DMA request
Kojto	96:487b796308b0	1287	* @arg TIM_DMA_CC2: Capture/Compare 2 DMA request
Kojto	96:487b796308b0	1288	* @arg TIM_DMA_CC3: Capture/Compare 3 DMA request
Kojto	96:487b796308b0	1289	* @arg TIM_DMA_CC4: Capture/Compare 4 DMA request
Kojto	96:487b796308b0	1290	* @arg TIM_DMA_COM: Commutation DMA request
Kojto	96:487b796308b0	1291	* @arg TIM_DMA_TRIGGER: Trigger DMA request
Kojto	96:487b796308b0	1292	* @retval None
Kojto	96:487b796308b0	1293	*/
Kojto	96:487b796308b0	1294	#define __HAL_TIM_DISABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER &= ~(__DMA__))
Kojto	96:487b796308b0	1295
Kojto	96:487b796308b0	1296	/**
Kojto	96:487b796308b0	1297	* @brief Checks whether the specified TIM interrupt flag is set or not.
Kojto	96:487b796308b0	1298	* @param __HANDLE__: specifies the TIM Handle.
Kojto	96:487b796308b0	1299	* @param __FLAG__: specifies the TIM interrupt flag to check.
Kojto	96:487b796308b0	1300	* This parameter can be one of the following values:
Kojto	96:487b796308b0	1301	* @arg TIM_FLAG_UPDATE: Update interrupt flag
Kojto	96:487b796308b0	1302	* @arg TIM_FLAG_CC1: Capture/Compare 1 interrupt flag
Kojto	96:487b796308b0	1303	* @arg TIM_FLAG_CC2: Capture/Compare 2 interrupt flag
Kojto	96:487b796308b0	1304	* @arg TIM_FLAG_CC3: Capture/Compare 3 interrupt flag
Kojto	96:487b796308b0	1305	* @arg TIM_FLAG_CC4: Capture/Compare 4 interrupt flag
Kojto	96:487b796308b0	1306	* @arg TIM_FLAG_COM: Commutation interrupt flag
Kojto	96:487b796308b0	1307	* @arg TIM_FLAG_TRIGGER: Trigger interrupt flag
Kojto	96:487b796308b0	1308	* @arg TIM_FLAG_BREAK: Break interrupt flag
Kojto	96:487b796308b0	1309	* @arg TIM_FLAG_CC1OF: Capture/Compare 1 overcapture flag
Kojto	96:487b796308b0	1310	* @arg TIM_FLAG_CC2OF: Capture/Compare 2 overcapture flag
Kojto	96:487b796308b0	1311	* @arg TIM_FLAG_CC3OF: Capture/Compare 3 overcapture flag
Kojto	96:487b796308b0	1312	* @arg TIM_FLAG_CC4OF: Capture/Compare 4 overcapture flag
Kojto	96:487b796308b0	1313	* @retval The new state of __FLAG__ (TRUE or FALSE).
Kojto	96:487b796308b0	1314	*/
Kojto	96:487b796308b0	1315	#define __HAL_TIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR &(__FLAG__)) == (__FLAG__))
Kojto	96:487b796308b0	1316
Kojto	96:487b796308b0	1317	/**
Kojto	96:487b796308b0	1318	* @brief Clears the specified TIM interrupt flag.
Kojto	96:487b796308b0	1319	* @param __HANDLE__: specifies the TIM Handle.
Kojto	96:487b796308b0	1320	* @param __FLAG__: specifies the TIM interrupt flag to clear.
Kojto	96:487b796308b0	1321	* This parameter can be one of the following values:
Kojto	96:487b796308b0	1322	* @arg TIM_FLAG_UPDATE: Update interrupt flag
Kojto	96:487b796308b0	1323	* @arg TIM_FLAG_CC1: Capture/Compare 1 interrupt flag
Kojto	96:487b796308b0	1324	* @arg TIM_FLAG_CC2: Capture/Compare 2 interrupt flag
Kojto	96:487b796308b0	1325	* @arg TIM_FLAG_CC3: Capture/Compare 3 interrupt flag
Kojto	96:487b796308b0	1326	* @arg TIM_FLAG_CC4: Capture/Compare 4 interrupt flag
Kojto	96:487b796308b0	1327	* @arg TIM_FLAG_COM: Commutation interrupt flag
Kojto	96:487b796308b0	1328	* @arg TIM_FLAG_TRIGGER: Trigger interrupt flag
Kojto	96:487b796308b0	1329	* @arg TIM_FLAG_BREAK: Break interrupt flag
Kojto	96:487b796308b0	1330	* @arg TIM_FLAG_CC1OF: Capture/Compare 1 overcapture flag
Kojto	96:487b796308b0	1331	* @arg TIM_FLAG_CC2OF: Capture/Compare 2 overcapture flag
Kojto	96:487b796308b0	1332	* @arg TIM_FLAG_CC3OF: Capture/Compare 3 overcapture flag
Kojto	96:487b796308b0	1333	* @arg TIM_FLAG_CC4OF: Capture/Compare 4 overcapture flag
Kojto	96:487b796308b0	1334	* @retval The new state of __FLAG__ (TRUE or FALSE).
Kojto	96:487b796308b0	1335	*/
Kojto	96:487b796308b0	1336	#define __HAL_TIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
Kojto	96:487b796308b0	1337
Kojto	96:487b796308b0	1338	/**
Kojto	96:487b796308b0	1339	* @brief Checks whether the specified TIM interrupt has occurred or not.
Kojto	96:487b796308b0	1340	* @param __HANDLE__: TIM handle
Kojto	96:487b796308b0	1341	* @param __INTERRUPT__: specifies the TIM interrupt source to check.
Kojto	96:487b796308b0	1342	* @retval The state of TIM_IT (SET or RESET).
Kojto	96:487b796308b0	1343	*/
Kojto	96:487b796308b0	1344	#define __HAL_TIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->DIER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
Kojto	96:487b796308b0	1345
Kojto	96:487b796308b0	1346	/**
Kojto	96:487b796308b0	1347	* @brief Clear the TIM interrupt pending bits
Kojto	96:487b796308b0	1348	* @param __HANDLE__: TIM handle
Kojto	96:487b796308b0	1349	* @param __INTERRUPT__: specifies the interrupt pending bit to clear.
Kojto	96:487b796308b0	1350	* @retval None
Kojto	96:487b796308b0	1351	*/
Kojto	96:487b796308b0	1352	#define __HAL_TIM_CLEAR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->SR = ~(__INTERRUPT__))
Kojto	96:487b796308b0	1353
Kojto	96:487b796308b0	1354	/**
Kojto	96:487b796308b0	1355	* @brief Indicates whether or not the TIM Counter is used as downcounter
Kojto	96:487b796308b0	1356	* @param __HANDLE__: TIM handle.
Kojto	96:487b796308b0	1357	* @retval False (Counter used as upcounter) or True (Counter used as downcounter)
Kojto	96:487b796308b0	1358	* @note This macro is particularly usefull to get the counting mode when the timer operates in Center-aligned mode or Encoder
Kojto	96:487b796308b0	1359	mode.
Kojto	96:487b796308b0	1360	*/
Kojto	96:487b796308b0	1361	#define __HAL_TIM_IS_TIM_COUNTING_DOWN(__HANDLE__) (((__HANDLE__)->Instance->CR1 & (TIM_CR1_DIR)) == (TIM_CR1_DIR))
Kojto	96:487b796308b0	1362
Kojto	96:487b796308b0	1363	/**
Kojto	96:487b796308b0	1364	* @brief Sets the TIM active prescaler register value on update event.
Kojto	96:487b796308b0	1365	* @param __HANDLE__: TIM handle.
Kojto	96:487b796308b0	1366	* @param __PRESC__: specifies the active prescaler register new value.
Kojto	96:487b796308b0	1367	* @retval None
Kojto	96:487b796308b0	1368	*/
Kojto	96:487b796308b0	1369	#define __HAL_TIM_SET_PRESCALER(__HANDLE__, __PRESC__) ((__HANDLE__)->Instance->PSC = (__PRESC__))
Kojto	96:487b796308b0	1370
Kojto	96:487b796308b0	1371	/**
Kojto	96:487b796308b0	1372	* @brief Sets the TIM Capture Compare Register value on runtime without
Kojto	96:487b796308b0	1373	* calling another time ConfigChannel function.
Kojto	96:487b796308b0	1374	* @param __HANDLE__: TIM handle.
Kojto	96:487b796308b0	1375	* @param __CHANNEL__ : TIM Channels to be configured.
Kojto	96:487b796308b0	1376	* This parameter can be one of the following values:
Kojto	96:487b796308b0	1377	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
Kojto	96:487b796308b0	1378	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
Kojto	96:487b796308b0	1379	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
Kojto	96:487b796308b0	1380	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
Kojto	96:487b796308b0	1381	* @param __COMPARE__: specifies the Capture Compare register new value.
Kojto	96:487b796308b0	1382	* @retval None
Kojto	96:487b796308b0	1383	*/
Kojto	96:487b796308b0	1384	#define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \
Kojto	96:487b796308b0	1385	((__IO uint32_t )(&((__HANDLE__)->Instance->CCR1) + ((__CHANNEL__) >> 2)) = (__COMPARE__))
Kojto	96:487b796308b0	1386
Kojto	96:487b796308b0	1387	/**
Kojto	96:487b796308b0	1388	* @brief Gets the TIM Capture Compare Register value on runtime
Kojto	96:487b796308b0	1389	* @param __HANDLE__: TIM handle.
Kojto	96:487b796308b0	1390	* @param __CHANNEL__ : TIM Channel associated with the capture compare register
Kojto	96:487b796308b0	1391	* This parameter can be one of the following values:
Kojto	96:487b796308b0	1392	* @arg TIM_CHANNEL_1: get capture/compare 1 register value
Kojto	96:487b796308b0	1393	* @arg TIM_CHANNEL_2: get capture/compare 2 register value
Kojto	96:487b796308b0	1394	* @arg TIM_CHANNEL_3: get capture/compare 3 register value
Kojto	96:487b796308b0	1395	* @arg TIM_CHANNEL_4: get capture/compare 4 register value
Kojto	96:487b796308b0	1396	* @retval None
Kojto	96:487b796308b0	1397	*/
Kojto	96:487b796308b0	1398	#define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \
Kojto	96:487b796308b0	1399	((__IO uint32_t )(&((__HANDLE__)->Instance->CCR1) + ((__CHANNEL__) >> 2)))
Kojto	96:487b796308b0	1400
Kojto	96:487b796308b0	1401	/**
Kojto	96:487b796308b0	1402	* @brief Sets the TIM Counter Register value on runtime.
Kojto	96:487b796308b0	1403	* @param __HANDLE__: TIM handle.
Kojto	96:487b796308b0	1404	* @param __COUNTER__: specifies the Counter register new value.
Kojto	96:487b796308b0	1405	* @retval None
Kojto	96:487b796308b0	1406	*/
Kojto	96:487b796308b0	1407	#define __HAL_TIM_SET_COUNTER(__HANDLE__, __COUNTER__) ((__HANDLE__)->Instance->CNT = (__COUNTER__))
Kojto	96:487b796308b0	1408
Kojto	96:487b796308b0	1409	/**
Kojto	96:487b796308b0	1410	* @brief Gets the TIM Counter Register value on runtime.
Kojto	96:487b796308b0	1411	* @param __HANDLE__: TIM handle.
Kojto	96:487b796308b0	1412	* @retval None
Kojto	96:487b796308b0	1413	*/
Kojto	96:487b796308b0	1414	#define __HAL_TIM_GET_COUNTER(__HANDLE__) \
Kojto	96:487b796308b0	1415	((__HANDLE__)->Instance->CNT)
Kojto	96:487b796308b0	1416
Kojto	96:487b796308b0	1417	/**
Kojto	96:487b796308b0	1418	* @brief Sets the TIM Autoreload Register value on runtime without calling
Kojto	96:487b796308b0	1419	* another time any Init function.
Kojto	96:487b796308b0	1420	* @param __HANDLE__: TIM handle.
Kojto	96:487b796308b0	1421	* @param __AUTORELOAD__: specifies the Counter register new value.
Kojto	96:487b796308b0	1422	* @retval None
Kojto	96:487b796308b0	1423	*/
Kojto	96:487b796308b0	1424	#define __HAL_TIM_SET_AUTORELOAD(__HANDLE__, __AUTORELOAD__) \
Kojto	96:487b796308b0	1425	do{ \
Kojto	96:487b796308b0	1426	(__HANDLE__)->Instance->ARR = (__AUTORELOAD__); \
Kojto	96:487b796308b0	1427	(__HANDLE__)->Init.Period = (__AUTORELOAD__); \
Kojto	96:487b796308b0	1428	} while(0)
Kojto	96:487b796308b0	1429
Kojto	96:487b796308b0	1430	/**
Kojto	96:487b796308b0	1431	* @brief Gets the TIM Autoreload Register value on runtime
Kojto	96:487b796308b0	1432	* @param __HANDLE__: TIM handle.
Kojto	96:487b796308b0	1433	* @retval None
Kojto	96:487b796308b0	1434	*/
Kojto	96:487b796308b0	1435	#define __HAL_TIM_GET_AUTORELOAD(__HANDLE__) \
Kojto	96:487b796308b0	1436	((__HANDLE__)->Instance->ARR)
Kojto	96:487b796308b0	1437
Kojto	96:487b796308b0	1438	/**
Kojto	96:487b796308b0	1439	* @brief Sets the TIM Clock Division value on runtime without calling
Kojto	96:487b796308b0	1440	* another time any Init function.
Kojto	96:487b796308b0	1441	* @param __HANDLE__: TIM handle.
Kojto	96:487b796308b0	1442	* @param __CKD__: specifies the clock division value.
Kojto	96:487b796308b0	1443	* This parameter can be one of the following value:
Kojto	96:487b796308b0	1444	* @arg TIM_CLOCKDIVISION_DIV1
Kojto	96:487b796308b0	1445	* @arg TIM_CLOCKDIVISION_DIV2
Kojto	96:487b796308b0	1446	* @arg TIM_CLOCKDIVISION_DIV4
Kojto	96:487b796308b0	1447	* @retval None
Kojto	96:487b796308b0	1448	*/
Kojto	96:487b796308b0	1449	#define __HAL_TIM_SET_CLOCKDIVISION(__HANDLE__, __CKD__) \
Kojto	96:487b796308b0	1450	do{ \
Kojto	96:487b796308b0	1451	(__HANDLE__)->Instance->CR1 &= (uint16_t)(~TIM_CR1_CKD); \
Kojto	96:487b796308b0	1452	(__HANDLE__)->Instance->CR1 \|= (__CKD__); \
Kojto	96:487b796308b0	1453	(__HANDLE__)->Init.ClockDivision = (__CKD__); \
Kojto	96:487b796308b0	1454	} while(0)
Kojto	96:487b796308b0	1455
Kojto	96:487b796308b0	1456	/**
Kojto	96:487b796308b0	1457	* @brief Gets the TIM Clock Division value on runtime
Kojto	96:487b796308b0	1458	* @param __HANDLE__: TIM handle.
Kojto	96:487b796308b0	1459	* @retval None
Kojto	96:487b796308b0	1460	*/
Kojto	96:487b796308b0	1461	#define __HAL_TIM_GET_CLOCKDIVISION(__HANDLE__) \
Kojto	96:487b796308b0	1462	((__HANDLE__)->Instance->CR1 & TIM_CR1_CKD)
Kojto	96:487b796308b0	1463
Kojto	96:487b796308b0	1464	/**
Kojto	96:487b796308b0	1465	* @brief Sets the TIM Input Capture prescaler on runtime without calling
Kojto	96:487b796308b0	1466	* another time HAL_TIM_IC_ConfigChannel() function.
Kojto	96:487b796308b0	1467	* @param __HANDLE__: TIM handle.
Kojto	96:487b796308b0	1468	* @param __CHANNEL__ : TIM Channels to be configured.
Kojto	96:487b796308b0	1469	* This parameter can be one of the following values:
Kojto	96:487b796308b0	1470	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
Kojto	96:487b796308b0	1471	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
Kojto	96:487b796308b0	1472	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
Kojto	96:487b796308b0	1473	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
Kojto	96:487b796308b0	1474	* @param __ICPSC__: specifies the Input Capture4 prescaler new value.
Kojto	96:487b796308b0	1475	* This parameter can be one of the following values:
Kojto	96:487b796308b0	1476	* @arg TIM_ICPSC_DIV1: no prescaler
Kojto	96:487b796308b0	1477	* @arg TIM_ICPSC_DIV2: capture is done once every 2 events
Kojto	96:487b796308b0	1478	* @arg TIM_ICPSC_DIV4: capture is done once every 4 events
Kojto	96:487b796308b0	1479	* @arg TIM_ICPSC_DIV8: capture is done once every 8 events
Kojto	96:487b796308b0	1480	* @retval None
Kojto	96:487b796308b0	1481	*/
Kojto	96:487b796308b0	1482	#define __HAL_TIM_SET_ICPRESCALER(__HANDLE__, __CHANNEL__, __ICPSC__) \
Kojto	96:487b796308b0	1483	do{ \
Kojto	96:487b796308b0	1484	TIM_RESET_ICPRESCALERVALUE((__HANDLE__), (__CHANNEL__)); \
Kojto	96:487b796308b0	1485	TIM_SET_ICPRESCALERVALUE((__HANDLE__), (__CHANNEL__), (__ICPSC__)); \
Kojto	96:487b796308b0	1486	} while(0)
Kojto	96:487b796308b0	1487
Kojto	96:487b796308b0	1488	/**
Kojto	96:487b796308b0	1489	* @brief Gets the TIM Input Capture prescaler on runtime
Kojto	96:487b796308b0	1490	* @param __HANDLE__: TIM handle.
Kojto	96:487b796308b0	1491	* @param __CHANNEL__: TIM Channels to be configured.
Kojto	96:487b796308b0	1492	* This parameter can be one of the following values:
Kojto	96:487b796308b0	1493	* @arg TIM_CHANNEL_1: get input capture 1 prescaler value
Kojto	96:487b796308b0	1494	* @arg TIM_CHANNEL_2: get input capture 2 prescaler value
Kojto	96:487b796308b0	1495	* @arg TIM_CHANNEL_3: get input capture 3 prescaler value
Kojto	96:487b796308b0	1496	* @arg TIM_CHANNEL_4: get input capture 4 prescaler value
Kojto	96:487b796308b0	1497	* @retval None
Kojto	96:487b796308b0	1498	*/
Kojto	96:487b796308b0	1499	#define __HAL_TIM_GET_ICPRESCALER(__HANDLE__, __CHANNEL__) \
Kojto	96:487b796308b0	1500	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) :\
Kojto	96:487b796308b0	1501	((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8) :\
Kojto	96:487b796308b0	1502	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) :\
Kojto	96:487b796308b0	1503	(((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8)
Kojto	96:487b796308b0	1504
Kojto	96:487b796308b0	1505	/**
Kojto	96:487b796308b0	1506	* @brief Set the Update Request Source (URS) bit of the TIMx_CR1 register
Kojto	96:487b796308b0	1507	* @param __HANDLE__: TIM handle.
Kojto	96:487b796308b0	1508	* @note When the USR bit of the TIMx_CR1 register is set, only counter
Kojto	96:487b796308b0	1509	* overflow/underflow generates an update interrupt or DMA request (if
Kojto	96:487b796308b0	1510	* enabled)
Kojto	96:487b796308b0	1511	* @retval None
Kojto	96:487b796308b0	1512	*/
Kojto	96:487b796308b0	1513	#define __HAL_TIM_URS_ENABLE(__HANDLE__) \
Kojto	96:487b796308b0	1514	((__HANDLE__)->Instance->CR1\|= (TIM_CR1_URS))
Kojto	96:487b796308b0	1515
Kojto	96:487b796308b0	1516	/**
Kojto	96:487b796308b0	1517	* @brief Reset the Update Request Source (URS) bit of the TIMx_CR1 register
Kojto	96:487b796308b0	1518	* @param __HANDLE__: TIM handle.
Kojto	96:487b796308b0	1519	* @note When the USR bit of the TIMx_CR1 register is reset, any of the
Kojto	96:487b796308b0	1520	* following events generate an update interrupt or DMA request (if
Kojto	96:487b796308b0	1521	* enabled):
Kojto	96:487b796308b0	1522	* (+) Counter overflow/underflow
Kojto	96:487b796308b0	1523	* (+) Setting the UG bit
Kojto	96:487b796308b0	1524	* (+) Update generation through the slave mode controller
Kojto	96:487b796308b0	1525	* @retval None
Kojto	96:487b796308b0	1526	*/
Kojto	96:487b796308b0	1527	#define __HAL_TIM_URS_DISABLE(__HANDLE__) \
Kojto	96:487b796308b0	1528	((__HANDLE__)->Instance->CR1&=~(TIM_CR1_URS))
Kojto	96:487b796308b0	1529
Kojto	96:487b796308b0	1530	/**
Kojto	96:487b796308b0	1531	* @brief Sets the TIM Capture x input polarity on runtime.
Kojto	96:487b796308b0	1532	* @param __HANDLE__: TIM handle.
Kojto	96:487b796308b0	1533	* @param __CHANNEL__: TIM Channels to be configured.
Kojto	96:487b796308b0	1534	* This parameter can be one of the following values:
Kojto	96:487b796308b0	1535	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
Kojto	96:487b796308b0	1536	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
Kojto	96:487b796308b0	1537	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
Kojto	96:487b796308b0	1538	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
Kojto	96:487b796308b0	1539	* @param __POLARITY__: Polarity for TIx source
Kojto	96:487b796308b0	1540	* @arg TIM_INPUTCHANNELPOLARITY_RISING: Rising Edge
Kojto	96:487b796308b0	1541	* @arg TIM_INPUTCHANNELPOLARITY_FALLING: Falling Edge
Kojto	96:487b796308b0	1542	* @arg TIM_INPUTCHANNELPOLARITY_BOTHEDGE: Rising and Falling Edge
Kojto	96:487b796308b0	1543	* @note The polarity TIM_INPUTCHANNELPOLARITY_BOTHEDGE is not authorized for TIM Channel 4.
Kojto	96:487b796308b0	1544	* @retval None
Kojto	96:487b796308b0	1545	*/
Kojto	96:487b796308b0	1546	#define __HAL_TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \
Kojto	96:487b796308b0	1547	do{ \
Kojto	96:487b796308b0	1548	TIM_RESET_CAPTUREPOLARITY((__HANDLE__), (__CHANNEL__)); \
Kojto	96:487b796308b0	1549	TIM_SET_CAPTUREPOLARITY((__HANDLE__), (__CHANNEL__), (__POLARITY__)); \
Kojto	96:487b796308b0	1550	}while(0)
Kojto	96:487b796308b0	1551
Kojto	96:487b796308b0	1552	/**
Kojto	96:487b796308b0	1553	* @}
Kojto	96:487b796308b0	1554	*/
Kojto	96:487b796308b0	1555
Kojto	96:487b796308b0	1556	/* Include TIM HAL Extension module */
Kojto	96:487b796308b0	1557	#include "stm32f1xx_hal_tim_ex.h"
Kojto	96:487b796308b0	1558
Kojto	96:487b796308b0	1559	/* Exported functions --------------------------------------------------------*/
Kojto	96:487b796308b0	1560	/** @addtogroup TIM_Exported_Functions
Kojto	96:487b796308b0	1561	* @{
Kojto	96:487b796308b0	1562	*/
Kojto	96:487b796308b0	1563
Kojto	96:487b796308b0	1564	/** @addtogroup TIM_Exported_Functions_Group1
Kojto	96:487b796308b0	1565	* @{
Kojto	96:487b796308b0	1566	*/
Kojto	96:487b796308b0	1567	/* Time Base functions ********************************************************/
Kojto	96:487b796308b0	1568	HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1569	HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1570	void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1571	void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1572	/* Blocking mode: Polling */
Kojto	96:487b796308b0	1573	HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1574	HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1575	/* Non-Blocking mode: Interrupt */
Kojto	96:487b796308b0	1576	HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1577	HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1578	/* Non-Blocking mode: DMA */
Kojto	96:487b796308b0	1579	HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef htim, uint32_t pData, uint16_t Length);
Kojto	96:487b796308b0	1580	HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1581	/**
Kojto	96:487b796308b0	1582	* @}
Kojto	96:487b796308b0	1583	*/
Kojto	96:487b796308b0	1584
Kojto	96:487b796308b0	1585	/** @addtogroup TIM_Exported_Functions_Group2
Kojto	96:487b796308b0	1586	* @{
Kojto	96:487b796308b0	1587	*/
Kojto	96:487b796308b0	1588	/* Timer Output Compare functions **********************************************/
Kojto	96:487b796308b0	1589	HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1590	HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1591	void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1592	void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1593	/* Blocking mode: Polling */
Kojto	96:487b796308b0	1594	HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	96:487b796308b0	1595	HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	96:487b796308b0	1596	/* Non-Blocking mode: Interrupt */
Kojto	96:487b796308b0	1597	HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	96:487b796308b0	1598	HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	96:487b796308b0	1599	/* Non-Blocking mode: DMA */
Kojto	96:487b796308b0	1600	HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
Kojto	96:487b796308b0	1601	HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	96:487b796308b0	1602
Kojto	96:487b796308b0	1603	/**
Kojto	96:487b796308b0	1604	* @}
Kojto	96:487b796308b0	1605	*/
Kojto	96:487b796308b0	1606
Kojto	96:487b796308b0	1607	/** @addtogroup TIM_Exported_Functions_Group3
Kojto	96:487b796308b0	1608	* @{
Kojto	96:487b796308b0	1609	*/
Kojto	96:487b796308b0	1610	/* Timer PWM functions *********************************************************/
Kojto	96:487b796308b0	1611	HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1612	HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1613	void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1614	void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1615	/* Blocking mode: Polling */
Kojto	96:487b796308b0	1616	HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	96:487b796308b0	1617	HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	96:487b796308b0	1618	/* Non-Blocking mode: Interrupt */
Kojto	96:487b796308b0	1619	HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	96:487b796308b0	1620	HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	96:487b796308b0	1621	/* Non-Blocking mode: DMA */
Kojto	96:487b796308b0	1622	HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
Kojto	96:487b796308b0	1623	HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	96:487b796308b0	1624	/**
Kojto	96:487b796308b0	1625	* @}
Kojto	96:487b796308b0	1626	*/
Kojto	96:487b796308b0	1627
Kojto	96:487b796308b0	1628	/** @addtogroup TIM_Exported_Functions_Group4
Kojto	96:487b796308b0	1629	* @{
Kojto	96:487b796308b0	1630	*/
Kojto	96:487b796308b0	1631	/* Timer Input Capture functions ***********************************************/
Kojto	96:487b796308b0	1632	HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1633	HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1634	void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1635	void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1636	/* Blocking mode: Polling */
Kojto	96:487b796308b0	1637	HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	96:487b796308b0	1638	HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	96:487b796308b0	1639	/* Non-Blocking mode: Interrupt */
Kojto	96:487b796308b0	1640	HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	96:487b796308b0	1641	HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	96:487b796308b0	1642	/* Non-Blocking mode: DMA */
Kojto	96:487b796308b0	1643	HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
Kojto	96:487b796308b0	1644	HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	96:487b796308b0	1645	/**
Kojto	96:487b796308b0	1646	* @}
Kojto	96:487b796308b0	1647	*/
Kojto	96:487b796308b0	1648
Kojto	96:487b796308b0	1649	/** @addtogroup TIM_Exported_Functions_Group5
Kojto	96:487b796308b0	1650	* @{
Kojto	96:487b796308b0	1651	*/
Kojto	96:487b796308b0	1652	/* Timer One Pulse functions ***************************************************/
Kojto	96:487b796308b0	1653	HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode);
Kojto	96:487b796308b0	1654	HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1655	void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1656	void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1657	/* Blocking mode: Polling */
Kojto	96:487b796308b0	1658	HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
Kojto	96:487b796308b0	1659	HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
Kojto	96:487b796308b0	1660	/* Non-Blocking mode: Interrupt */
Kojto	96:487b796308b0	1661	HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
Kojto	96:487b796308b0	1662	HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
Kojto	96:487b796308b0	1663	/**
Kojto	96:487b796308b0	1664	* @}
Kojto	96:487b796308b0	1665	*/
Kojto	96:487b796308b0	1666
Kojto	96:487b796308b0	1667	/** @addtogroup TIM_Exported_Functions_Group6
Kojto	96:487b796308b0	1668	* @{
Kojto	96:487b796308b0	1669	*/
Kojto	96:487b796308b0	1670	/* Timer Encoder functions *****************************************************/
Kojto	96:487b796308b0	1671	HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef htim, TIM_Encoder_InitTypeDef sConfig);
Kojto	96:487b796308b0	1672	HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1673	void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1674	void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1675	/* Blocking mode: Polling */
Kojto	96:487b796308b0	1676	HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	96:487b796308b0	1677	HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	96:487b796308b0	1678	/* Non-Blocking mode: Interrupt */
Kojto	96:487b796308b0	1679	HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	96:487b796308b0	1680	HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	96:487b796308b0	1681	/* Non-Blocking mode: DMA */
Kojto	96:487b796308b0	1682	HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData1, uint32_t *pData2, uint16_t Length);
Kojto	96:487b796308b0	1683	HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	96:487b796308b0	1684
Kojto	96:487b796308b0	1685	/**
Kojto	96:487b796308b0	1686	* @}
Kojto	96:487b796308b0	1687	*/
Kojto	96:487b796308b0	1688
Kojto	96:487b796308b0	1689	/** @addtogroup TIM_Exported_Functions_Group7
Kojto	96:487b796308b0	1690	* @{
Kojto	96:487b796308b0	1691	*/
Kojto	96:487b796308b0	1692	/* Interrupt Handler functions **********************************************/
Kojto	96:487b796308b0	1693	void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1694	/**
Kojto	96:487b796308b0	1695	* @}
Kojto	96:487b796308b0	1696	*/
Kojto	96:487b796308b0	1697
Kojto	96:487b796308b0	1698	/** @addtogroup TIM_Exported_Functions_Group8
Kojto	96:487b796308b0	1699	* @{
Kojto	96:487b796308b0	1700	*/
Kojto	96:487b796308b0	1701	/* Control functions *********************************************************/
Kojto	96:487b796308b0	1702	HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef htim, TIM_OC_InitTypeDef sConfig, uint32_t Channel);
Kojto	96:487b796308b0	1703	HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef htim, TIM_OC_InitTypeDef sConfig, uint32_t Channel);
Kojto	96:487b796308b0	1704	HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef htim, TIM_IC_InitTypeDef sConfig, uint32_t Channel);
Kojto	96:487b796308b0	1705	HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef htim, TIM_OnePulse_InitTypeDef sConfig, uint32_t OutputChannel, uint32_t InputChannel);
Kojto	96:487b796308b0	1706	HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef htim, TIM_ClearInputConfigTypeDef sClearInputConfig, uint32_t Channel);
Kojto	96:487b796308b0	1707	HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef htim, TIM_ClockConfigTypeDef sClockSourceConfig);
Kojto	96:487b796308b0	1708	HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection);
Kojto	96:487b796308b0	1709	HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization(TIM_HandleTypeDef htim, TIM_SlaveConfigTypeDef sSlaveConfig);
Kojto	96:487b796308b0	1710	HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization_IT(TIM_HandleTypeDef htim, TIM_SlaveConfigTypeDef sSlaveConfig);
Kojto	96:487b796308b0	1711	HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \
Kojto	96:487b796308b0	1712	uint32_t *BurstBuffer, uint32_t BurstLength);
Kojto	96:487b796308b0	1713	HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
Kojto	96:487b796308b0	1714	HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \
Kojto	96:487b796308b0	1715	uint32_t *BurstBuffer, uint32_t BurstLength);
Kojto	96:487b796308b0	1716	HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
Kojto	96:487b796308b0	1717	HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource);
Kojto	96:487b796308b0	1718	uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto	96:487b796308b0	1719
Kojto	96:487b796308b0	1720	/**
Kojto	96:487b796308b0	1721	* @}
Kojto	96:487b796308b0	1722	*/
Kojto	96:487b796308b0	1723
Kojto	96:487b796308b0	1724	/** @addtogroup TIM_Exported_Functions_Group9
Kojto	96:487b796308b0	1725	* @{
Kojto	96:487b796308b0	1726	*/
Kojto	96:487b796308b0	1727	/* Callback in non blocking modes (Interrupt and DMA) *************************/
Kojto	96:487b796308b0	1728	void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1729	void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1730	void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1731	void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1732	void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1733	void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1734	/**
Kojto	96:487b796308b0	1735	* @}
Kojto	96:487b796308b0	1736	*/
Kojto	96:487b796308b0	1737
Kojto	96:487b796308b0	1738	/** @addtogroup TIM_Exported_Functions_Group10
Kojto	96:487b796308b0	1739	* @{
Kojto	96:487b796308b0	1740	*/
Kojto	96:487b796308b0	1741	/* Peripheral State functions **************************************************/
Kojto	96:487b796308b0	1742	HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1743	HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1744	HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1745	HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1746	HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1747	HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim);
Kojto	96:487b796308b0	1748
Kojto	96:487b796308b0	1749	/**
Kojto	96:487b796308b0	1750	* @}
Kojto	96:487b796308b0	1751	*/
Kojto	96:487b796308b0	1752
Kojto	96:487b796308b0	1753	/**
Kojto	96:487b796308b0	1754	* @}
Kojto	96:487b796308b0	1755	*/
Kojto	96:487b796308b0	1756
Kojto	96:487b796308b0	1757	/**
Kojto	96:487b796308b0	1758	* @}
Kojto	96:487b796308b0	1759	*/
Kojto	96:487b796308b0	1760
Kojto	96:487b796308b0	1761	/**
Kojto	96:487b796308b0	1762	* @}
Kojto	96:487b796308b0	1763	*/
Kojto	96:487b796308b0	1764
Kojto	96:487b796308b0	1765	#ifdef __cplusplus
Kojto	96:487b796308b0	1766	}
Kojto	96:487b796308b0	1767	#endif
Kojto	96:487b796308b0	1768
Kojto	96:487b796308b0	1769	#endif /* __STM32F1xx_HAL_TIM_H */
Kojto	96:487b796308b0	1770
Kojto	96:487b796308b0	1771	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	31 Mar 2015
Imports:	13
Forks:	0
Commits:	99
Dependents:	0
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Followers:	1

TARGET_NUCLEO_F103RB/stm32f1xx_hal_tim.h@96:487b796308b0, 2015-03-17 (annotated)

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