雄介 太田 / mbed

mbed(SerialHalfDuplex入り)

Fork of mbed by mbed official

TARGET_NUCLEO_F103RB/stm32f1xx_hal_sram.h@96:487b796308b0, 2015-03-17 (annotated)

Committer:
Kojto
Date:
Tue Mar 17 14:27:45 2015 +0000
Revision:
96:487b796308b0
Release 96 of the mbed library



Changes:

- IAR support for ble boards, lpc, ethernet stack

- RTC - attach function to redirect time functions

- Nucleo F103RB - cube driver

- k20xx - fixes for teensy and k20 platforms in sleep/deepsleep and usb

- STM32L0, Nucleo/Disco L053 - refactoring

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 96:487b796308b0 1 /**
Kojto 96:487b796308b0 2 ******************************************************************************
Kojto 96:487b796308b0 3 * @file stm32f1xx_hal_sram.h
Kojto 96:487b796308b0 4 * @author MCD Application Team
Kojto 96:487b796308b0 5 * @version V1.0.0
Kojto 96:487b796308b0 6 * @date 15-December-2014
Kojto 96:487b796308b0 7 * @brief Header file of SRAM HAL module.
Kojto 96:487b796308b0 8 ******************************************************************************
Kojto 96:487b796308b0 9 * @attention
Kojto 96:487b796308b0 10 *
Kojto 96:487b796308b0 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
Kojto 96:487b796308b0 12 *
Kojto 96:487b796308b0 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 96:487b796308b0 14 * are permitted provided that the following conditions are met:
Kojto 96:487b796308b0 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 96:487b796308b0 16 * this list of conditions and the following disclaimer.
Kojto 96:487b796308b0 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 96:487b796308b0 18 * this list of conditions and the following disclaimer in the documentation
Kojto 96:487b796308b0 19 * and/or other materials provided with the distribution.
Kojto 96:487b796308b0 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 96:487b796308b0 21 * may be used to endorse or promote products derived from this software
Kojto 96:487b796308b0 22 * without specific prior written permission.
Kojto 96:487b796308b0 23 *
Kojto 96:487b796308b0 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 96:487b796308b0 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 96:487b796308b0 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 96:487b796308b0 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 96:487b796308b0 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 96:487b796308b0 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 96:487b796308b0 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 96:487b796308b0 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 96:487b796308b0 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 96:487b796308b0 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 96:487b796308b0 34 *
Kojto 96:487b796308b0 35 ******************************************************************************
Kojto 96:487b796308b0 36 */
Kojto 96:487b796308b0 37
Kojto 96:487b796308b0 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 96:487b796308b0 39 #ifndef __STM32F1xx_HAL_SRAM_H
Kojto 96:487b796308b0 40 #define __STM32F1xx_HAL_SRAM_H
Kojto 96:487b796308b0 41
Kojto 96:487b796308b0 42 #ifdef __cplusplus
Kojto 96:487b796308b0 43 extern "C" {
Kojto 96:487b796308b0 44 #endif
Kojto 96:487b796308b0 45
Kojto 96:487b796308b0 46 /* Includes ------------------------------------------------------------------*/
Kojto 96:487b796308b0 47 #include "stm32f1xx_ll_fsmc.h"
Kojto 96:487b796308b0 48
Kojto 96:487b796308b0 49 /** @addtogroup STM32F1xx_HAL_Driver
Kojto 96:487b796308b0 50 * @{
Kojto 96:487b796308b0 51 */
Kojto 96:487b796308b0 52
Kojto 96:487b796308b0 53 #if defined (STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG) || defined(STM32F100xE)
Kojto 96:487b796308b0 54
Kojto 96:487b796308b0 55 /** @addtogroup SRAM
Kojto 96:487b796308b0 56 * @{
Kojto 96:487b796308b0 57 */
Kojto 96:487b796308b0 58
Kojto 96:487b796308b0 59 /* Exported typedef ----------------------------------------------------------*/
Kojto 96:487b796308b0 60
Kojto 96:487b796308b0 61 /** @defgroup SRAM_Exported_Types SRAM Exported Types
Kojto 96:487b796308b0 62 * @{
Kojto 96:487b796308b0 63 */
Kojto 96:487b796308b0 64 /**
Kojto 96:487b796308b0 65 * @brief HAL SRAM State structures definition
Kojto 96:487b796308b0 66 */
Kojto 96:487b796308b0 67 typedef enum
Kojto 96:487b796308b0 68 {
Kojto 96:487b796308b0 69 HAL_SRAM_STATE_RESET = 0x00, /*!< SRAM not yet initialized or disabled */
Kojto 96:487b796308b0 70 HAL_SRAM_STATE_READY = 0x01, /*!< SRAM initialized and ready for use */
Kojto 96:487b796308b0 71 HAL_SRAM_STATE_BUSY = 0x02, /*!< SRAM internal process is ongoing */
Kojto 96:487b796308b0 72 HAL_SRAM_STATE_ERROR = 0x03, /*!< SRAM error state */
Kojto 96:487b796308b0 73 HAL_SRAM_STATE_PROTECTED = 0x04 /*!< SRAM peripheral NORSRAM device write protected */
Kojto 96:487b796308b0 74
Kojto 96:487b796308b0 75 }HAL_SRAM_StateTypeDef;
Kojto 96:487b796308b0 76
Kojto 96:487b796308b0 77 /**
Kojto 96:487b796308b0 78 * @brief SRAM handle Structure definition
Kojto 96:487b796308b0 79 */
Kojto 96:487b796308b0 80 typedef struct
Kojto 96:487b796308b0 81 {
Kojto 96:487b796308b0 82 FSMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
Kojto 96:487b796308b0 83
Kojto 96:487b796308b0 84 FSMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
Kojto 96:487b796308b0 85
Kojto 96:487b796308b0 86 FSMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */
Kojto 96:487b796308b0 87
Kojto 96:487b796308b0 88 HAL_LockTypeDef Lock; /*!< SRAM locking object */
Kojto 96:487b796308b0 89
Kojto 96:487b796308b0 90 __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */
Kojto 96:487b796308b0 91
Kojto 96:487b796308b0 92 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
Kojto 96:487b796308b0 93
Kojto 96:487b796308b0 94 }SRAM_HandleTypeDef;
Kojto 96:487b796308b0 95
Kojto 96:487b796308b0 96 /**
Kojto 96:487b796308b0 97 * @}
Kojto 96:487b796308b0 98 */
Kojto 96:487b796308b0 99
Kojto 96:487b796308b0 100 /* Exported constants --------------------------------------------------------*/
Kojto 96:487b796308b0 101 /* Exported macro ------------------------------------------------------------*/
Kojto 96:487b796308b0 102
Kojto 96:487b796308b0 103 /** @defgroup SRAM_Exported_Macros SRAM Exported Macros
Kojto 96:487b796308b0 104 * @{
Kojto 96:487b796308b0 105 */
Kojto 96:487b796308b0 106
Kojto 96:487b796308b0 107 /** @brief Reset SRAM handle state
Kojto 96:487b796308b0 108 * @param __HANDLE__: SRAM handle
Kojto 96:487b796308b0 109 * @retval None
Kojto 96:487b796308b0 110 */
Kojto 96:487b796308b0 111 #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
Kojto 96:487b796308b0 112
Kojto 96:487b796308b0 113 /**
Kojto 96:487b796308b0 114 * @}
Kojto 96:487b796308b0 115 */
Kojto 96:487b796308b0 116
Kojto 96:487b796308b0 117 /* Exported functions --------------------------------------------------------*/
Kojto 96:487b796308b0 118
Kojto 96:487b796308b0 119 /** @addtogroup SRAM_Exported_Functions
Kojto 96:487b796308b0 120 * @{
Kojto 96:487b796308b0 121 */
Kojto 96:487b796308b0 122
Kojto 96:487b796308b0 123 /** @addtogroup SRAM_Exported_Functions_Group1
Kojto 96:487b796308b0 124 * @{
Kojto 96:487b796308b0 125 */
Kojto 96:487b796308b0 126
Kojto 96:487b796308b0 127 /* Initialization/de-initialization functions **********************************/
Kojto 96:487b796308b0 128 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FSMC_NORSRAM_TimingTypeDef *Timing, FSMC_NORSRAM_TimingTypeDef *ExtTiming);
Kojto 96:487b796308b0 129 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
Kojto 96:487b796308b0 130 void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
Kojto 96:487b796308b0 131 void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
Kojto 96:487b796308b0 132
Kojto 96:487b796308b0 133 void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
Kojto 96:487b796308b0 134 void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
Kojto 96:487b796308b0 135
Kojto 96:487b796308b0 136 /**
Kojto 96:487b796308b0 137 * @}
Kojto 96:487b796308b0 138 */
Kojto 96:487b796308b0 139
Kojto 96:487b796308b0 140 /** @addtogroup SRAM_Exported_Functions_Group2
Kojto 96:487b796308b0 141 * @{
Kojto 96:487b796308b0 142 */
Kojto 96:487b796308b0 143
Kojto 96:487b796308b0 144 /* I/O operation functions *****************************************************/
Kojto 96:487b796308b0 145 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
Kojto 96:487b796308b0 146 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
Kojto 96:487b796308b0 147 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
Kojto 96:487b796308b0 148 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
Kojto 96:487b796308b0 149 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
Kojto 96:487b796308b0 150 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
Kojto 96:487b796308b0 151 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
Kojto 96:487b796308b0 152 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
Kojto 96:487b796308b0 153
Kojto 96:487b796308b0 154 /**
Kojto 96:487b796308b0 155 * @}
Kojto 96:487b796308b0 156 */
Kojto 96:487b796308b0 157
Kojto 96:487b796308b0 158 /** @addtogroup SRAM_Exported_Functions_Group3
Kojto 96:487b796308b0 159 * @{
Kojto 96:487b796308b0 160 */
Kojto 96:487b796308b0 161
Kojto 96:487b796308b0 162 /* SRAM Control functions ******************************************************/
Kojto 96:487b796308b0 163 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
Kojto 96:487b796308b0 164 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
Kojto 96:487b796308b0 165
Kojto 96:487b796308b0 166 /**
Kojto 96:487b796308b0 167 * @}
Kojto 96:487b796308b0 168 */
Kojto 96:487b796308b0 169
Kojto 96:487b796308b0 170 /** @addtogroup SRAM_Exported_Functions_Group4
Kojto 96:487b796308b0 171 * @{
Kojto 96:487b796308b0 172 */
Kojto 96:487b796308b0 173
Kojto 96:487b796308b0 174 /* SRAM State functions *********************************************************/
Kojto 96:487b796308b0 175 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
Kojto 96:487b796308b0 176
Kojto 96:487b796308b0 177 /**
Kojto 96:487b796308b0 178 * @}
Kojto 96:487b796308b0 179 */
Kojto 96:487b796308b0 180
Kojto 96:487b796308b0 181 /**
Kojto 96:487b796308b0 182 * @}
Kojto 96:487b796308b0 183 */
Kojto 96:487b796308b0 184
Kojto 96:487b796308b0 185 /**
Kojto 96:487b796308b0 186 * @}
Kojto 96:487b796308b0 187 */
Kojto 96:487b796308b0 188
Kojto 96:487b796308b0 189 #endif /* STM32F101xE || STM32F103xE || STM32F101xG || STM32F103xG || STM32F100xE */
Kojto 96:487b796308b0 190
Kojto 96:487b796308b0 191 /**
Kojto 96:487b796308b0 192 * @}
Kojto 96:487b796308b0 193 */
Kojto 96:487b796308b0 194
Kojto 96:487b796308b0 195 #ifdef __cplusplus
Kojto 96:487b796308b0 196 }
Kojto 96:487b796308b0 197 #endif
Kojto 96:487b796308b0 198
Kojto 96:487b796308b0 199 #endif /* __STM32F1xx_HAL_SRAM_H */
Kojto 96:487b796308b0 200
Kojto 96:487b796308b0 201 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/