雄介 太田 / mbed

mbed(SerialHalfDuplex入り)

Fork of mbed by mbed official

SPI.h@45:3d775a932e1d, 2012-11-22 (annotated)

Committer:
emilmont
Date:
Thu Nov 22 16:04:31 2012 +0000
Revision:
45:3d775a932e1d
Parent:
44:24d45a770a51
Child:
54:71b101360fb9
Fix serial interrupt handler for LPC1768

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 44:24d45a770a51 1 /* mbed Microcontroller Library
emilmont 44:24d45a770a51 2 * Copyright (c) 2006-2012 ARM Limited
emilmont 44:24d45a770a51 3 *
emilmont 44:24d45a770a51 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
emilmont 44:24d45a770a51 5 * of this software and associated documentation files (the "Software"), to deal
emilmont 44:24d45a770a51 6 * in the Software without restriction, including without limitation the rights
emilmont 44:24d45a770a51 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
emilmont 44:24d45a770a51 8 * copies of the Software, and to permit persons to whom the Software is
emilmont 44:24d45a770a51 9 * furnished to do so, subject to the following conditions:
emilmont 44:24d45a770a51 10 *
emilmont 44:24d45a770a51 11 * The above copyright notice and this permission notice shall be included in
emilmont 44:24d45a770a51 12 * all copies or substantial portions of the Software.
emilmont 44:24d45a770a51 13 *
emilmont 44:24d45a770a51 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
emilmont 44:24d45a770a51 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
emilmont 44:24d45a770a51 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
emilmont 44:24d45a770a51 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
emilmont 44:24d45a770a51 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
emilmont 44:24d45a770a51 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
emilmont 44:24d45a770a51 20 * SOFTWARE.
emilmont 44:24d45a770a51 21 */
emilmont 44:24d45a770a51 22 #ifndef MBED_SPI_H
emilmont 44:24d45a770a51 23 #define MBED_SPI_H
emilmont 44:24d45a770a51 24
emilmont 44:24d45a770a51 25 #include "platform.h"
emilmont 44:24d45a770a51 26
emilmont 44:24d45a770a51 27 #if DEVICE_SPI
emilmont 44:24d45a770a51 28
emilmont 44:24d45a770a51 29 #include "spi_api.h"
emilmont 44:24d45a770a51 30
emilmont 44:24d45a770a51 31 namespace mbed {
emilmont 44:24d45a770a51 32
emilmont 44:24d45a770a51 33 /** A SPI Master, used for communicating with SPI slave devices
emilmont 44:24d45a770a51 34 *
emilmont 44:24d45a770a51 35 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
emilmont 44:24d45a770a51 36 *
emilmont 44:24d45a770a51 37 * Most SPI devices will also require Chip Select and Reset signals. These
emilmont 44:24d45a770a51 38 * can be controlled using <DigitalOut> pins
emilmont 44:24d45a770a51 39 *
emilmont 44:24d45a770a51 40 * Example:
emilmont 44:24d45a770a51 41 * @code
emilmont 44:24d45a770a51 42 * // Send a byte to a SPI slave, and record the response
emilmont 44:24d45a770a51 43 *
emilmont 44:24d45a770a51 44 * #include "mbed.h"
emilmont 44:24d45a770a51 45 *
emilmont 44:24d45a770a51 46 * SPI device(p5, p6, p7); // mosi, miso, sclk
emilmont 44:24d45a770a51 47 *
emilmont 44:24d45a770a51 48 * int main() {
emilmont 44:24d45a770a51 49 * int response = device.write(0xFF);
emilmont 44:24d45a770a51 50 * }
emilmont 44:24d45a770a51 51 * @endcode
emilmont 44:24d45a770a51 52 */
emilmont 44:24d45a770a51 53 class SPI {
emilmont 44:24d45a770a51 54
emilmont 44:24d45a770a51 55 public:
emilmont 44:24d45a770a51 56
emilmont 44:24d45a770a51 57 /** Create a SPI master connected to the specified pins
emilmont 44:24d45a770a51 58 *
emilmont 44:24d45a770a51 59 * Pin Options:
emilmont 44:24d45a770a51 60 * (5, 6, 7) or (11, 12, 13)
emilmont 44:24d45a770a51 61 *
emilmont 44:24d45a770a51 62 * mosi or miso can be specfied as NC if not used
emilmont 44:24d45a770a51 63 *
emilmont 44:24d45a770a51 64 * @param mosi SPI Master Out, Slave In pin
emilmont 44:24d45a770a51 65 * @param miso SPI Master In, Slave Out pin
emilmont 44:24d45a770a51 66 * @param sclk SPI Clock pin
emilmont 44:24d45a770a51 67 */
emilmont 44:24d45a770a51 68 SPI(PinName mosi, PinName miso, PinName sclk);
emilmont 44:24d45a770a51 69
emilmont 44:24d45a770a51 70 /** Configure the data transmission format
emilmont 44:24d45a770a51 71 *
emilmont 44:24d45a770a51 72 * @param bits Number of bits per SPI frame (4 - 16)
emilmont 44:24d45a770a51 73 * @param mode Clock polarity and phase mode (0 - 3)
emilmont 44:24d45a770a51 74 *
emilmont 44:24d45a770a51 75 * @code
emilmont 44:24d45a770a51 76 * mode | POL PHA
emilmont 44:24d45a770a51 77 * -----+--------
emilmont 44:24d45a770a51 78 * 0 | 0 0
emilmont 44:24d45a770a51 79 * 1 | 0 1
emilmont 44:24d45a770a51 80 * 2 | 1 0
emilmont 44:24d45a770a51 81 * 3 | 1 1
emilmont 44:24d45a770a51 82 * @endcode
emilmont 44:24d45a770a51 83 */
emilmont 44:24d45a770a51 84 void format(int bits, int mode = 0);
emilmont 44:24d45a770a51 85
emilmont 44:24d45a770a51 86 /** Set the spi bus clock frequency
emilmont 44:24d45a770a51 87 *
emilmont 44:24d45a770a51 88 * @param hz SCLK frequency in hz (default = 1MHz)
emilmont 44:24d45a770a51 89 */
emilmont 44:24d45a770a51 90 void frequency(int hz = 1000000);
emilmont 44:24d45a770a51 91
emilmont 44:24d45a770a51 92 /** Write to the SPI Slave and return the response
emilmont 44:24d45a770a51 93 *
emilmont 44:24d45a770a51 94 * @param value Data to be sent to the SPI slave
emilmont 44:24d45a770a51 95 *
emilmont 44:24d45a770a51 96 * @returns
emilmont 44:24d45a770a51 97 * Response from the SPI slave
emilmont 44:24d45a770a51 98 */
emilmont 44:24d45a770a51 99 virtual int write(int value);
emilmont 44:24d45a770a51 100
emilmont 44:24d45a770a51 101 protected:
emilmont 44:24d45a770a51 102 spi_t _spi;
emilmont 44:24d45a770a51 103
emilmont 44:24d45a770a51 104 void aquire(void);
emilmont 44:24d45a770a51 105 static SPI *_owner;
emilmont 44:24d45a770a51 106 int _bits;
emilmont 44:24d45a770a51 107 int _mode;
emilmont 44:24d45a770a51 108 int _hz;
emilmont 44:24d45a770a51 109 };
emilmont 44:24d45a770a51 110
emilmont 44:24d45a770a51 111 } // namespace mbed
emilmont 44:24d45a770a51 112
emilmont 44:24d45a770a51 113 #endif
emilmont 44:24d45a770a51 114
emilmont 44:24d45a770a51 115 #endif