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TARGET_NUCLEO_F411RE/stm32f4xx_hal_dma2d.h@98:01a414ca7d6d, 2015-04-08 (annotated)

Committer:
yusuke_kyo
Date:
Wed Apr 08 08:04:18 2015 +0000
Revision:
98:01a414ca7d6d
Parent:
86:04dd9b1680ae 
remove SerialHalfDuplex.h

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 86:04dd9b1680ae 1 /**
bogdanm 86:04dd9b1680ae 2 ******************************************************************************
bogdanm 86:04dd9b1680ae 3 * @file stm32f4xx_hal_dma2d.h
bogdanm 86:04dd9b1680ae 4 * @author MCD Application Team
bogdanm 86:04dd9b1680ae 5 * @version V1.1.0
bogdanm 86:04dd9b1680ae 6 * @date 19-June-2014
bogdanm 86:04dd9b1680ae 7 * @brief Header file of DMA2D HAL module.
bogdanm 86:04dd9b1680ae 8 ******************************************************************************
bogdanm 86:04dd9b1680ae 9 * @attention
bogdanm 86:04dd9b1680ae 10 *
bogdanm 86:04dd9b1680ae 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 86:04dd9b1680ae 12 *
bogdanm 86:04dd9b1680ae 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 86:04dd9b1680ae 14 * are permitted provided that the following conditions are met:
bogdanm 86:04dd9b1680ae 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 86:04dd9b1680ae 16 * this list of conditions and the following disclaimer.
bogdanm 86:04dd9b1680ae 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 86:04dd9b1680ae 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 86:04dd9b1680ae 19 * and/or other materials provided with the distribution.
bogdanm 86:04dd9b1680ae 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 86:04dd9b1680ae 21 * may be used to endorse or promote products derived from this software
bogdanm 86:04dd9b1680ae 22 * without specific prior written permission.
bogdanm 86:04dd9b1680ae 23 *
bogdanm 86:04dd9b1680ae 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 86:04dd9b1680ae 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 86:04dd9b1680ae 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 86:04dd9b1680ae 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 86:04dd9b1680ae 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 86:04dd9b1680ae 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 86:04dd9b1680ae 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 86:04dd9b1680ae 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 86:04dd9b1680ae 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 86:04dd9b1680ae 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 86:04dd9b1680ae 34 *
bogdanm 86:04dd9b1680ae 35 ******************************************************************************
bogdanm 86:04dd9b1680ae 36 */
bogdanm 86:04dd9b1680ae 37
bogdanm 86:04dd9b1680ae 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 86:04dd9b1680ae 39 #ifndef __STM32F4xx_HAL_DMA2D_H
bogdanm 86:04dd9b1680ae 40 #define __STM32F4xx_HAL_DMA2D_H
bogdanm 86:04dd9b1680ae 41
bogdanm 86:04dd9b1680ae 42 #ifdef __cplusplus
bogdanm 86:04dd9b1680ae 43 extern "C" {
bogdanm 86:04dd9b1680ae 44 #endif
bogdanm 86:04dd9b1680ae 45
bogdanm 86:04dd9b1680ae 46 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
bogdanm 86:04dd9b1680ae 47 /* Includes ------------------------------------------------------------------*/
bogdanm 86:04dd9b1680ae 48 #include "stm32f4xx_hal_def.h"
bogdanm 86:04dd9b1680ae 49
bogdanm 86:04dd9b1680ae 50 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 86:04dd9b1680ae 51 * @{
bogdanm 86:04dd9b1680ae 52 */
bogdanm 86:04dd9b1680ae 53
bogdanm 86:04dd9b1680ae 54 /** @addtogroup DMA2D
bogdanm 86:04dd9b1680ae 55 * @{
bogdanm 86:04dd9b1680ae 56 */
bogdanm 86:04dd9b1680ae 57
bogdanm 86:04dd9b1680ae 58 /* Exported types ------------------------------------------------------------*/
bogdanm 86:04dd9b1680ae 59
bogdanm 86:04dd9b1680ae 60 #define MAX_DMA2D_LAYER 2
bogdanm 86:04dd9b1680ae 61
bogdanm 86:04dd9b1680ae 62 /**
bogdanm 86:04dd9b1680ae 63 * @brief DMA2D color Structure definition
bogdanm 86:04dd9b1680ae 64 */
bogdanm 86:04dd9b1680ae 65 typedef struct
bogdanm 86:04dd9b1680ae 66 {
bogdanm 86:04dd9b1680ae 67 uint32_t Blue; /*!< Configures the blue value.
bogdanm 86:04dd9b1680ae 68 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
bogdanm 86:04dd9b1680ae 69
bogdanm 86:04dd9b1680ae 70 uint32_t Green; /*!< Configures the green value.
bogdanm 86:04dd9b1680ae 71 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
bogdanm 86:04dd9b1680ae 72
bogdanm 86:04dd9b1680ae 73 uint32_t Red; /*!< Configures the red value.
bogdanm 86:04dd9b1680ae 74 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
bogdanm 86:04dd9b1680ae 75 } DMA2D_ColorTypeDef;
bogdanm 86:04dd9b1680ae 76
bogdanm 86:04dd9b1680ae 77 /**
bogdanm 86:04dd9b1680ae 78 * @brief DMA2D CLUT Structure definition
bogdanm 86:04dd9b1680ae 79 */
bogdanm 86:04dd9b1680ae 80 typedef struct
bogdanm 86:04dd9b1680ae 81 {
bogdanm 86:04dd9b1680ae 82 uint32_t *pCLUT; /*!< Configures the DMA2D CLUT memory address.*/
bogdanm 86:04dd9b1680ae 83
bogdanm 86:04dd9b1680ae 84 uint32_t CLUTColorMode; /*!< configures the DMA2D CLUT color mode.
bogdanm 86:04dd9b1680ae 85 This parameter can be one value of @ref DMA2D_CLUT_CM */
bogdanm 86:04dd9b1680ae 86
bogdanm 86:04dd9b1680ae 87 uint32_t Size; /*!< configures the DMA2D CLUT size.
bogdanm 86:04dd9b1680ae 88 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/
bogdanm 86:04dd9b1680ae 89 } DMA2D_CLUTCfgTypeDef;
bogdanm 86:04dd9b1680ae 90
bogdanm 86:04dd9b1680ae 91 /**
bogdanm 86:04dd9b1680ae 92 * @brief DMA2D Init structure definition
bogdanm 86:04dd9b1680ae 93 */
bogdanm 86:04dd9b1680ae 94 typedef struct
bogdanm 86:04dd9b1680ae 95 {
bogdanm 86:04dd9b1680ae 96 uint32_t Mode; /*!< configures the DMA2D transfer mode.
bogdanm 86:04dd9b1680ae 97 This parameter can be one value of @ref DMA2D_Mode */
bogdanm 86:04dd9b1680ae 98
bogdanm 86:04dd9b1680ae 99 uint32_t ColorMode; /*!< configures the color format of the output image.
bogdanm 86:04dd9b1680ae 100 This parameter can be one value of @ref DMA2D_Color_Mode */
bogdanm 86:04dd9b1680ae 101
bogdanm 86:04dd9b1680ae 102 uint32_t OutputOffset; /*!< Specifies the Offset value.
bogdanm 86:04dd9b1680ae 103 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
bogdanm 86:04dd9b1680ae 104 } DMA2D_InitTypeDef;
bogdanm 86:04dd9b1680ae 105
bogdanm 86:04dd9b1680ae 106 /**
bogdanm 86:04dd9b1680ae 107 * @brief DMA2D Layer structure definition
bogdanm 86:04dd9b1680ae 108 */
bogdanm 86:04dd9b1680ae 109 typedef struct
bogdanm 86:04dd9b1680ae 110 {
bogdanm 86:04dd9b1680ae 111 uint32_t InputOffset; /*!< configures the DMA2D foreground offset.
bogdanm 86:04dd9b1680ae 112 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
bogdanm 86:04dd9b1680ae 113
bogdanm 86:04dd9b1680ae 114 uint32_t InputColorMode; /*!< configures the DMA2D foreground color mode .
bogdanm 86:04dd9b1680ae 115 This parameter can be one value of @ref DMA2D_Input_Color_Mode */
bogdanm 86:04dd9b1680ae 116
bogdanm 86:04dd9b1680ae 117 uint32_t AlphaMode; /*!< configures the DMA2D foreground alpha mode.
bogdanm 86:04dd9b1680ae 118 This parameter can be one value of @ref DMA2D_ALPHA_MODE */
bogdanm 86:04dd9b1680ae 119
bogdanm 86:04dd9b1680ae 120 uint32_t InputAlpha; /*!< Specifies the DMA2D foreground alpha value and color value in case of A8 or A4 color mode.
bogdanm 86:04dd9b1680ae 121 This parameter must be a number between Min_Data = 0x00000000 and Max_Data = 0xFFFFFFFF
bogdanm 86:04dd9b1680ae 122 in case of A8 or A4 color mode (ARGB).
bogdanm 86:04dd9b1680ae 123 Otherwise, This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/
bogdanm 86:04dd9b1680ae 124
bogdanm 86:04dd9b1680ae 125 } DMA2D_LayerCfgTypeDef;
bogdanm 86:04dd9b1680ae 126
bogdanm 86:04dd9b1680ae 127 /**
bogdanm 86:04dd9b1680ae 128 * @brief HAL DMA2D State structures definition
bogdanm 86:04dd9b1680ae 129 */
bogdanm 86:04dd9b1680ae 130 typedef enum
bogdanm 86:04dd9b1680ae 131 {
bogdanm 86:04dd9b1680ae 132 HAL_DMA2D_STATE_RESET = 0x00, /*!< DMA2D not yet initialized or disabled */
bogdanm 86:04dd9b1680ae 133 HAL_DMA2D_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
bogdanm 86:04dd9b1680ae 134 HAL_DMA2D_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
bogdanm 86:04dd9b1680ae 135 HAL_DMA2D_STATE_TIMEOUT = 0x03, /*!< Timeout state */
bogdanm 86:04dd9b1680ae 136 HAL_DMA2D_STATE_ERROR = 0x04, /*!< DMA2D state error */
bogdanm 86:04dd9b1680ae 137 HAL_DMA2D_STATE_SUSPEND = 0x05 /*!< DMA2D process is suspended */
bogdanm 86:04dd9b1680ae 138 }HAL_DMA2D_StateTypeDef;
bogdanm 86:04dd9b1680ae 139
bogdanm 86:04dd9b1680ae 140 /**
bogdanm 86:04dd9b1680ae 141 * @brief DMA2D handle Structure definition
bogdanm 86:04dd9b1680ae 142 */
bogdanm 86:04dd9b1680ae 143 typedef struct __DMA2D_HandleTypeDef
bogdanm 86:04dd9b1680ae 144 {
bogdanm 86:04dd9b1680ae 145 DMA2D_TypeDef *Instance; /*!< DMA2D Register base address */
bogdanm 86:04dd9b1680ae 146
bogdanm 86:04dd9b1680ae 147 DMA2D_InitTypeDef Init; /*!< DMA2D communication parameters */
bogdanm 86:04dd9b1680ae 148
bogdanm 86:04dd9b1680ae 149 void (* XferCpltCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer complete callback */
bogdanm 86:04dd9b1680ae 150
bogdanm 86:04dd9b1680ae 151 void (* XferErrorCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer error callback */
bogdanm 86:04dd9b1680ae 152
bogdanm 86:04dd9b1680ae 153 DMA2D_LayerCfgTypeDef LayerCfg[MAX_DMA2D_LAYER]; /*!< DMA2D Layers parameters */
bogdanm 86:04dd9b1680ae 154
bogdanm 86:04dd9b1680ae 155 HAL_LockTypeDef Lock; /*!< DMA2D Lock */
bogdanm 86:04dd9b1680ae 156
bogdanm 86:04dd9b1680ae 157 __IO HAL_DMA2D_StateTypeDef State; /*!< DMA2D transfer state */
bogdanm 86:04dd9b1680ae 158
bogdanm 86:04dd9b1680ae 159 __IO uint32_t ErrorCode; /*!< DMA2D Error code */
bogdanm 86:04dd9b1680ae 160 } DMA2D_HandleTypeDef;
bogdanm 86:04dd9b1680ae 161
bogdanm 86:04dd9b1680ae 162
bogdanm 86:04dd9b1680ae 163 /* Exported constants --------------------------------------------------------*/
bogdanm 86:04dd9b1680ae 164
bogdanm 86:04dd9b1680ae 165 /** @defgroup DMA2D_Exported_Constants
bogdanm 86:04dd9b1680ae 166 * @{
bogdanm 86:04dd9b1680ae 167 */
bogdanm 86:04dd9b1680ae 168
bogdanm 86:04dd9b1680ae 169 /** @defgroup DMA2D_Layer
bogdanm 86:04dd9b1680ae 170 * @{
bogdanm 86:04dd9b1680ae 171 */
bogdanm 86:04dd9b1680ae 172 #define IS_DMA2D_LAYER(LAYER) ((LAYER) <= MAX_DMA2D_LAYER)
bogdanm 86:04dd9b1680ae 173 /**
bogdanm 86:04dd9b1680ae 174 * @}
bogdanm 86:04dd9b1680ae 175 */
bogdanm 86:04dd9b1680ae 176
bogdanm 86:04dd9b1680ae 177 /** @defgroup DMA2D_Error_Code
bogdanm 86:04dd9b1680ae 178 * @{
bogdanm 86:04dd9b1680ae 179 */
bogdanm 86:04dd9b1680ae 180 #define HAL_DMA2D_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
bogdanm 86:04dd9b1680ae 181 #define HAL_DMA2D_ERROR_TE ((uint32_t)0x00000001) /*!< Transfer error */
bogdanm 86:04dd9b1680ae 182 #define HAL_DMA2D_ERROR_CE ((uint32_t)0x00000002) /*!< Configuration error */
bogdanm 86:04dd9b1680ae 183 #define HAL_DMA2D_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
bogdanm 86:04dd9b1680ae 184 /**
bogdanm 86:04dd9b1680ae 185 * @}
bogdanm 86:04dd9b1680ae 186 */
bogdanm 86:04dd9b1680ae 187
bogdanm 86:04dd9b1680ae 188 /** @defgroup DMA2D_Mode
bogdanm 86:04dd9b1680ae 189 * @{
bogdanm 86:04dd9b1680ae 190 */
bogdanm 86:04dd9b1680ae 191 #define DMA2D_M2M ((uint32_t)0x00000000) /*!< DMA2D memory to memory transfer mode */
bogdanm 86:04dd9b1680ae 192 #define DMA2D_M2M_PFC ((uint32_t)0x00010000) /*!< DMA2D memory to memory with pixel format conversion transfer mode */
bogdanm 86:04dd9b1680ae 193 #define DMA2D_M2M_BLEND ((uint32_t)0x00020000) /*!< DMA2D memory to memory with blending transfer mode */
bogdanm 86:04dd9b1680ae 194 #define DMA2D_R2M ((uint32_t)0x00030000) /*!< DMA2D register to memory transfer mode */
bogdanm 86:04dd9b1680ae 195
bogdanm 86:04dd9b1680ae 196 #define IS_DMA2D_MODE(MODE) (((MODE) == DMA2D_M2M) || ((MODE) == DMA2D_M2M_PFC) || \
bogdanm 86:04dd9b1680ae 197 ((MODE) == DMA2D_M2M_BLEND) || ((MODE) == DMA2D_R2M))
bogdanm 86:04dd9b1680ae 198 /**
bogdanm 86:04dd9b1680ae 199 * @}
bogdanm 86:04dd9b1680ae 200 */
bogdanm 86:04dd9b1680ae 201
bogdanm 86:04dd9b1680ae 202 /** @defgroup DMA2D_Color_Mode
bogdanm 86:04dd9b1680ae 203 * @{
bogdanm 86:04dd9b1680ae 204 */
bogdanm 86:04dd9b1680ae 205 #define DMA2D_ARGB8888 ((uint32_t)0x00000000) /*!< ARGB8888 DMA2D color mode */
bogdanm 86:04dd9b1680ae 206 #define DMA2D_RGB888 ((uint32_t)0x00000001) /*!< RGB888 DMA2D color mode */
bogdanm 86:04dd9b1680ae 207 #define DMA2D_RGB565 ((uint32_t)0x00000002) /*!< RGB565 DMA2D color mode */
bogdanm 86:04dd9b1680ae 208 #define DMA2D_ARGB1555 ((uint32_t)0x00000003) /*!< ARGB1555 DMA2D color mode */
bogdanm 86:04dd9b1680ae 209 #define DMA2D_ARGB4444 ((uint32_t)0x00000004) /*!< ARGB4444 DMA2D color mode */
bogdanm 86:04dd9b1680ae 210
bogdanm 86:04dd9b1680ae 211 #define IS_DMA2D_CMODE(MODE_ARGB) (((MODE_ARGB) == DMA2D_ARGB8888) || ((MODE_ARGB) == DMA2D_RGB888) || \
bogdanm 86:04dd9b1680ae 212 ((MODE_ARGB) == DMA2D_RGB565) || ((MODE_ARGB) == DMA2D_ARGB1555) || \
bogdanm 86:04dd9b1680ae 213 ((MODE_ARGB) == DMA2D_ARGB4444))
bogdanm 86:04dd9b1680ae 214 /**
bogdanm 86:04dd9b1680ae 215 * @}
bogdanm 86:04dd9b1680ae 216 */
bogdanm 86:04dd9b1680ae 217
bogdanm 86:04dd9b1680ae 218 /** @defgroup DMA2D_COLOR_VALUE
bogdanm 86:04dd9b1680ae 219 * @{
bogdanm 86:04dd9b1680ae 220 */
bogdanm 86:04dd9b1680ae 221
bogdanm 86:04dd9b1680ae 222 #define COLOR_VALUE ((uint32_t)0x000000FF) /*!< color value mask */
bogdanm 86:04dd9b1680ae 223
bogdanm 86:04dd9b1680ae 224 #define IS_DMA2D_COLOR(COLOR) ((COLOR) <= COLOR_VALUE)
bogdanm 86:04dd9b1680ae 225 /**
bogdanm 86:04dd9b1680ae 226 * @}
bogdanm 86:04dd9b1680ae 227 */
bogdanm 86:04dd9b1680ae 228
bogdanm 86:04dd9b1680ae 229 /** @defgroup DMA2D_SIZE
bogdanm 86:04dd9b1680ae 230 * @{
bogdanm 86:04dd9b1680ae 231 */
bogdanm 86:04dd9b1680ae 232 #define DMA2D_PIXEL (DMA2D_NLR_PL >> 16) /*!< DMA2D pixel per line */
bogdanm 86:04dd9b1680ae 233 #define DMA2D_LINE DMA2D_NLR_NL /*!< DMA2D number of line */
bogdanm 86:04dd9b1680ae 234
bogdanm 86:04dd9b1680ae 235 #define IS_DMA2D_LINE(LINE) ((LINE) <= DMA2D_LINE)
bogdanm 86:04dd9b1680ae 236 #define IS_DMA2D_PIXEL(PIXEL) ((PIXEL) <= DMA2D_PIXEL)
bogdanm 86:04dd9b1680ae 237 /**
bogdanm 86:04dd9b1680ae 238 * @}
bogdanm 86:04dd9b1680ae 239 */
bogdanm 86:04dd9b1680ae 240
bogdanm 86:04dd9b1680ae 241 /** @defgroup DMA2D_Offset
bogdanm 86:04dd9b1680ae 242 * @{
bogdanm 86:04dd9b1680ae 243 */
bogdanm 86:04dd9b1680ae 244 #define DMA2D_OFFSET DMA2D_FGOR_LO /*!< Line Offset */
bogdanm 86:04dd9b1680ae 245
bogdanm 86:04dd9b1680ae 246 #define IS_DMA2D_OFFSET(OOFFSET) ((OOFFSET) <= DMA2D_OFFSET)
bogdanm 86:04dd9b1680ae 247 /**
bogdanm 86:04dd9b1680ae 248 * @}
bogdanm 86:04dd9b1680ae 249 */
bogdanm 86:04dd9b1680ae 250
bogdanm 86:04dd9b1680ae 251 /** @defgroup DMA2D_Input_Color_Mode
bogdanm 86:04dd9b1680ae 252 * @{
bogdanm 86:04dd9b1680ae 253 */
bogdanm 86:04dd9b1680ae 254 #define CM_ARGB8888 ((uint32_t)0x00000000) /*!< ARGB8888 color mode */
bogdanm 86:04dd9b1680ae 255 #define CM_RGB888 ((uint32_t)0x00000001) /*!< RGB888 color mode */
bogdanm 86:04dd9b1680ae 256 #define CM_RGB565 ((uint32_t)0x00000002) /*!< RGB565 color mode */
bogdanm 86:04dd9b1680ae 257 #define CM_ARGB1555 ((uint32_t)0x00000003) /*!< ARGB1555 color mode */
bogdanm 86:04dd9b1680ae 258 #define CM_ARGB4444 ((uint32_t)0x00000004) /*!< ARGB4444 color mode */
bogdanm 86:04dd9b1680ae 259 #define CM_L8 ((uint32_t)0x00000005) /*!< L8 color mode */
bogdanm 86:04dd9b1680ae 260 #define CM_AL44 ((uint32_t)0x00000006) /*!< AL44 color mode */
bogdanm 86:04dd9b1680ae 261 #define CM_AL88 ((uint32_t)0x00000007) /*!< AL88 color mode */
bogdanm 86:04dd9b1680ae 262 #define CM_L4 ((uint32_t)0x00000008) /*!< L4 color mode */
bogdanm 86:04dd9b1680ae 263 #define CM_A8 ((uint32_t)0x00000009) /*!< A8 color mode */
bogdanm 86:04dd9b1680ae 264 #define CM_A4 ((uint32_t)0x0000000A) /*!< A4 color mode */
bogdanm 86:04dd9b1680ae 265
bogdanm 86:04dd9b1680ae 266 #define IS_DMA2D_INPUT_COLOR_MODE(INPUT_CM) (((INPUT_CM) == CM_ARGB8888) || ((INPUT_CM) == CM_RGB888) || \
bogdanm 86:04dd9b1680ae 267 ((INPUT_CM) == CM_RGB565) || ((INPUT_CM) == CM_ARGB1555) || \
bogdanm 86:04dd9b1680ae 268 ((INPUT_CM) == CM_ARGB4444) || ((INPUT_CM) == CM_L8) || \
bogdanm 86:04dd9b1680ae 269 ((INPUT_CM) == CM_AL44) || ((INPUT_CM) == CM_AL88) || \
bogdanm 86:04dd9b1680ae 270 ((INPUT_CM) == CM_L4) || ((INPUT_CM) == CM_A8) || \
bogdanm 86:04dd9b1680ae 271 ((INPUT_CM) == CM_A4))
bogdanm 86:04dd9b1680ae 272 /**
bogdanm 86:04dd9b1680ae 273 * @}
bogdanm 86:04dd9b1680ae 274 */
bogdanm 86:04dd9b1680ae 275
bogdanm 86:04dd9b1680ae 276 /** @defgroup DMA2D_ALPHA_MODE
bogdanm 86:04dd9b1680ae 277 * @{
bogdanm 86:04dd9b1680ae 278 */
bogdanm 86:04dd9b1680ae 279 #define DMA2D_NO_MODIF_ALPHA ((uint32_t)0x00000000) /*!< No modification of the alpha channel value */
bogdanm 86:04dd9b1680ae 280 #define DMA2D_REPLACE_ALPHA ((uint32_t)0x00000001) /*!< Replace original alpha channel value by programmed alpha value */
bogdanm 86:04dd9b1680ae 281 #define DMA2D_COMBINE_ALPHA ((uint32_t)0x00000002) /*!< Replace original alpha channel value by programmed alpha value
bogdanm 86:04dd9b1680ae 282 with original alpha channel value */
bogdanm 86:04dd9b1680ae 283
bogdanm 86:04dd9b1680ae 284 #define IS_DMA2D_ALPHA_MODE(AlphaMode) (((AlphaMode) == DMA2D_NO_MODIF_ALPHA) || \
bogdanm 86:04dd9b1680ae 285 ((AlphaMode) == DMA2D_REPLACE_ALPHA) || \
bogdanm 86:04dd9b1680ae 286 ((AlphaMode) == DMA2D_COMBINE_ALPHA))
bogdanm 86:04dd9b1680ae 287 /**
bogdanm 86:04dd9b1680ae 288 * @}
bogdanm 86:04dd9b1680ae 289 */
bogdanm 86:04dd9b1680ae 290
bogdanm 86:04dd9b1680ae 291 /** @defgroup DMA2D_CLUT_CM
bogdanm 86:04dd9b1680ae 292 * @{
bogdanm 86:04dd9b1680ae 293 */
bogdanm 86:04dd9b1680ae 294 #define DMA2D_CCM_ARGB8888 ((uint32_t)0x00000000) /*!< ARGB8888 DMA2D C-LUT color mode */
bogdanm 86:04dd9b1680ae 295 #define DMA2D_CCM_RGB888 ((uint32_t)0x00000001) /*!< RGB888 DMA2D C-LUT color mode */
bogdanm 86:04dd9b1680ae 296
bogdanm 86:04dd9b1680ae 297 #define IS_DMA2D_CLUT_CM(CLUT_CM) (((CLUT_CM) == DMA2D_CCM_ARGB8888) || ((CLUT_CM) == DMA2D_CCM_RGB888))
bogdanm 86:04dd9b1680ae 298 /**
bogdanm 86:04dd9b1680ae 299 * @}
bogdanm 86:04dd9b1680ae 300 */
bogdanm 86:04dd9b1680ae 301
bogdanm 86:04dd9b1680ae 302 /** @defgroup DMA2D_Size_Clut
bogdanm 86:04dd9b1680ae 303 * @{
bogdanm 86:04dd9b1680ae 304 */
bogdanm 86:04dd9b1680ae 305 #define DMA2D_CLUT_SIZE (DMA2D_FGPFCCR_CS >> 8) /*!< DMA2D C-LUT size */
bogdanm 86:04dd9b1680ae 306
bogdanm 86:04dd9b1680ae 307 #define IS_DMA2D_CLUT_SIZE(CLUT_SIZE) ((CLUT_SIZE) <= DMA2D_CLUT_SIZE)
bogdanm 86:04dd9b1680ae 308 /**
bogdanm 86:04dd9b1680ae 309 * @}
bogdanm 86:04dd9b1680ae 310 */
bogdanm 86:04dd9b1680ae 311
bogdanm 86:04dd9b1680ae 312 /** @defgroup DMA2D_DeadTime
bogdanm 86:04dd9b1680ae 313 * @{
bogdanm 86:04dd9b1680ae 314 */
bogdanm 86:04dd9b1680ae 315 #define LINE_WATERMARK DMA2D_LWR_LW
bogdanm 86:04dd9b1680ae 316
bogdanm 86:04dd9b1680ae 317 #define IS_DMA2D_LineWatermark(LineWatermark) ((LineWatermark) <= LINE_WATERMARK)
bogdanm 86:04dd9b1680ae 318 /**
bogdanm 86:04dd9b1680ae 319 * @}
bogdanm 86:04dd9b1680ae 320 */
bogdanm 86:04dd9b1680ae 321
bogdanm 86:04dd9b1680ae 322 /** @defgroup DMA2D_Interrupts
bogdanm 86:04dd9b1680ae 323 * @{
bogdanm 86:04dd9b1680ae 324 */
bogdanm 86:04dd9b1680ae 325 #define DMA2D_IT_CE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
bogdanm 86:04dd9b1680ae 326 #define DMA2D_IT_CTC DMA2D_CR_CTCIE /*!< C-LUT Transfer Complete Interrupt */
bogdanm 86:04dd9b1680ae 327 #define DMA2D_IT_CAE DMA2D_CR_CAEIE /*!< C-LUT Access Error Interrupt */
bogdanm 86:04dd9b1680ae 328 #define DMA2D_IT_TW DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
bogdanm 86:04dd9b1680ae 329 #define DMA2D_IT_TC DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
bogdanm 86:04dd9b1680ae 330 #define DMA2D_IT_TE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
bogdanm 86:04dd9b1680ae 331
bogdanm 86:04dd9b1680ae 332 #define IS_DMA2D_IT(IT) (((IT) == DMA2D_IT_CTC) || ((IT) == DMA2D_IT_CAE) || \
bogdanm 86:04dd9b1680ae 333 ((IT) == DMA2D_IT_TW) || ((IT) == DMA2D_IT_TC) || \
bogdanm 86:04dd9b1680ae 334 ((IT) == DMA2D_IT_TE) || ((IT) == DMA2D_IT_CE))
bogdanm 86:04dd9b1680ae 335 /**
bogdanm 86:04dd9b1680ae 336 * @}
bogdanm 86:04dd9b1680ae 337 */
bogdanm 86:04dd9b1680ae 338
bogdanm 86:04dd9b1680ae 339 /** @defgroup DMA2D_Flag
bogdanm 86:04dd9b1680ae 340 * @{
bogdanm 86:04dd9b1680ae 341 */
bogdanm 86:04dd9b1680ae 342 #define DMA2D_FLAG_CE DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
bogdanm 86:04dd9b1680ae 343 #define DMA2D_FLAG_CTC DMA2D_ISR_CTCIF /*!< C-LUT Transfer Complete Interrupt Flag */
bogdanm 86:04dd9b1680ae 344 #define DMA2D_FLAG_CAE DMA2D_ISR_CAEIF /*!< C-LUT Access Error Interrupt Flag */
bogdanm 86:04dd9b1680ae 345 #define DMA2D_FLAG_TW DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
bogdanm 86:04dd9b1680ae 346 #define DMA2D_FLAG_TC DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
bogdanm 86:04dd9b1680ae 347 #define DMA2D_FLAG_TE DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
bogdanm 86:04dd9b1680ae 348
bogdanm 86:04dd9b1680ae 349 #define IS_DMA2D_GET_FLAG(FLAG) (((FLAG) == DMA2D_FLAG_CTC) || ((FLAG) == DMA2D_FLAG_CAE) || \
bogdanm 86:04dd9b1680ae 350 ((FLAG) == DMA2D_FLAG_TW) || ((FLAG) == DMA2D_FLAG_TC) || \
bogdanm 86:04dd9b1680ae 351 ((FLAG) == DMA2D_FLAG_TE) || ((FLAG) == DMA2D_FLAG_CE))
bogdanm 86:04dd9b1680ae 352 /**
bogdanm 86:04dd9b1680ae 353 * @}
bogdanm 86:04dd9b1680ae 354 */
bogdanm 86:04dd9b1680ae 355
bogdanm 86:04dd9b1680ae 356 /**
bogdanm 86:04dd9b1680ae 357 * @}
bogdanm 86:04dd9b1680ae 358 */
bogdanm 86:04dd9b1680ae 359 /* Exported macro ------------------------------------------------------------*/
bogdanm 86:04dd9b1680ae 360
bogdanm 86:04dd9b1680ae 361 /** @brief Reset DMA2D handle state
bogdanm 86:04dd9b1680ae 362 * @param __HANDLE__: specifies the DMA2D handle.
bogdanm 86:04dd9b1680ae 363 * @retval None
bogdanm 86:04dd9b1680ae 364 */
bogdanm 86:04dd9b1680ae 365 #define __HAL_DMA2D_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA2D_STATE_RESET)
bogdanm 86:04dd9b1680ae 366
bogdanm 86:04dd9b1680ae 367 /**
bogdanm 86:04dd9b1680ae 368 * @brief Enable the DMA2D.
bogdanm 86:04dd9b1680ae 369 * @param __HANDLE__: DMA2D handle
bogdanm 86:04dd9b1680ae 370 * @retval None.
bogdanm 86:04dd9b1680ae 371 */
bogdanm 86:04dd9b1680ae 372 #define __HAL_DMA2D_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DMA2D_CR_START)
bogdanm 86:04dd9b1680ae 373
bogdanm 86:04dd9b1680ae 374 /**
bogdanm 86:04dd9b1680ae 375 * @brief Disable the DMA2D.
bogdanm 86:04dd9b1680ae 376 * @param __HANDLE__: DMA2D handle
bogdanm 86:04dd9b1680ae 377 * @retval None.
bogdanm 86:04dd9b1680ae 378 */
bogdanm 86:04dd9b1680ae 379 #define __HAL_DMA2D_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~DMA2D_CR_START)
bogdanm 86:04dd9b1680ae 380
bogdanm 86:04dd9b1680ae 381 /* Interrupt & Flag management */
bogdanm 86:04dd9b1680ae 382 /**
bogdanm 86:04dd9b1680ae 383 * @brief Get the DMA2D pending flags.
bogdanm 86:04dd9b1680ae 384 * @param __HANDLE__: DMA2D handle
bogdanm 86:04dd9b1680ae 385 * @param __FLAG__: Get the specified flag.
bogdanm 86:04dd9b1680ae 386 * This parameter can be any combination of the following values:
bogdanm 86:04dd9b1680ae 387 * @arg DMA2D_FLAG_CE: Configuration error flag
bogdanm 86:04dd9b1680ae 388 * @arg DMA2D_FLAG_CTC: C-LUT transfer complete flag
bogdanm 86:04dd9b1680ae 389 * @arg DMA2D_FLAG_CAE: C-LUT access error flag
bogdanm 86:04dd9b1680ae 390 * @arg DMA2D_FLAG_TW: Transfer Watermark flag
bogdanm 86:04dd9b1680ae 391 * @arg DMA2D_FLAG_TC: Transfer complete flag
bogdanm 86:04dd9b1680ae 392 * @arg DMA2D_FLAG_TE: Transfer error flag
bogdanm 86:04dd9b1680ae 393 * @retval The state of FLAG.
bogdanm 86:04dd9b1680ae 394 */
bogdanm 86:04dd9b1680ae 395 #define __HAL_DMA2D_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__))
bogdanm 86:04dd9b1680ae 396
bogdanm 86:04dd9b1680ae 397 /**
bogdanm 86:04dd9b1680ae 398 * @brief Clears the DMA2D pending flags.
bogdanm 86:04dd9b1680ae 399 * @param __HANDLE__: DMA2D handle
bogdanm 86:04dd9b1680ae 400 * @param __FLAG__: specifies the flag to clear.
bogdanm 86:04dd9b1680ae 401 * This parameter can be any combination of the following values:
bogdanm 86:04dd9b1680ae 402 * @arg DMA2D_FLAG_CE: Configuration error flag
bogdanm 86:04dd9b1680ae 403 * @arg DMA2D_FLAG_CTC: C-LUT transfer complete flag
bogdanm 86:04dd9b1680ae 404 * @arg DMA2D_FLAG_CAE: C-LUT access error flag
bogdanm 86:04dd9b1680ae 405 * @arg DMA2D_FLAG_TW: Transfer Watermark flag
bogdanm 86:04dd9b1680ae 406 * @arg DMA2D_FLAG_TC: Transfer complete flag
bogdanm 86:04dd9b1680ae 407 * @arg DMA2D_FLAG_TE: Transfer error flag
bogdanm 86:04dd9b1680ae 408 * @retval None
bogdanm 86:04dd9b1680ae 409 */
bogdanm 86:04dd9b1680ae 410 #define __HAL_DMA2D_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->IFCR = (__FLAG__))
bogdanm 86:04dd9b1680ae 411
bogdanm 86:04dd9b1680ae 412 /**
bogdanm 86:04dd9b1680ae 413 * @brief Enables the specified DMA2D interrupts.
bogdanm 86:04dd9b1680ae 414 * @param __HANDLE__: DMA2D handle
bogdanm 86:04dd9b1680ae 415 * @param __INTERRUPT__: specifies the DMA2D interrupt sources to be enabled.
bogdanm 86:04dd9b1680ae 416 * This parameter can be any combination of the following values:
bogdanm 86:04dd9b1680ae 417 * @arg DMA2D_IT_CE: Configuration error interrupt mask
bogdanm 86:04dd9b1680ae 418 * @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
bogdanm 86:04dd9b1680ae 419 * @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
bogdanm 86:04dd9b1680ae 420 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
bogdanm 86:04dd9b1680ae 421 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
bogdanm 86:04dd9b1680ae 422 * @arg DMA2D_IT_TE: Transfer error interrupt mask
bogdanm 86:04dd9b1680ae 423 * @retval None
bogdanm 86:04dd9b1680ae 424 */
bogdanm 86:04dd9b1680ae 425 #define __HAL_DMA2D_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
bogdanm 86:04dd9b1680ae 426
bogdanm 86:04dd9b1680ae 427 /**
bogdanm 86:04dd9b1680ae 428 * @brief Disables the specified DMA2D interrupts.
bogdanm 86:04dd9b1680ae 429 * @param __HANDLE__: DMA2D handle
bogdanm 86:04dd9b1680ae 430 * @param __INTERRUPT__: specifies the DMA2D interrupt sources to be disabled.
bogdanm 86:04dd9b1680ae 431 * This parameter can be any combination of the following values:
bogdanm 86:04dd9b1680ae 432 * @arg DMA2D_IT_CE: Configuration error interrupt mask
bogdanm 86:04dd9b1680ae 433 * @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
bogdanm 86:04dd9b1680ae 434 * @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
bogdanm 86:04dd9b1680ae 435 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
bogdanm 86:04dd9b1680ae 436 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
bogdanm 86:04dd9b1680ae 437 * @arg DMA2D_IT_TE: Transfer error interrupt mask
bogdanm 86:04dd9b1680ae 438 * @retval None
bogdanm 86:04dd9b1680ae 439 */
bogdanm 86:04dd9b1680ae 440 #define __HAL_DMA2D_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
bogdanm 86:04dd9b1680ae 441
bogdanm 86:04dd9b1680ae 442 /**
bogdanm 86:04dd9b1680ae 443 * @brief Checks whether the specified DMA2D interrupt has occurred or not.
bogdanm 86:04dd9b1680ae 444 * @param __HANDLE__: DMA2D handle
bogdanm 86:04dd9b1680ae 445 * @param __INTERRUPT__: specifies the DMA2D interrupt source to check.
bogdanm 86:04dd9b1680ae 446 * This parameter can be one of the following values:
bogdanm 86:04dd9b1680ae 447 * @arg DMA2D_IT_CE: Configuration error interrupt mask
bogdanm 86:04dd9b1680ae 448 * @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
bogdanm 86:04dd9b1680ae 449 * @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
bogdanm 86:04dd9b1680ae 450 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
bogdanm 86:04dd9b1680ae 451 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
bogdanm 86:04dd9b1680ae 452 * @arg DMA2D_IT_TE: Transfer error interrupt mask
bogdanm 86:04dd9b1680ae 453 * @retval The state of INTERRUPT.
bogdanm 86:04dd9b1680ae 454 */
bogdanm 86:04dd9b1680ae 455 #define __HAL_DMA2D_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR & (__INTERRUPT__))
bogdanm 86:04dd9b1680ae 456
bogdanm 86:04dd9b1680ae 457 /* Exported functions --------------------------------------------------------*/
bogdanm 86:04dd9b1680ae 458
bogdanm 86:04dd9b1680ae 459 /* Initialization and de-initialization functions *******************************/
bogdanm 86:04dd9b1680ae 460 HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d);
bogdanm 86:04dd9b1680ae 461 HAL_StatusTypeDef HAL_DMA2D_DeInit (DMA2D_HandleTypeDef *hdma2d);
bogdanm 86:04dd9b1680ae 462 void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d);
bogdanm 86:04dd9b1680ae 463 void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d);
bogdanm 86:04dd9b1680ae 464
bogdanm 86:04dd9b1680ae 465 /* IO operation functions *******************************************************/
bogdanm 86:04dd9b1680ae 466 HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Heigh);
bogdanm 86:04dd9b1680ae 467 HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Heigh);
bogdanm 86:04dd9b1680ae 468 HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Heigh);
bogdanm 86:04dd9b1680ae 469 HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Heigh);
bogdanm 86:04dd9b1680ae 470 HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d);
bogdanm 86:04dd9b1680ae 471 HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d);
bogdanm 86:04dd9b1680ae 472 HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d);
bogdanm 86:04dd9b1680ae 473 HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout);
bogdanm 86:04dd9b1680ae 474 void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d);
bogdanm 86:04dd9b1680ae 475
bogdanm 86:04dd9b1680ae 476 /* Peripheral Control functions *************************************************/
bogdanm 86:04dd9b1680ae 477 HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
bogdanm 86:04dd9b1680ae 478 HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
bogdanm 86:04dd9b1680ae 479 HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
bogdanm 86:04dd9b1680ae 480 HAL_StatusTypeDef HAL_DMA2D_DisableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
bogdanm 86:04dd9b1680ae 481 HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line);
bogdanm 86:04dd9b1680ae 482
bogdanm 86:04dd9b1680ae 483 /* Peripheral State functions ***************************************************/
bogdanm 86:04dd9b1680ae 484 HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d);
bogdanm 86:04dd9b1680ae 485 uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d);
bogdanm 86:04dd9b1680ae 486
bogdanm 86:04dd9b1680ae 487 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
bogdanm 86:04dd9b1680ae 488
bogdanm 86:04dd9b1680ae 489 /**
bogdanm 86:04dd9b1680ae 490 * @}
bogdanm 86:04dd9b1680ae 491 */
bogdanm 86:04dd9b1680ae 492
bogdanm 86:04dd9b1680ae 493 /**
bogdanm 86:04dd9b1680ae 494 * @}
bogdanm 86:04dd9b1680ae 495 */
bogdanm 86:04dd9b1680ae 496
bogdanm 86:04dd9b1680ae 497 #ifdef __cplusplus
bogdanm 86:04dd9b1680ae 498 }
bogdanm 86:04dd9b1680ae 499 #endif
bogdanm 86:04dd9b1680ae 500
bogdanm 86:04dd9b1680ae 501 #endif /* __STM32F4xx_HAL_DMA2D_H */
bogdanm 86:04dd9b1680ae 502
bogdanm 86:04dd9b1680ae 503
bogdanm 86:04dd9b1680ae 504 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/