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TARGET_NUCLEO_F103RB/stm32f1xx_hal_nand.h@98:01a414ca7d6d, 2015-04-08 (annotated)

Committer:
yusuke_kyo
Date:
Wed Apr 08 08:04:18 2015 +0000
Revision:
98:01a414ca7d6d
Parent:
96:487b796308b0 
remove SerialHalfDuplex.h

Who changed what in which revision?

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Kojto 96:487b796308b0 1 /**
Kojto 96:487b796308b0 2 ******************************************************************************
Kojto 96:487b796308b0 3 * @file stm32f1xx_hal_nand.h
Kojto 96:487b796308b0 4 * @author MCD Application Team
Kojto 96:487b796308b0 5 * @version V1.0.0
Kojto 96:487b796308b0 6 * @date 15-December-2014
Kojto 96:487b796308b0 7 * @brief Header file of NAND HAL module.
Kojto 96:487b796308b0 8 ******************************************************************************
Kojto 96:487b796308b0 9 * @attention
Kojto 96:487b796308b0 10 *
Kojto 96:487b796308b0 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
Kojto 96:487b796308b0 12 *
Kojto 96:487b796308b0 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 96:487b796308b0 14 * are permitted provided that the following conditions are met:
Kojto 96:487b796308b0 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 96:487b796308b0 16 * this list of conditions and the following disclaimer.
Kojto 96:487b796308b0 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 96:487b796308b0 18 * this list of conditions and the following disclaimer in the documentation
Kojto 96:487b796308b0 19 * and/or other materials provided with the distribution.
Kojto 96:487b796308b0 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 96:487b796308b0 21 * may be used to endorse or promote products derived from this software
Kojto 96:487b796308b0 22 * without specific prior written permission.
Kojto 96:487b796308b0 23 *
Kojto 96:487b796308b0 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 96:487b796308b0 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 96:487b796308b0 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 96:487b796308b0 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 96:487b796308b0 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 96:487b796308b0 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 96:487b796308b0 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 96:487b796308b0 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 96:487b796308b0 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 96:487b796308b0 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 96:487b796308b0 34 *
Kojto 96:487b796308b0 35 ******************************************************************************
Kojto 96:487b796308b0 36 */
Kojto 96:487b796308b0 37
Kojto 96:487b796308b0 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 96:487b796308b0 39 #ifndef __STM32F1xx_HAL_NAND_H
Kojto 96:487b796308b0 40 #define __STM32F1xx_HAL_NAND_H
Kojto 96:487b796308b0 41
Kojto 96:487b796308b0 42 #ifdef __cplusplus
Kojto 96:487b796308b0 43 extern "C" {
Kojto 96:487b796308b0 44 #endif
Kojto 96:487b796308b0 45
Kojto 96:487b796308b0 46 /* Includes ------------------------------------------------------------------*/
Kojto 96:487b796308b0 47 #include "stm32f1xx_ll_fsmc.h"
Kojto 96:487b796308b0 48
Kojto 96:487b796308b0 49 /** @addtogroup STM32F1xx_HAL_Driver
Kojto 96:487b796308b0 50 * @{
Kojto 96:487b796308b0 51 */
Kojto 96:487b796308b0 52
Kojto 96:487b796308b0 53 #if defined (STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG)
Kojto 96:487b796308b0 54 /** @addtogroup NAND
Kojto 96:487b796308b0 55 * @{
Kojto 96:487b796308b0 56 */
Kojto 96:487b796308b0 57
Kojto 96:487b796308b0 58 /** @addtogroup NAND_Private_Constants
Kojto 96:487b796308b0 59 * @{
Kojto 96:487b796308b0 60 */
Kojto 96:487b796308b0 61
Kojto 96:487b796308b0 62 #define NAND_DEVICE1 FSMC_BANK2
Kojto 96:487b796308b0 63 #define NAND_DEVICE2 FSMC_BANK3
Kojto 96:487b796308b0 64 #define NAND_WRITE_TIMEOUT ((uint32_t)1000)
Kojto 96:487b796308b0 65
Kojto 96:487b796308b0 66 #define CMD_AREA ((uint32_t)(1<<16)) /* A16 = CLE high */
Kojto 96:487b796308b0 67 #define ADDR_AREA ((uint32_t)(1<<17)) /* A17 = ALE high */
Kojto 96:487b796308b0 68
Kojto 96:487b796308b0 69 #define NAND_CMD_AREA_A ((uint8_t)0x00)
Kojto 96:487b796308b0 70 #define NAND_CMD_AREA_B ((uint8_t)0x01)
Kojto 96:487b796308b0 71 #define NAND_CMD_AREA_C ((uint8_t)0x50)
Kojto 96:487b796308b0 72 #define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30)
Kojto 96:487b796308b0 73
Kojto 96:487b796308b0 74 #define NAND_CMD_WRITE0 ((uint8_t)0x80)
Kojto 96:487b796308b0 75 #define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10)
Kojto 96:487b796308b0 76 #define NAND_CMD_ERASE0 ((uint8_t)0x60)
Kojto 96:487b796308b0 77 #define NAND_CMD_ERASE1 ((uint8_t)0xD0)
Kojto 96:487b796308b0 78 #define NAND_CMD_READID ((uint8_t)0x90)
Kojto 96:487b796308b0 79 #define NAND_CMD_STATUS ((uint8_t)0x70)
Kojto 96:487b796308b0 80 #define NAND_CMD_LOCK_STATUS ((uint8_t)0x7A)
Kojto 96:487b796308b0 81 #define NAND_CMD_RESET ((uint8_t)0xFF)
Kojto 96:487b796308b0 82
Kojto 96:487b796308b0 83 /* NAND memory status */
Kojto 96:487b796308b0 84 #define NAND_VALID_ADDRESS ((uint32_t)0x00000100)
Kojto 96:487b796308b0 85 #define NAND_INVALID_ADDRESS ((uint32_t)0x00000200)
Kojto 96:487b796308b0 86 #define NAND_TIMEOUT_ERROR ((uint32_t)0x00000400)
Kojto 96:487b796308b0 87 #define NAND_BUSY ((uint32_t)0x00000000)
Kojto 96:487b796308b0 88 #define NAND_ERROR ((uint32_t)0x00000001)
Kojto 96:487b796308b0 89 #define NAND_READY ((uint32_t)0x00000040)
Kojto 96:487b796308b0 90
Kojto 96:487b796308b0 91 /**
Kojto 96:487b796308b0 92 * @}
Kojto 96:487b796308b0 93 */
Kojto 96:487b796308b0 94
Kojto 96:487b796308b0 95 /** @addtogroup NAND_Private_Macros
Kojto 96:487b796308b0 96 * @{
Kojto 96:487b796308b0 97 */
Kojto 96:487b796308b0 98
Kojto 96:487b796308b0 99 /**
Kojto 96:487b796308b0 100 * @brief NAND memory address computation.
Kojto 96:487b796308b0 101 * @param __ADDRESS__: NAND memory address.
Kojto 96:487b796308b0 102 * @param __HANDLE__ : NAND handle.
Kojto 96:487b796308b0 103 * @retval NAND Raw address value
Kojto 96:487b796308b0 104 */
Kojto 96:487b796308b0 105 #define __ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) (((__ADDRESS__)->Page) + \
Kojto 96:487b796308b0 106 (((__ADDRESS__)->Block + (((__ADDRESS__)->Zone) * ((__HANDLE__)->Info.ZoneSize)))* ((__HANDLE__)->Info.BlockSize * ((__HANDLE__)->Info.PageSize + (__HANDLE__)->Info.SpareAreaSize))))
Kojto 96:487b796308b0 107
Kojto 96:487b796308b0 108 /**
Kojto 96:487b796308b0 109 * @brief NAND memory address cycling.
Kojto 96:487b796308b0 110 * @param __ADDRESS__: NAND memory address.
Kojto 96:487b796308b0 111 * @retval NAND address cycling value.
Kojto 96:487b796308b0 112 */
Kojto 96:487b796308b0 113 #define __ADDR_1st_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st addressing cycle */
Kojto 96:487b796308b0 114 #define __ADDR_2nd_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd addressing cycle */
Kojto 96:487b796308b0 115 #define __ADDR_3rd_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 16) /* 3rd addressing cycle */
Kojto 96:487b796308b0 116 #define __ADDR_4th_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 24) /* 4th addressing cycle */
Kojto 96:487b796308b0 117
Kojto 96:487b796308b0 118 /**
Kojto 96:487b796308b0 119 * @}
Kojto 96:487b796308b0 120 */
Kojto 96:487b796308b0 121
Kojto 96:487b796308b0 122 /* Exported typedef ----------------------------------------------------------*/
Kojto 96:487b796308b0 123 /* Exported types ------------------------------------------------------------*/
Kojto 96:487b796308b0 124 /** @defgroup NAND_Exported_Types NAND Exported Types
Kojto 96:487b796308b0 125 * @{
Kojto 96:487b796308b0 126 */
Kojto 96:487b796308b0 127
Kojto 96:487b796308b0 128 /**
Kojto 96:487b796308b0 129 * @brief HAL NAND State structures definition
Kojto 96:487b796308b0 130 */
Kojto 96:487b796308b0 131 typedef enum
Kojto 96:487b796308b0 132 {
Kojto 96:487b796308b0 133 HAL_NAND_STATE_RESET = 0x00, /*!< NAND not yet initialized or disabled */
Kojto 96:487b796308b0 134 HAL_NAND_STATE_READY = 0x01, /*!< NAND initialized and ready for use */
Kojto 96:487b796308b0 135 HAL_NAND_STATE_BUSY = 0x02, /*!< NAND internal process is ongoing */
Kojto 96:487b796308b0 136 HAL_NAND_STATE_ERROR = 0x03 /*!< NAND error state */
Kojto 96:487b796308b0 137 }HAL_NAND_StateTypeDef;
Kojto 96:487b796308b0 138
Kojto 96:487b796308b0 139 /**
Kojto 96:487b796308b0 140 * @brief NAND Memory electronic signature Structure definition
Kojto 96:487b796308b0 141 */
Kojto 96:487b796308b0 142 typedef struct
Kojto 96:487b796308b0 143 {
Kojto 96:487b796308b0 144 /*<! NAND memory electronic signature maker and device IDs */
Kojto 96:487b796308b0 145
Kojto 96:487b796308b0 146 uint8_t Maker_Id;
Kojto 96:487b796308b0 147
Kojto 96:487b796308b0 148 uint8_t Device_Id;
Kojto 96:487b796308b0 149
Kojto 96:487b796308b0 150 uint8_t Third_Id;
Kojto 96:487b796308b0 151
Kojto 96:487b796308b0 152 uint8_t Fourth_Id;
Kojto 96:487b796308b0 153 }NAND_IDTypeDef;
Kojto 96:487b796308b0 154
Kojto 96:487b796308b0 155 /**
Kojto 96:487b796308b0 156 * @brief NAND Memory address Structure definition
Kojto 96:487b796308b0 157 */
Kojto 96:487b796308b0 158 typedef struct
Kojto 96:487b796308b0 159 {
Kojto 96:487b796308b0 160 uint16_t Page; /*!< NAND memory Page address */
Kojto 96:487b796308b0 161
Kojto 96:487b796308b0 162 uint16_t Zone; /*!< NAND memory Zone address */
Kojto 96:487b796308b0 163
Kojto 96:487b796308b0 164 uint16_t Block; /*!< NAND memory Block address */
Kojto 96:487b796308b0 165
Kojto 96:487b796308b0 166 }NAND_AddressTypeDef;
Kojto 96:487b796308b0 167
Kojto 96:487b796308b0 168 /**
Kojto 96:487b796308b0 169 * @brief NAND Memory info Structure definition
Kojto 96:487b796308b0 170 */
Kojto 96:487b796308b0 171 typedef struct
Kojto 96:487b796308b0 172 {
Kojto 96:487b796308b0 173 uint32_t PageSize; /*!< NAND memory page (without spare area) size measured in K. bytes */
Kojto 96:487b796308b0 174
Kojto 96:487b796308b0 175 uint32_t SpareAreaSize; /*!< NAND memory spare area size measured in K. bytes */
Kojto 96:487b796308b0 176
Kojto 96:487b796308b0 177 uint32_t BlockSize; /*!< NAND memory block size number of pages */
Kojto 96:487b796308b0 178
Kojto 96:487b796308b0 179 uint32_t BlockNbr; /*!< NAND memory number of blocks */
Kojto 96:487b796308b0 180
Kojto 96:487b796308b0 181 uint32_t ZoneSize; /*!< NAND memory zone size measured in number of blocks */
Kojto 96:487b796308b0 182 }NAND_InfoTypeDef;
Kojto 96:487b796308b0 183
Kojto 96:487b796308b0 184 /**
Kojto 96:487b796308b0 185 * @brief NAND handle Structure definition
Kojto 96:487b796308b0 186 */
Kojto 96:487b796308b0 187 typedef struct
Kojto 96:487b796308b0 188 {
Kojto 96:487b796308b0 189 FSMC_NAND_TypeDef *Instance; /*!< Register base address */
Kojto 96:487b796308b0 190
Kojto 96:487b796308b0 191 FSMC_NAND_InitTypeDef Init; /*!< NAND device control configuration parameters */
Kojto 96:487b796308b0 192
Kojto 96:487b796308b0 193 HAL_LockTypeDef Lock; /*!< NAND locking object */
Kojto 96:487b796308b0 194
Kojto 96:487b796308b0 195 __IO HAL_NAND_StateTypeDef State; /*!< NAND device access state */
Kojto 96:487b796308b0 196
Kojto 96:487b796308b0 197 NAND_InfoTypeDef Info; /*!< NAND characteristic information structure */
Kojto 96:487b796308b0 198 }NAND_HandleTypeDef;
Kojto 96:487b796308b0 199
Kojto 96:487b796308b0 200 /**
Kojto 96:487b796308b0 201 * @}
Kojto 96:487b796308b0 202 */
Kojto 96:487b796308b0 203
Kojto 96:487b796308b0 204 /* Exported constants --------------------------------------------------------*/
Kojto 96:487b796308b0 205 /* Exported macro ------------------------------------------------------------*/
Kojto 96:487b796308b0 206 /** @defgroup NAND_Exported_Macros NAND Exported Macros
Kojto 96:487b796308b0 207 * @{
Kojto 96:487b796308b0 208 */
Kojto 96:487b796308b0 209
Kojto 96:487b796308b0 210 /** @brief Reset NAND handle state
Kojto 96:487b796308b0 211 * @param __HANDLE__: specifies the NAND handle.
Kojto 96:487b796308b0 212 * @retval None
Kojto 96:487b796308b0 213 */
Kojto 96:487b796308b0 214 #define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET)
Kojto 96:487b796308b0 215
Kojto 96:487b796308b0 216 /**
Kojto 96:487b796308b0 217 * @}
Kojto 96:487b796308b0 218 */
Kojto 96:487b796308b0 219
Kojto 96:487b796308b0 220 /* Exported functions --------------------------------------------------------*/
Kojto 96:487b796308b0 221 /** @addtogroup NAND_Exported_Functions NAND Exported Functions
Kojto 96:487b796308b0 222 * @{
Kojto 96:487b796308b0 223 */
Kojto 96:487b796308b0 224
Kojto 96:487b796308b0 225 /** @addtogroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions
Kojto 96:487b796308b0 226 * @{
Kojto 96:487b796308b0 227 */
Kojto 96:487b796308b0 228
Kojto 96:487b796308b0 229 /* Initialization/de-initialization functions ********************************/
Kojto 96:487b796308b0 230 HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FSMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FSMC_NAND_PCC_TimingTypeDef *AttSpace_Timing);
Kojto 96:487b796308b0 231 HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand);
Kojto 96:487b796308b0 232 void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand);
Kojto 96:487b796308b0 233 void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand);
Kojto 96:487b796308b0 234 void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand);
Kojto 96:487b796308b0 235 void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand);
Kojto 96:487b796308b0 236
Kojto 96:487b796308b0 237 /**
Kojto 96:487b796308b0 238 * @}
Kojto 96:487b796308b0 239 */
Kojto 96:487b796308b0 240
Kojto 96:487b796308b0 241 /** @addtogroup NAND_Exported_Functions_Group2 Input and Output functions
Kojto 96:487b796308b0 242 * @{
Kojto 96:487b796308b0 243 */
Kojto 96:487b796308b0 244
Kojto 96:487b796308b0 245 /* IO operation functions ****************************************************/
Kojto 96:487b796308b0 246 HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID);
Kojto 96:487b796308b0 247 HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand);
Kojto 96:487b796308b0 248 HAL_StatusTypeDef HAL_NAND_Read_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead);
Kojto 96:487b796308b0 249 HAL_StatusTypeDef HAL_NAND_Write_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite);
Kojto 96:487b796308b0 250 HAL_StatusTypeDef HAL_NAND_Read_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead);
Kojto 96:487b796308b0 251 HAL_StatusTypeDef HAL_NAND_Write_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite);
Kojto 96:487b796308b0 252 HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
Kojto 96:487b796308b0 253 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
Kojto 96:487b796308b0 254 uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
Kojto 96:487b796308b0 255
Kojto 96:487b796308b0 256 /**
Kojto 96:487b796308b0 257 * @}
Kojto 96:487b796308b0 258 */
Kojto 96:487b796308b0 259
Kojto 96:487b796308b0 260 /** @addtogroup NAND_Exported_Functions_Group3 Peripheral Control functions
Kojto 96:487b796308b0 261 * @{
Kojto 96:487b796308b0 262 */
Kojto 96:487b796308b0 263
Kojto 96:487b796308b0 264 /* NAND Control functions ****************************************************/
Kojto 96:487b796308b0 265 HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand);
Kojto 96:487b796308b0 266 HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand);
Kojto 96:487b796308b0 267 HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout);
Kojto 96:487b796308b0 268
Kojto 96:487b796308b0 269 /**
Kojto 96:487b796308b0 270 * @}
Kojto 96:487b796308b0 271 */
Kojto 96:487b796308b0 272
Kojto 96:487b796308b0 273 /** @defgroup NAND_Exported_Functions_Group4 Peripheral State functions
Kojto 96:487b796308b0 274 * @{
Kojto 96:487b796308b0 275 */
Kojto 96:487b796308b0 276
Kojto 96:487b796308b0 277 /* NAND State functions *******************************************************/
Kojto 96:487b796308b0 278 HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
Kojto 96:487b796308b0 279 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
Kojto 96:487b796308b0 280
Kojto 96:487b796308b0 281 /**
Kojto 96:487b796308b0 282 * @}
Kojto 96:487b796308b0 283 */
Kojto 96:487b796308b0 284
Kojto 96:487b796308b0 285 /**
Kojto 96:487b796308b0 286 * @}
Kojto 96:487b796308b0 287 */
Kojto 96:487b796308b0 288
Kojto 96:487b796308b0 289 /**
Kojto 96:487b796308b0 290 * @}
Kojto 96:487b796308b0 291 */
Kojto 96:487b796308b0 292 #endif /* STM32F101xE || STM32F103xE || STM32F101xG || STM32F103xG */
Kojto 96:487b796308b0 293
Kojto 96:487b796308b0 294 /**
Kojto 96:487b796308b0 295 * @}
Kojto 96:487b796308b0 296 */
Kojto 96:487b796308b0 297
Kojto 96:487b796308b0 298 #ifdef __cplusplus
Kojto 96:487b796308b0 299 }
Kojto 96:487b796308b0 300 #endif
Kojto 96:487b796308b0 301
Kojto 96:487b796308b0 302 #endif /* __STM32F1xx_HAL_NAND_H */
Kojto 96:487b796308b0 303
Kojto 96:487b796308b0 304 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/