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TARGET_NUCLEO_F103RB/stm32f1xx_hal_dma.h@98:01a414ca7d6d, 2015-04-08 (annotated)

Committer:
yusuke_kyo
Date:
Wed Apr 08 08:04:18 2015 +0000
Revision:
98:01a414ca7d6d
Parent:
96:487b796308b0 
remove SerialHalfDuplex.h

Who changed what in which revision?

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Kojto 96:487b796308b0 1 /**
Kojto 96:487b796308b0 2 ******************************************************************************
Kojto 96:487b796308b0 3 * @file stm32f1xx_hal_dma.h
Kojto 96:487b796308b0 4 * @author MCD Application Team
Kojto 96:487b796308b0 5 * @version V1.0.0
Kojto 96:487b796308b0 6 * @date 15-December-2014
Kojto 96:487b796308b0 7 * @brief Header file of DMA HAL module.
Kojto 96:487b796308b0 8 ******************************************************************************
Kojto 96:487b796308b0 9 * @attention
Kojto 96:487b796308b0 10 *
Kojto 96:487b796308b0 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
Kojto 96:487b796308b0 12 *
Kojto 96:487b796308b0 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 96:487b796308b0 14 * are permitted provided that the following conditions are met:
Kojto 96:487b796308b0 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 96:487b796308b0 16 * this list of conditions and the following disclaimer.
Kojto 96:487b796308b0 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 96:487b796308b0 18 * this list of conditions and the following disclaimer in the documentation
Kojto 96:487b796308b0 19 * and/or other materials provided with the distribution.
Kojto 96:487b796308b0 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 96:487b796308b0 21 * may be used to endorse or promote products derived from this software
Kojto 96:487b796308b0 22 * without specific prior written permission.
Kojto 96:487b796308b0 23 *
Kojto 96:487b796308b0 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 96:487b796308b0 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 96:487b796308b0 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 96:487b796308b0 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 96:487b796308b0 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 96:487b796308b0 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 96:487b796308b0 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 96:487b796308b0 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 96:487b796308b0 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 96:487b796308b0 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 96:487b796308b0 34 *
Kojto 96:487b796308b0 35 ******************************************************************************
Kojto 96:487b796308b0 36 */
Kojto 96:487b796308b0 37
Kojto 96:487b796308b0 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 96:487b796308b0 39 #ifndef __STM32F1xx_HAL_DMA_H
Kojto 96:487b796308b0 40 #define __STM32F1xx_HAL_DMA_H
Kojto 96:487b796308b0 41
Kojto 96:487b796308b0 42 #ifdef __cplusplus
Kojto 96:487b796308b0 43 extern "C" {
Kojto 96:487b796308b0 44 #endif
Kojto 96:487b796308b0 45
Kojto 96:487b796308b0 46 /* Includes ------------------------------------------------------------------*/
Kojto 96:487b796308b0 47 #include "stm32f1xx_hal_def.h"
Kojto 96:487b796308b0 48
Kojto 96:487b796308b0 49 /** @addtogroup STM32F1xx_HAL_Driver
Kojto 96:487b796308b0 50 * @{
Kojto 96:487b796308b0 51 */
Kojto 96:487b796308b0 52
Kojto 96:487b796308b0 53 /** @addtogroup DMA
Kojto 96:487b796308b0 54 * @{
Kojto 96:487b796308b0 55 */
Kojto 96:487b796308b0 56
Kojto 96:487b796308b0 57 /* Exported types ------------------------------------------------------------*/
Kojto 96:487b796308b0 58 /** @defgroup DMA_Exported_Types DMA Exported Types
Kojto 96:487b796308b0 59 * @{
Kojto 96:487b796308b0 60 */
Kojto 96:487b796308b0 61
Kojto 96:487b796308b0 62 /**
Kojto 96:487b796308b0 63 * @brief DMA Configuration Structure definition
Kojto 96:487b796308b0 64 */
Kojto 96:487b796308b0 65 typedef struct
Kojto 96:487b796308b0 66 {
Kojto 96:487b796308b0 67 uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral,
Kojto 96:487b796308b0 68 from memory to memory or from peripheral to memory.
Kojto 96:487b796308b0 69 This parameter can be a value of @ref DMA_Data_transfer_direction */
Kojto 96:487b796308b0 70
Kojto 96:487b796308b0 71 uint32_t PeriphInc; /*!< Specifies whether the Peripheral address register should be incremented or not.
Kojto 96:487b796308b0 72 This parameter can be a value of @ref DMA_Peripheral_incremented_mode */
Kojto 96:487b796308b0 73
Kojto 96:487b796308b0 74 uint32_t MemInc; /*!< Specifies whether the memory address register should be incremented or not.
Kojto 96:487b796308b0 75 This parameter can be a value of @ref DMA_Memory_incremented_mode */
Kojto 96:487b796308b0 76
Kojto 96:487b796308b0 77 uint32_t PeriphDataAlignment; /*!< Specifies the Peripheral data width.
Kojto 96:487b796308b0 78 This parameter can be a value of @ref DMA_Peripheral_data_size */
Kojto 96:487b796308b0 79
Kojto 96:487b796308b0 80 uint32_t MemDataAlignment; /*!< Specifies the Memory data width.
Kojto 96:487b796308b0 81 This parameter can be a value of @ref DMA_Memory_data_size */
Kojto 96:487b796308b0 82
Kojto 96:487b796308b0 83 uint32_t Mode; /*!< Specifies the operation mode of the DMAy Channelx.
Kojto 96:487b796308b0 84 This parameter can be a value of @ref DMA_mode
Kojto 96:487b796308b0 85 @note The circular buffer mode cannot be used if the memory-to-memory
Kojto 96:487b796308b0 86 data transfer is configured on the selected Channel */
Kojto 96:487b796308b0 87
Kojto 96:487b796308b0 88 uint32_t Priority; /*!< Specifies the software priority for the DMAy Channelx.
Kojto 96:487b796308b0 89 This parameter can be a value of @ref DMA_Priority_level */
Kojto 96:487b796308b0 90
Kojto 96:487b796308b0 91 } DMA_InitTypeDef;
Kojto 96:487b796308b0 92
Kojto 96:487b796308b0 93 /**
Kojto 96:487b796308b0 94 * @brief DMA Configuration enumeration values definition
Kojto 96:487b796308b0 95 */
Kojto 96:487b796308b0 96 typedef enum
Kojto 96:487b796308b0 97 {
Kojto 96:487b796308b0 98 DMA_MODE = 0, /*!< Control related DMA mode Parameter in DMA_InitTypeDef */
Kojto 96:487b796308b0 99 DMA_PRIORITY = 1, /*!< Control related priority level Parameter in DMA_InitTypeDef */
Kojto 96:487b796308b0 100
Kojto 96:487b796308b0 101 } DMA_ControlTypeDef;
Kojto 96:487b796308b0 102
Kojto 96:487b796308b0 103 /**
Kojto 96:487b796308b0 104 * @brief HAL DMA State structures definition
Kojto 96:487b796308b0 105 */
Kojto 96:487b796308b0 106 typedef enum
Kojto 96:487b796308b0 107 {
Kojto 96:487b796308b0 108 HAL_DMA_STATE_RESET = 0x00, /*!< DMA not yet initialized or disabled */
Kojto 96:487b796308b0 109 HAL_DMA_STATE_READY = 0x01, /*!< DMA process success and ready for use */
Kojto 96:487b796308b0 110 HAL_DMA_STATE_READY_HALF = 0x11, /*!< DMA Half process success */
Kojto 96:487b796308b0 111 HAL_DMA_STATE_BUSY = 0x02, /*!< DMA process is ongoing */
Kojto 96:487b796308b0 112 HAL_DMA_STATE_TIMEOUT = 0x03, /*!< DMA timeout state */
Kojto 96:487b796308b0 113 HAL_DMA_STATE_ERROR = 0x04, /*!< DMA error state */
Kojto 96:487b796308b0 114
Kojto 96:487b796308b0 115 }HAL_DMA_StateTypeDef;
Kojto 96:487b796308b0 116
Kojto 96:487b796308b0 117 /**
Kojto 96:487b796308b0 118 * @brief HAL DMA Error Code structure definition
Kojto 96:487b796308b0 119 */
Kojto 96:487b796308b0 120 typedef enum
Kojto 96:487b796308b0 121 {
Kojto 96:487b796308b0 122 HAL_DMA_FULL_TRANSFER = 0x00, /*!< Full transfer */
Kojto 96:487b796308b0 123 HAL_DMA_HALF_TRANSFER = 0x01, /*!< Half Transfer */
Kojto 96:487b796308b0 124
Kojto 96:487b796308b0 125 }HAL_DMA_LevelCompleteTypeDef;
Kojto 96:487b796308b0 126
Kojto 96:487b796308b0 127 /**
Kojto 96:487b796308b0 128 * @brief DMA handle Structure definition
Kojto 96:487b796308b0 129 */
Kojto 96:487b796308b0 130 typedef struct __DMA_HandleTypeDef
Kojto 96:487b796308b0 131 {
Kojto 96:487b796308b0 132 DMA_Channel_TypeDef *Instance; /*!< Register base address */
Kojto 96:487b796308b0 133
Kojto 96:487b796308b0 134 DMA_InitTypeDef Init; /*!< DMA communication parameters */
Kojto 96:487b796308b0 135
Kojto 96:487b796308b0 136 HAL_LockTypeDef Lock; /*!< DMA locking object */
Kojto 96:487b796308b0 137
Kojto 96:487b796308b0 138 HAL_DMA_StateTypeDef State; /*!< DMA transfer state */
Kojto 96:487b796308b0 139
Kojto 96:487b796308b0 140 void *Parent; /*!< Parent object state */
Kojto 96:487b796308b0 141
Kojto 96:487b796308b0 142 void (* XferCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */
Kojto 96:487b796308b0 143
Kojto 96:487b796308b0 144 void (* XferHalfCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */
Kojto 96:487b796308b0 145
Kojto 96:487b796308b0 146 void (* XferErrorCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */
Kojto 96:487b796308b0 147
Kojto 96:487b796308b0 148 __IO uint32_t ErrorCode; /*!< DMA Error code */
Kojto 96:487b796308b0 149
Kojto 96:487b796308b0 150 } DMA_HandleTypeDef;
Kojto 96:487b796308b0 151 /**
Kojto 96:487b796308b0 152 * @}
Kojto 96:487b796308b0 153 */
Kojto 96:487b796308b0 154
Kojto 96:487b796308b0 155 /* Exported constants --------------------------------------------------------*/
Kojto 96:487b796308b0 156 /** @defgroup DMA_Exported_Constants DMA Exported Constants
Kojto 96:487b796308b0 157 * @{
Kojto 96:487b796308b0 158 */
Kojto 96:487b796308b0 159
Kojto 96:487b796308b0 160 /** @defgroup DMA_Error_Codes DMA Error Codes
Kojto 96:487b796308b0 161 * @{
Kojto 96:487b796308b0 162 */
Kojto 96:487b796308b0 163 #define HAL_DMA_ERROR_NONE ((uint32_t)0x00) /*!< No error */
Kojto 96:487b796308b0 164 #define HAL_DMA_ERROR_TE ((uint32_t)0x01) /*!< Transfer error */
Kojto 96:487b796308b0 165 #define HAL_DMA_ERROR_TIMEOUT ((uint32_t)0x20) /*!< Timeout error */
Kojto 96:487b796308b0 166
Kojto 96:487b796308b0 167 /**
Kojto 96:487b796308b0 168 * @}
Kojto 96:487b796308b0 169 */
Kojto 96:487b796308b0 170
Kojto 96:487b796308b0 171
Kojto 96:487b796308b0 172
Kojto 96:487b796308b0 173 /** @defgroup DMA_Data_transfer_direction DMA Data transfer direction
Kojto 96:487b796308b0 174 * @{
Kojto 96:487b796308b0 175 */
Kojto 96:487b796308b0 176 #define DMA_PERIPH_TO_MEMORY ((uint32_t)0x00000000) /*!< Peripheral to memory direction */
Kojto 96:487b796308b0 177 #define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_CCR_DIR) /*!< Memory to peripheral direction */
Kojto 96:487b796308b0 178 #define DMA_MEMORY_TO_MEMORY ((uint32_t)(DMA_CCR_MEM2MEM)) /*!< Memory to memory direction */
Kojto 96:487b796308b0 179
Kojto 96:487b796308b0 180 #define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \
Kojto 96:487b796308b0 181 ((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \
Kojto 96:487b796308b0 182 ((DIRECTION) == DMA_MEMORY_TO_MEMORY))
Kojto 96:487b796308b0 183 /**
Kojto 96:487b796308b0 184 * @}
Kojto 96:487b796308b0 185 */
Kojto 96:487b796308b0 186
Kojto 96:487b796308b0 187 /** @defgroup DMA_Data_buffer_size DMA Data buffer size
Kojto 96:487b796308b0 188 * @{
Kojto 96:487b796308b0 189 */
Kojto 96:487b796308b0 190 #define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000))
Kojto 96:487b796308b0 191 /**
Kojto 96:487b796308b0 192 * @}
Kojto 96:487b796308b0 193 */
Kojto 96:487b796308b0 194
Kojto 96:487b796308b0 195 /** @defgroup DMA_Peripheral_incremented_mode DMA Peripheral incremented mode
Kojto 96:487b796308b0 196 * @{
Kojto 96:487b796308b0 197 */
Kojto 96:487b796308b0 198 #define DMA_PINC_ENABLE ((uint32_t)DMA_CCR_PINC) /*!< Peripheral increment mode Enable */
Kojto 96:487b796308b0 199 #define DMA_PINC_DISABLE ((uint32_t)0x00000000) /*!< Peripheral increment mode Disable */
Kojto 96:487b796308b0 200
Kojto 96:487b796308b0 201 #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \
Kojto 96:487b796308b0 202 ((STATE) == DMA_PINC_DISABLE))
Kojto 96:487b796308b0 203 /**
Kojto 96:487b796308b0 204 * @}
Kojto 96:487b796308b0 205 */
Kojto 96:487b796308b0 206
Kojto 96:487b796308b0 207 /** @defgroup DMA_Memory_incremented_mode DMA Memory incremented mode
Kojto 96:487b796308b0 208 * @{
Kojto 96:487b796308b0 209 */
Kojto 96:487b796308b0 210 #define DMA_MINC_ENABLE ((uint32_t)DMA_CCR_MINC) /*!< Memory increment mode Enable */
Kojto 96:487b796308b0 211 #define DMA_MINC_DISABLE ((uint32_t)0x00000000) /*!< Memory increment mode Disable */
Kojto 96:487b796308b0 212
Kojto 96:487b796308b0 213 #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \
Kojto 96:487b796308b0 214 ((STATE) == DMA_MINC_DISABLE))
Kojto 96:487b796308b0 215 /**
Kojto 96:487b796308b0 216 * @}
Kojto 96:487b796308b0 217 */
Kojto 96:487b796308b0 218
Kojto 96:487b796308b0 219 /** @defgroup DMA_Peripheral_data_size DMA Peripheral data size
Kojto 96:487b796308b0 220 * @{
Kojto 96:487b796308b0 221 */
Kojto 96:487b796308b0 222 #define DMA_PDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Peripheral data alignment : Byte */
Kojto 96:487b796308b0 223 #define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_PSIZE_0) /*!< Peripheral data alignment : HalfWord */
Kojto 96:487b796308b0 224 #define DMA_PDATAALIGN_WORD ((uint32_t)DMA_CCR_PSIZE_1) /*!< Peripheral data alignment : Word */
Kojto 96:487b796308b0 225
Kojto 96:487b796308b0 226 #define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE) || \
Kojto 96:487b796308b0 227 ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \
Kojto 96:487b796308b0 228 ((SIZE) == DMA_PDATAALIGN_WORD))
Kojto 96:487b796308b0 229 /**
Kojto 96:487b796308b0 230 * @}
Kojto 96:487b796308b0 231 */
Kojto 96:487b796308b0 232
Kojto 96:487b796308b0 233
Kojto 96:487b796308b0 234 /** @defgroup DMA_Memory_data_size DMA Memory data size
Kojto 96:487b796308b0 235 * @{
Kojto 96:487b796308b0 236 */
Kojto 96:487b796308b0 237 #define DMA_MDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Memory data alignment : Byte */
Kojto 96:487b796308b0 238 #define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_MSIZE_0) /*!< Memory data alignment : HalfWord */
Kojto 96:487b796308b0 239 #define DMA_MDATAALIGN_WORD ((uint32_t)DMA_CCR_MSIZE_1) /*!< Memory data alignment : Word */
Kojto 96:487b796308b0 240
Kojto 96:487b796308b0 241 #define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE) || \
Kojto 96:487b796308b0 242 ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \
Kojto 96:487b796308b0 243 ((SIZE) == DMA_MDATAALIGN_WORD ))
Kojto 96:487b796308b0 244 /**
Kojto 96:487b796308b0 245 * @}
Kojto 96:487b796308b0 246 */
Kojto 96:487b796308b0 247
Kojto 96:487b796308b0 248 /** @defgroup DMA_mode DMA mode
Kojto 96:487b796308b0 249 * @{
Kojto 96:487b796308b0 250 */
Kojto 96:487b796308b0 251 #define DMA_NORMAL ((uint32_t)0x00000000) /*!< Normal Mode */
Kojto 96:487b796308b0 252 #define DMA_CIRCULAR ((uint32_t)DMA_CCR_CIRC) /*!< Circular Mode */
Kojto 96:487b796308b0 253
Kojto 96:487b796308b0 254 #define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \
Kojto 96:487b796308b0 255 ((MODE) == DMA_CIRCULAR))
Kojto 96:487b796308b0 256 /**
Kojto 96:487b796308b0 257 * @}
Kojto 96:487b796308b0 258 */
Kojto 96:487b796308b0 259
Kojto 96:487b796308b0 260 /** @defgroup DMA_Priority_level DMA Priority level
Kojto 96:487b796308b0 261 * @{
Kojto 96:487b796308b0 262 */
Kojto 96:487b796308b0 263 #define DMA_PRIORITY_LOW ((uint32_t)0x00000000) /*!< Priority level : Low */
Kojto 96:487b796308b0 264 #define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_CCR_PL_0) /*!< Priority level : Medium */
Kojto 96:487b796308b0 265 #define DMA_PRIORITY_HIGH ((uint32_t)DMA_CCR_PL_1) /*!< Priority level : High */
Kojto 96:487b796308b0 266 #define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_CCR_PL) /*!< Priority level : Very_High */
Kojto 96:487b796308b0 267
Kojto 96:487b796308b0 268 #define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \
Kojto 96:487b796308b0 269 ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \
Kojto 96:487b796308b0 270 ((PRIORITY) == DMA_PRIORITY_HIGH) || \
Kojto 96:487b796308b0 271 ((PRIORITY) == DMA_PRIORITY_VERY_HIGH))
Kojto 96:487b796308b0 272 /**
Kojto 96:487b796308b0 273 * @}
Kojto 96:487b796308b0 274 */
Kojto 96:487b796308b0 275
Kojto 96:487b796308b0 276
Kojto 96:487b796308b0 277 /** @defgroup DMA_interrupt_enable_definitions DMA interrupt enable definitions
Kojto 96:487b796308b0 278 * @{
Kojto 96:487b796308b0 279 */
Kojto 96:487b796308b0 280
Kojto 96:487b796308b0 281 #define DMA_IT_TC ((uint32_t)DMA_CCR_TCIE)
Kojto 96:487b796308b0 282 #define DMA_IT_HT ((uint32_t)DMA_CCR_HTIE)
Kojto 96:487b796308b0 283 #define DMA_IT_TE ((uint32_t)DMA_CCR_TEIE)
Kojto 96:487b796308b0 284
Kojto 96:487b796308b0 285 /**
Kojto 96:487b796308b0 286 * @}
Kojto 96:487b796308b0 287 */
Kojto 96:487b796308b0 288
Kojto 96:487b796308b0 289 /** @defgroup DMA_flag_definitions DMA flag definitions
Kojto 96:487b796308b0 290 * @{
Kojto 96:487b796308b0 291 */
Kojto 96:487b796308b0 292
Kojto 96:487b796308b0 293 #define DMA_FLAG_GL1 ((uint32_t)0x00000001)
Kojto 96:487b796308b0 294 #define DMA_FLAG_TC1 ((uint32_t)0x00000002)
Kojto 96:487b796308b0 295 #define DMA_FLAG_HT1 ((uint32_t)0x00000004)
Kojto 96:487b796308b0 296 #define DMA_FLAG_TE1 ((uint32_t)0x00000008)
Kojto 96:487b796308b0 297 #define DMA_FLAG_GL2 ((uint32_t)0x00000010)
Kojto 96:487b796308b0 298 #define DMA_FLAG_TC2 ((uint32_t)0x00000020)
Kojto 96:487b796308b0 299 #define DMA_FLAG_HT2 ((uint32_t)0x00000040)
Kojto 96:487b796308b0 300 #define DMA_FLAG_TE2 ((uint32_t)0x00000080)
Kojto 96:487b796308b0 301 #define DMA_FLAG_GL3 ((uint32_t)0x00000100)
Kojto 96:487b796308b0 302 #define DMA_FLAG_TC3 ((uint32_t)0x00000200)
Kojto 96:487b796308b0 303 #define DMA_FLAG_HT3 ((uint32_t)0x00000400)
Kojto 96:487b796308b0 304 #define DMA_FLAG_TE3 ((uint32_t)0x00000800)
Kojto 96:487b796308b0 305 #define DMA_FLAG_GL4 ((uint32_t)0x00001000)
Kojto 96:487b796308b0 306 #define DMA_FLAG_TC4 ((uint32_t)0x00002000)
Kojto 96:487b796308b0 307 #define DMA_FLAG_HT4 ((uint32_t)0x00004000)
Kojto 96:487b796308b0 308 #define DMA_FLAG_TE4 ((uint32_t)0x00008000)
Kojto 96:487b796308b0 309 #define DMA_FLAG_GL5 ((uint32_t)0x00010000)
Kojto 96:487b796308b0 310 #define DMA_FLAG_TC5 ((uint32_t)0x00020000)
Kojto 96:487b796308b0 311 #define DMA_FLAG_HT5 ((uint32_t)0x00040000)
Kojto 96:487b796308b0 312 #define DMA_FLAG_TE5 ((uint32_t)0x00080000)
Kojto 96:487b796308b0 313 #define DMA_FLAG_GL6 ((uint32_t)0x00100000)
Kojto 96:487b796308b0 314 #define DMA_FLAG_TC6 ((uint32_t)0x00200000)
Kojto 96:487b796308b0 315 #define DMA_FLAG_HT6 ((uint32_t)0x00400000)
Kojto 96:487b796308b0 316 #define DMA_FLAG_TE6 ((uint32_t)0x00800000)
Kojto 96:487b796308b0 317 #define DMA_FLAG_GL7 ((uint32_t)0x01000000)
Kojto 96:487b796308b0 318 #define DMA_FLAG_TC7 ((uint32_t)0x02000000)
Kojto 96:487b796308b0 319 #define DMA_FLAG_HT7 ((uint32_t)0x04000000)
Kojto 96:487b796308b0 320 #define DMA_FLAG_TE7 ((uint32_t)0x08000000)
Kojto 96:487b796308b0 321
Kojto 96:487b796308b0 322
Kojto 96:487b796308b0 323 /**
Kojto 96:487b796308b0 324 * @}
Kojto 96:487b796308b0 325 */
Kojto 96:487b796308b0 326
Kojto 96:487b796308b0 327 /**
Kojto 96:487b796308b0 328 * @}
Kojto 96:487b796308b0 329 */
Kojto 96:487b796308b0 330
Kojto 96:487b796308b0 331 /* Exported macros -----------------------------------------------------------*/
Kojto 96:487b796308b0 332 /** @defgroup DMA_Exported_Macros DMA Exported Macros
Kojto 96:487b796308b0 333 * @{
Kojto 96:487b796308b0 334 */
Kojto 96:487b796308b0 335
Kojto 96:487b796308b0 336 /** @brief Reset DMA handle state
Kojto 96:487b796308b0 337 * @param __HANDLE__: DMA handle.
Kojto 96:487b796308b0 338 * @retval None
Kojto 96:487b796308b0 339 */
Kojto 96:487b796308b0 340 #define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
Kojto 96:487b796308b0 341
Kojto 96:487b796308b0 342 /**
Kojto 96:487b796308b0 343 * @brief Enable the specified DMA Channel.
Kojto 96:487b796308b0 344 * @param __HANDLE__: DMA handle
Kojto 96:487b796308b0 345 * @retval None.
Kojto 96:487b796308b0 346 */
Kojto 96:487b796308b0 347 #define __HAL_DMA_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CCR, DMA_CCR_EN))
Kojto 96:487b796308b0 348
Kojto 96:487b796308b0 349 /**
Kojto 96:487b796308b0 350 * @brief Disable the specified DMA Channel.
Kojto 96:487b796308b0 351 * @param __HANDLE__: DMA handle
Kojto 96:487b796308b0 352 * @retval None.
Kojto 96:487b796308b0 353 */
Kojto 96:487b796308b0 354 #define __HAL_DMA_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CCR, DMA_CCR_EN))
Kojto 96:487b796308b0 355
Kojto 96:487b796308b0 356
Kojto 96:487b796308b0 357 /* Interrupt & Flag management */
Kojto 96:487b796308b0 358
Kojto 96:487b796308b0 359 /**
Kojto 96:487b796308b0 360 * @brief Enables the specified DMA Channel interrupts.
Kojto 96:487b796308b0 361 * @param __HANDLE__: DMA handle
Kojto 96:487b796308b0 362 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
Kojto 96:487b796308b0 363 * This parameter can be any combination of the following values:
Kojto 96:487b796308b0 364 * @arg DMA_IT_TC: Transfer complete interrupt mask
Kojto 96:487b796308b0 365 * @arg DMA_IT_HT: Half transfer complete interrupt mask
Kojto 96:487b796308b0 366 * @arg DMA_IT_TE: Transfer error interrupt mask
Kojto 96:487b796308b0 367 * @retval None
Kojto 96:487b796308b0 368 */
Kojto 96:487b796308b0 369 #define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CCR, (__INTERRUPT__)))
Kojto 96:487b796308b0 370
Kojto 96:487b796308b0 371 /**
Kojto 96:487b796308b0 372 * @brief Disables the specified DMA Channel interrupts.
Kojto 96:487b796308b0 373 * @param __HANDLE__: DMA handle
Kojto 96:487b796308b0 374 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
Kojto 96:487b796308b0 375 * This parameter can be any combination of the following values:
Kojto 96:487b796308b0 376 * @arg DMA_IT_TC: Transfer complete interrupt mask
Kojto 96:487b796308b0 377 * @arg DMA_IT_HT: Half transfer complete interrupt mask
Kojto 96:487b796308b0 378 * @arg DMA_IT_TE: Transfer error interrupt mask
Kojto 96:487b796308b0 379 * @retval None
Kojto 96:487b796308b0 380 */
Kojto 96:487b796308b0 381 #define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CCR , (__INTERRUPT__)))
Kojto 96:487b796308b0 382
Kojto 96:487b796308b0 383 /**
Kojto 96:487b796308b0 384 * @brief Checks whether the specified DMA Channel interrupt has occurred or not.
Kojto 96:487b796308b0 385 * @param __HANDLE__: DMA handle
Kojto 96:487b796308b0 386 * @param __INTERRUPT__: specifies the DMA interrupt source to check.
Kojto 96:487b796308b0 387 * This parameter can be one of the following values:
Kojto 96:487b796308b0 388 * @arg DMA_IT_TC: Transfer complete interrupt mask
Kojto 96:487b796308b0 389 * @arg DMA_IT_HT: Half transfer complete interrupt mask
Kojto 96:487b796308b0 390 * @arg DMA_IT_TE: Transfer error interrupt mask
Kojto 96:487b796308b0 391 * @retval The state of DMA_IT (SET or RESET).
Kojto 96:487b796308b0 392 */
Kojto 96:487b796308b0 393 #define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CCR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
Kojto 96:487b796308b0 394
Kojto 96:487b796308b0 395 /**
Kojto 96:487b796308b0 396 * @}
Kojto 96:487b796308b0 397 */
Kojto 96:487b796308b0 398
Kojto 96:487b796308b0 399 /* Include DMA HAL Extension module */
Kojto 96:487b796308b0 400 #include "stm32f1xx_hal_dma_ex.h"
Kojto 96:487b796308b0 401
Kojto 96:487b796308b0 402 /* Exported functions --------------------------------------------------------*/
Kojto 96:487b796308b0 403 /** @addtogroup DMA_Exported_Functions DMA Exported Functions
Kojto 96:487b796308b0 404 * @{
Kojto 96:487b796308b0 405 */
Kojto 96:487b796308b0 406
Kojto 96:487b796308b0 407 /** @addtogroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions
Kojto 96:487b796308b0 408 * @{
Kojto 96:487b796308b0 409 */
Kojto 96:487b796308b0 410 /* Initialization and de-initialization functions *****************************/
Kojto 96:487b796308b0 411 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma);
Kojto 96:487b796308b0 412 HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma);
Kojto 96:487b796308b0 413 /**
Kojto 96:487b796308b0 414 * @}
Kojto 96:487b796308b0 415 */
Kojto 96:487b796308b0 416
Kojto 96:487b796308b0 417 /** @addtogroup DMA_Exported_Functions_Group2 Input and Output operation functions
Kojto 96:487b796308b0 418 * @{
Kojto 96:487b796308b0 419 */
Kojto 96:487b796308b0 420 /* IO operation functions *****************************************************/
Kojto 96:487b796308b0 421 HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
Kojto 96:487b796308b0 422 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
Kojto 96:487b796308b0 423 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
Kojto 96:487b796308b0 424 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout);
Kojto 96:487b796308b0 425 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
Kojto 96:487b796308b0 426 /**
Kojto 96:487b796308b0 427 * @}
Kojto 96:487b796308b0 428 */
Kojto 96:487b796308b0 429
Kojto 96:487b796308b0 430 /** @addtogroup DMA_Exported_Functions_Group3 Peripheral State functions
Kojto 96:487b796308b0 431 * @{
Kojto 96:487b796308b0 432 */
Kojto 96:487b796308b0 433 /* Peripheral State and Error functions ***************************************/
Kojto 96:487b796308b0 434 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma);
Kojto 96:487b796308b0 435 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
Kojto 96:487b796308b0 436 /**
Kojto 96:487b796308b0 437 * @}
Kojto 96:487b796308b0 438 */
Kojto 96:487b796308b0 439
Kojto 96:487b796308b0 440 /**
Kojto 96:487b796308b0 441 * @}
Kojto 96:487b796308b0 442 */
Kojto 96:487b796308b0 443
Kojto 96:487b796308b0 444 /**
Kojto 96:487b796308b0 445 * @}
Kojto 96:487b796308b0 446 */
Kojto 96:487b796308b0 447
Kojto 96:487b796308b0 448 /**
Kojto 96:487b796308b0 449 * @}
Kojto 96:487b796308b0 450 */
Kojto 96:487b796308b0 451
Kojto 96:487b796308b0 452 #ifdef __cplusplus
Kojto 96:487b796308b0 453 }
Kojto 96:487b796308b0 454 #endif
Kojto 96:487b796308b0 455
Kojto 96:487b796308b0 456 #endif /* __STM32F1xx_HAL_DMA_H */
Kojto 96:487b796308b0 457
Kojto 96:487b796308b0 458 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/