雄介 太田 / mbed

mbed(SerialHalfDuplex入り)

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TARGET_ARCH_MAX/stm32f4xx_hal_sd.h@98:01a414ca7d6d, 2015-04-08 (annotated)

Committer:
yusuke_kyo
Date:
Wed Apr 08 08:04:18 2015 +0000
Revision:
98:01a414ca7d6d
Parent:
92:4fc01daae5a5 
remove SerialHalfDuplex.h

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 89:552587b429a1 1 /**
bogdanm 89:552587b429a1 2 ******************************************************************************
bogdanm 89:552587b429a1 3 * @file stm32f4xx_hal_sd.h
bogdanm 89:552587b429a1 4 * @author MCD Application Team
bogdanm 92:4fc01daae5a5 5 * @version V1.1.0
bogdanm 92:4fc01daae5a5 6 * @date 19-June-2014
bogdanm 89:552587b429a1 7 * @brief Header file of SD HAL module.
bogdanm 89:552587b429a1 8 ******************************************************************************
bogdanm 89:552587b429a1 9 * @attention
bogdanm 89:552587b429a1 10 *
bogdanm 89:552587b429a1 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 89:552587b429a1 12 *
bogdanm 89:552587b429a1 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 89:552587b429a1 14 * are permitted provided that the following conditions are met:
bogdanm 89:552587b429a1 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 89:552587b429a1 16 * this list of conditions and the following disclaimer.
bogdanm 89:552587b429a1 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 89:552587b429a1 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 89:552587b429a1 19 * and/or other materials provided with the distribution.
bogdanm 89:552587b429a1 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 89:552587b429a1 21 * may be used to endorse or promote products derived from this software
bogdanm 89:552587b429a1 22 * without specific prior written permission.
bogdanm 89:552587b429a1 23 *
bogdanm 89:552587b429a1 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 89:552587b429a1 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 89:552587b429a1 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 89:552587b429a1 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 89:552587b429a1 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 89:552587b429a1 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 89:552587b429a1 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 89:552587b429a1 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 89:552587b429a1 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 89:552587b429a1 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 89:552587b429a1 34 *
bogdanm 89:552587b429a1 35 ******************************************************************************
bogdanm 89:552587b429a1 36 */
bogdanm 89:552587b429a1 37
bogdanm 89:552587b429a1 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 89:552587b429a1 39 #ifndef __STM32F4xx_HAL_SD_H
bogdanm 89:552587b429a1 40 #define __STM32F4xx_HAL_SD_H
bogdanm 89:552587b429a1 41
bogdanm 89:552587b429a1 42 #ifdef __cplusplus
bogdanm 89:552587b429a1 43 extern "C" {
bogdanm 89:552587b429a1 44 #endif
bogdanm 89:552587b429a1 45
bogdanm 89:552587b429a1 46 /* Includes ------------------------------------------------------------------*/
bogdanm 89:552587b429a1 47 #include "stm32f4xx_ll_sdmmc.h"
bogdanm 89:552587b429a1 48
bogdanm 89:552587b429a1 49 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 89:552587b429a1 50 * @{
bogdanm 89:552587b429a1 51 */
bogdanm 89:552587b429a1 52
bogdanm 89:552587b429a1 53 /** @addtogroup SD
bogdanm 89:552587b429a1 54 * @{
bogdanm 89:552587b429a1 55 */
bogdanm 89:552587b429a1 56
bogdanm 89:552587b429a1 57 /* Exported types ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 58 /** @defgroup SD_Exported_Types
bogdanm 92:4fc01daae5a5 59 * @{
bogdanm 92:4fc01daae5a5 60 */
bogdanm 89:552587b429a1 61 #define SD_InitTypeDef SDIO_InitTypeDef
bogdanm 89:552587b429a1 62 #define SD_TypeDef SDIO_TypeDef
bogdanm 89:552587b429a1 63
bogdanm 89:552587b429a1 64 /**
bogdanm 89:552587b429a1 65 * @brief SDIO Handle Structure definition
bogdanm 89:552587b429a1 66 */
bogdanm 89:552587b429a1 67 typedef struct
bogdanm 89:552587b429a1 68 {
bogdanm 89:552587b429a1 69 SD_TypeDef *Instance; /*!< SDIO register base address */
bogdanm 89:552587b429a1 70
bogdanm 89:552587b429a1 71 SD_InitTypeDef Init; /*!< SD required parameters */
bogdanm 89:552587b429a1 72
bogdanm 89:552587b429a1 73 HAL_LockTypeDef Lock; /*!< SD locking object */
bogdanm 89:552587b429a1 74
bogdanm 89:552587b429a1 75 uint32_t CardType; /*!< SD card type */
bogdanm 89:552587b429a1 76
bogdanm 89:552587b429a1 77 uint32_t RCA; /*!< SD relative card address */
bogdanm 89:552587b429a1 78
bogdanm 89:552587b429a1 79 uint32_t CSD[4]; /*!< SD card specific data table */
bogdanm 89:552587b429a1 80
bogdanm 89:552587b429a1 81 uint32_t CID[4]; /*!< SD card identification number table */
bogdanm 89:552587b429a1 82
bogdanm 89:552587b429a1 83 __IO uint32_t SdTransferCplt; /*!< SD transfer complete flag in non blocking mode */
bogdanm 89:552587b429a1 84
bogdanm 89:552587b429a1 85 __IO uint32_t SdTransferErr; /*!< SD transfer error flag in non blocking mode */
bogdanm 89:552587b429a1 86
bogdanm 89:552587b429a1 87 __IO uint32_t DmaTransferCplt; /*!< SD DMA transfer complete flag */
bogdanm 89:552587b429a1 88
bogdanm 89:552587b429a1 89 __IO uint32_t SdOperation; /*!< SD transfer operation (read/write) */
bogdanm 89:552587b429a1 90
bogdanm 89:552587b429a1 91 DMA_HandleTypeDef *hdmarx; /*!< SD Rx DMA handle parameters */
bogdanm 89:552587b429a1 92
bogdanm 89:552587b429a1 93 DMA_HandleTypeDef *hdmatx; /*!< SD Tx DMA handle parameters */
bogdanm 89:552587b429a1 94
bogdanm 89:552587b429a1 95 }SD_HandleTypeDef;
bogdanm 89:552587b429a1 96
bogdanm 89:552587b429a1 97 /**
bogdanm 89:552587b429a1 98 * @brief Card Specific Data: CSD Register
bogdanm 89:552587b429a1 99 */
bogdanm 89:552587b429a1 100 typedef struct
bogdanm 89:552587b429a1 101 {
bogdanm 89:552587b429a1 102 __IO uint8_t CSDStruct; /*!< CSD structure */
bogdanm 89:552587b429a1 103 __IO uint8_t SysSpecVersion; /*!< System specification version */
bogdanm 89:552587b429a1 104 __IO uint8_t Reserved1; /*!< Reserved */
bogdanm 89:552587b429a1 105 __IO uint8_t TAAC; /*!< Data read access time 1 */
bogdanm 89:552587b429a1 106 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */
bogdanm 89:552587b429a1 107 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
bogdanm 89:552587b429a1 108 __IO uint16_t CardComdClasses; /*!< Card command classes */
bogdanm 89:552587b429a1 109 __IO uint8_t RdBlockLen; /*!< Max. read data block length */
bogdanm 89:552587b429a1 110 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
bogdanm 89:552587b429a1 111 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
bogdanm 89:552587b429a1 112 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
bogdanm 89:552587b429a1 113 __IO uint8_t DSRImpl; /*!< DSR implemented */
bogdanm 89:552587b429a1 114 __IO uint8_t Reserved2; /*!< Reserved */
bogdanm 89:552587b429a1 115 __IO uint32_t DeviceSize; /*!< Device Size */
bogdanm 89:552587b429a1 116 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
bogdanm 89:552587b429a1 117 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
bogdanm 89:552587b429a1 118 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
bogdanm 89:552587b429a1 119 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
bogdanm 89:552587b429a1 120 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */
bogdanm 89:552587b429a1 121 __IO uint8_t EraseGrSize; /*!< Erase group size */
bogdanm 89:552587b429a1 122 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */
bogdanm 89:552587b429a1 123 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */
bogdanm 89:552587b429a1 124 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */
bogdanm 89:552587b429a1 125 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */
bogdanm 89:552587b429a1 126 __IO uint8_t WrSpeedFact; /*!< Write speed factor */
bogdanm 89:552587b429a1 127 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */
bogdanm 89:552587b429a1 128 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
bogdanm 89:552587b429a1 129 __IO uint8_t Reserved3; /*!< Reserved */
bogdanm 89:552587b429a1 130 __IO uint8_t ContentProtectAppli; /*!< Content protection application */
bogdanm 89:552587b429a1 131 __IO uint8_t FileFormatGrouop; /*!< File format group */
bogdanm 89:552587b429a1 132 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */
bogdanm 89:552587b429a1 133 __IO uint8_t PermWrProtect; /*!< Permanent write protection */
bogdanm 89:552587b429a1 134 __IO uint8_t TempWrProtect; /*!< Temporary write protection */
bogdanm 89:552587b429a1 135 __IO uint8_t FileFormat; /*!< File format */
bogdanm 89:552587b429a1 136 __IO uint8_t ECC; /*!< ECC code */
bogdanm 89:552587b429a1 137 __IO uint8_t CSD_CRC; /*!< CSD CRC */
bogdanm 89:552587b429a1 138 __IO uint8_t Reserved4; /*!< Always 1 */
bogdanm 89:552587b429a1 139
bogdanm 89:552587b429a1 140 }HAL_SD_CSDTypedef;
bogdanm 89:552587b429a1 141
bogdanm 89:552587b429a1 142 /**
bogdanm 89:552587b429a1 143 * @brief Card Identification Data: CID Register
bogdanm 89:552587b429a1 144 */
bogdanm 89:552587b429a1 145 typedef struct
bogdanm 89:552587b429a1 146 {
bogdanm 89:552587b429a1 147 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */
bogdanm 89:552587b429a1 148 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */
bogdanm 89:552587b429a1 149 __IO uint32_t ProdName1; /*!< Product Name part1 */
bogdanm 89:552587b429a1 150 __IO uint8_t ProdName2; /*!< Product Name part2 */
bogdanm 89:552587b429a1 151 __IO uint8_t ProdRev; /*!< Product Revision */
bogdanm 89:552587b429a1 152 __IO uint32_t ProdSN; /*!< Product Serial Number */
bogdanm 89:552587b429a1 153 __IO uint8_t Reserved1; /*!< Reserved1 */
bogdanm 89:552587b429a1 154 __IO uint16_t ManufactDate; /*!< Manufacturing Date */
bogdanm 89:552587b429a1 155 __IO uint8_t CID_CRC; /*!< CID CRC */
bogdanm 89:552587b429a1 156 __IO uint8_t Reserved2; /*!< Always 1 */
bogdanm 89:552587b429a1 157
bogdanm 89:552587b429a1 158 }HAL_SD_CIDTypedef;
bogdanm 89:552587b429a1 159
bogdanm 89:552587b429a1 160 /**
bogdanm 89:552587b429a1 161 * @brief SD Card Status returned by ACMD13
bogdanm 89:552587b429a1 162 */
bogdanm 89:552587b429a1 163 typedef struct
bogdanm 89:552587b429a1 164 {
bogdanm 89:552587b429a1 165 __IO uint8_t DAT_BUS_WIDTH; /*!< Shows the currently defined data bus width */
bogdanm 89:552587b429a1 166 __IO uint8_t SECURED_MODE; /*!< Card is in secured mode of operation */
bogdanm 89:552587b429a1 167 __IO uint16_t SD_CARD_TYPE; /*!< Carries information about card type */
bogdanm 89:552587b429a1 168 __IO uint32_t SIZE_OF_PROTECTED_AREA; /*!< Carries information about the capacity of protected area */
bogdanm 89:552587b429a1 169 __IO uint8_t SPEED_CLASS; /*!< Carries information about the speed class of the card */
bogdanm 89:552587b429a1 170 __IO uint8_t PERFORMANCE_MOVE; /*!< Carries information about the card's performance move */
bogdanm 89:552587b429a1 171 __IO uint8_t AU_SIZE; /*!< Carries information about the card's allocation unit size */
bogdanm 89:552587b429a1 172 __IO uint16_t ERASE_SIZE; /*!< Determines the number of AUs to be erased in one operation */
bogdanm 89:552587b429a1 173 __IO uint8_t ERASE_TIMEOUT; /*!< Determines the timeout for any number of AU erase */
bogdanm 89:552587b429a1 174 __IO uint8_t ERASE_OFFSET; /*!< Carries information about the erase offset */
bogdanm 89:552587b429a1 175
bogdanm 89:552587b429a1 176 }HAL_SD_CardStatusTypedef;
bogdanm 89:552587b429a1 177
bogdanm 89:552587b429a1 178 /**
bogdanm 89:552587b429a1 179 * @brief SD Card information structure
bogdanm 89:552587b429a1 180 */
bogdanm 89:552587b429a1 181 typedef struct
bogdanm 89:552587b429a1 182 {
bogdanm 89:552587b429a1 183 HAL_SD_CSDTypedef SD_csd; /*!< SD card specific data register */
bogdanm 89:552587b429a1 184 HAL_SD_CIDTypedef SD_cid; /*!< SD card identification number register */
bogdanm 89:552587b429a1 185 uint64_t CardCapacity; /*!< Card capacity */
bogdanm 89:552587b429a1 186 uint32_t CardBlockSize; /*!< Card block size */
bogdanm 89:552587b429a1 187 uint16_t RCA; /*!< SD relative card address */
bogdanm 89:552587b429a1 188 uint8_t CardType; /*!< SD card type */
bogdanm 89:552587b429a1 189
bogdanm 89:552587b429a1 190 }HAL_SD_CardInfoTypedef;
bogdanm 89:552587b429a1 191
bogdanm 89:552587b429a1 192 /**
bogdanm 89:552587b429a1 193 * @brief SD Error status enumeration Structure definition
bogdanm 89:552587b429a1 194 */
bogdanm 89:552587b429a1 195 typedef enum
bogdanm 89:552587b429a1 196 {
bogdanm 89:552587b429a1 197 /**
bogdanm 89:552587b429a1 198 * @brief SD specific error defines
bogdanm 89:552587b429a1 199 */
bogdanm 89:552587b429a1 200 SD_CMD_CRC_FAIL = (1), /*!< Command response received (but CRC check failed) */
bogdanm 89:552587b429a1 201 SD_DATA_CRC_FAIL = (2), /*!< Data block sent/received (CRC check failed) */
bogdanm 89:552587b429a1 202 SD_CMD_RSP_TIMEOUT = (3), /*!< Command response timeout */
bogdanm 89:552587b429a1 203 SD_DATA_TIMEOUT = (4), /*!< Data timeout */
bogdanm 89:552587b429a1 204 SD_TX_UNDERRUN = (5), /*!< Transmit FIFO underrun */
bogdanm 89:552587b429a1 205 SD_RX_OVERRUN = (6), /*!< Receive FIFO overrun */
bogdanm 89:552587b429a1 206 SD_START_BIT_ERR = (7), /*!< Start bit not detected on all data signals in wide bus mode */
bogdanm 89:552587b429a1 207 SD_CMD_OUT_OF_RANGE = (8), /*!< Command's argument was out of range. */
bogdanm 89:552587b429a1 208 SD_ADDR_MISALIGNED = (9), /*!< Misaligned address */
bogdanm 89:552587b429a1 209 SD_BLOCK_LEN_ERR = (10), /*!< Transferred block length is not allowed for the card or the number of transferred bytes does not match the block length */
bogdanm 89:552587b429a1 210 SD_ERASE_SEQ_ERR = (11), /*!< An error in the sequence of erase command occurs. */
bogdanm 89:552587b429a1 211 SD_BAD_ERASE_PARAM = (12), /*!< An invalid selection for erase groups */
bogdanm 89:552587b429a1 212 SD_WRITE_PROT_VIOLATION = (13), /*!< Attempt to program a write protect block */
bogdanm 89:552587b429a1 213 SD_LOCK_UNLOCK_FAILED = (14), /*!< Sequence or password error has been detected in unlock command or if there was an attempt to access a locked card */
bogdanm 89:552587b429a1 214 SD_COM_CRC_FAILED = (15), /*!< CRC check of the previous command failed */
bogdanm 89:552587b429a1 215 SD_ILLEGAL_CMD = (16), /*!< Command is not legal for the card state */
bogdanm 89:552587b429a1 216 SD_CARD_ECC_FAILED = (17), /*!< Card internal ECC was applied but failed to correct the data */
bogdanm 89:552587b429a1 217 SD_CC_ERROR = (18), /*!< Internal card controller error */
bogdanm 89:552587b429a1 218 SD_GENERAL_UNKNOWN_ERROR = (19), /*!< General or unknown error */
bogdanm 89:552587b429a1 219 SD_STREAM_READ_UNDERRUN = (20), /*!< The card could not sustain data transfer in stream read operation. */
bogdanm 89:552587b429a1 220 SD_STREAM_WRITE_OVERRUN = (21), /*!< The card could not sustain data programming in stream mode */
bogdanm 89:552587b429a1 221 SD_CID_CSD_OVERWRITE = (22), /*!< CID/CSD overwrite error */
bogdanm 89:552587b429a1 222 SD_WP_ERASE_SKIP = (23), /*!< Only partial address space was erased */
bogdanm 89:552587b429a1 223 SD_CARD_ECC_DISABLED = (24), /*!< Command has been executed without using internal ECC */
bogdanm 89:552587b429a1 224 SD_ERASE_RESET = (25), /*!< Erase sequence was cleared before executing because an out of erase sequence command was received */
bogdanm 89:552587b429a1 225 SD_AKE_SEQ_ERROR = (26), /*!< Error in sequence of authentication. */
bogdanm 89:552587b429a1 226 SD_INVALID_VOLTRANGE = (27),
bogdanm 89:552587b429a1 227 SD_ADDR_OUT_OF_RANGE = (28),
bogdanm 89:552587b429a1 228 SD_SWITCH_ERROR = (29),
bogdanm 89:552587b429a1 229 SD_SDIO_DISABLED = (30),
bogdanm 89:552587b429a1 230 SD_SDIO_FUNCTION_BUSY = (31),
bogdanm 89:552587b429a1 231 SD_SDIO_FUNCTION_FAILED = (32),
bogdanm 89:552587b429a1 232 SD_SDIO_UNKNOWN_FUNCTION = (33),
bogdanm 89:552587b429a1 233
bogdanm 89:552587b429a1 234 /**
bogdanm 89:552587b429a1 235 * @brief Standard error defines
bogdanm 89:552587b429a1 236 */
bogdanm 89:552587b429a1 237 SD_INTERNAL_ERROR = (34),
bogdanm 89:552587b429a1 238 SD_NOT_CONFIGURED = (35),
bogdanm 89:552587b429a1 239 SD_REQUEST_PENDING = (36),
bogdanm 89:552587b429a1 240 SD_REQUEST_NOT_APPLICABLE = (37),
bogdanm 89:552587b429a1 241 SD_INVALID_PARAMETER = (38),
bogdanm 89:552587b429a1 242 SD_UNSUPPORTED_FEATURE = (39),
bogdanm 89:552587b429a1 243 SD_UNSUPPORTED_HW = (40),
bogdanm 89:552587b429a1 244 SD_ERROR = (41),
bogdanm 89:552587b429a1 245 SD_OK = (0)
bogdanm 89:552587b429a1 246
bogdanm 89:552587b429a1 247 }HAL_SD_ErrorTypedef;
bogdanm 89:552587b429a1 248
bogdanm 89:552587b429a1 249 /**
bogdanm 89:552587b429a1 250 * @brief SD Transfer state enumeration structure
bogdanm 89:552587b429a1 251 */
bogdanm 89:552587b429a1 252 typedef enum
bogdanm 89:552587b429a1 253 {
bogdanm 89:552587b429a1 254 SD_TRANSFER_OK = 0, /*!< Transfer success */
bogdanm 89:552587b429a1 255 SD_TRANSFER_BUSY = 1, /*!< Transfer is occurring */
bogdanm 89:552587b429a1 256 SD_TRANSFER_ERROR = 2 /*!< Transfer failed */
bogdanm 89:552587b429a1 257
bogdanm 89:552587b429a1 258 }HAL_SD_TransferStateTypedef;
bogdanm 89:552587b429a1 259
bogdanm 89:552587b429a1 260 /**
bogdanm 89:552587b429a1 261 * @brief SD Card State enumeration structure
bogdanm 89:552587b429a1 262 */
bogdanm 89:552587b429a1 263 typedef enum
bogdanm 89:552587b429a1 264 {
bogdanm 89:552587b429a1 265 SD_CARD_READY = ((uint32_t)0x00000001), /*!< Card state is ready */
bogdanm 89:552587b429a1 266 SD_CARD_IDENTIFICATION = ((uint32_t)0x00000002), /*!< Card is in identification state */
bogdanm 89:552587b429a1 267 SD_CARD_STANDBY = ((uint32_t)0x00000003), /*!< Card is in standby state */
bogdanm 89:552587b429a1 268 SD_CARD_TRANSFER = ((uint32_t)0x00000004), /*!< Card is in transfer state */
bogdanm 89:552587b429a1 269 SD_CARD_SENDING = ((uint32_t)0x00000005), /*!< Card is sending an operation */
bogdanm 89:552587b429a1 270 SD_CARD_RECEIVING = ((uint32_t)0x00000006), /*!< Card is receiving operation information */
bogdanm 89:552587b429a1 271 SD_CARD_PROGRAMMING = ((uint32_t)0x00000007), /*!< Card is in programming state */
bogdanm 89:552587b429a1 272 SD_CARD_DISCONNECTED = ((uint32_t)0x00000008), /*!< Card is disconnected */
bogdanm 89:552587b429a1 273 SD_CARD_ERROR = ((uint32_t)0x000000FF) /*!< Card is in error state */
bogdanm 89:552587b429a1 274
bogdanm 89:552587b429a1 275 }HAL_SD_CardStateTypedef;
bogdanm 89:552587b429a1 276
bogdanm 89:552587b429a1 277 /**
bogdanm 89:552587b429a1 278 * @brief SD Operation enumeration structure
bogdanm 89:552587b429a1 279 */
bogdanm 89:552587b429a1 280 typedef enum
bogdanm 89:552587b429a1 281 {
bogdanm 89:552587b429a1 282 SD_READ_SINGLE_BLOCK = 0, /*!< Read single block operation */
bogdanm 89:552587b429a1 283 SD_READ_MULTIPLE_BLOCK = 1, /*!< Read multiple blocks operation */
bogdanm 89:552587b429a1 284 SD_WRITE_SINGLE_BLOCK = 2, /*!< Write single block operation */
bogdanm 89:552587b429a1 285 SD_WRITE_MULTIPLE_BLOCK = 3 /*!< Write multiple blocks operation */
bogdanm 89:552587b429a1 286
bogdanm 89:552587b429a1 287 }HAL_SD_OperationTypedef;
bogdanm 89:552587b429a1 288
bogdanm 89:552587b429a1 289
bogdanm 89:552587b429a1 290 /* Exported constants --------------------------------------------------------*/
bogdanm 89:552587b429a1 291 /** @defgroup SD_Exported_Constants
bogdanm 89:552587b429a1 292 * @{
bogdanm 89:552587b429a1 293 */
bogdanm 89:552587b429a1 294
bogdanm 89:552587b429a1 295 /**
bogdanm 89:552587b429a1 296 * @brief SD Commands Index
bogdanm 89:552587b429a1 297 */
bogdanm 89:552587b429a1 298 #define SD_CMD_GO_IDLE_STATE ((uint8_t)0) /*!< Resets the SD memory card. */
bogdanm 89:552587b429a1 299 #define SD_CMD_SEND_OP_COND ((uint8_t)1) /*!< Sends host capacity support information and activates the card's initialization process. */
bogdanm 89:552587b429a1 300 #define SD_CMD_ALL_SEND_CID ((uint8_t)2) /*!< Asks any card connected to the host to send the CID numbers on the CMD line. */
bogdanm 89:552587b429a1 301 #define SD_CMD_SET_REL_ADDR ((uint8_t)3) /*!< Asks the card to publish a new relative address (RCA). */
bogdanm 89:552587b429a1 302 #define SD_CMD_SET_DSR ((uint8_t)4) /*!< Programs the DSR of all cards. */
bogdanm 89:552587b429a1 303 #define SD_CMD_SDIO_SEN_OP_COND ((uint8_t)5) /*!< Sends host capacity support information (HCS) and asks the accessed card to send its
bogdanm 89:552587b429a1 304 operating condition register (OCR) content in the response on the CMD line. */
bogdanm 89:552587b429a1 305 #define SD_CMD_HS_SWITCH ((uint8_t)6) /*!< Checks switchable function (mode 0) and switch card function (mode 1). */
bogdanm 89:552587b429a1 306 #define SD_CMD_SEL_DESEL_CARD ((uint8_t)7) /*!< Selects the card by its own relative address and gets deselected by any other address */
bogdanm 89:552587b429a1 307 #define SD_CMD_HS_SEND_EXT_CSD ((uint8_t)8) /*!< Sends SD Memory Card interface condition, which includes host supply voltage information
bogdanm 89:552587b429a1 308 and asks the card whether card supports voltage. */
bogdanm 89:552587b429a1 309 #define SD_CMD_SEND_CSD ((uint8_t)9) /*!< Addressed card sends its card specific data (CSD) on the CMD line. */
bogdanm 89:552587b429a1 310 #define SD_CMD_SEND_CID ((uint8_t)10) /*!< Addressed card sends its card identification (CID) on the CMD line. */
bogdanm 89:552587b429a1 311 #define SD_CMD_READ_DAT_UNTIL_STOP ((uint8_t)11) /*!< SD card doesn't support it. */
bogdanm 89:552587b429a1 312 #define SD_CMD_STOP_TRANSMISSION ((uint8_t)12) /*!< Forces the card to stop transmission. */
bogdanm 89:552587b429a1 313 #define SD_CMD_SEND_STATUS ((uint8_t)13) /*!< Addressed card sends its status register. */
bogdanm 89:552587b429a1 314 #define SD_CMD_HS_BUSTEST_READ ((uint8_t)14)
bogdanm 89:552587b429a1 315 #define SD_CMD_GO_INACTIVE_STATE ((uint8_t)15) /*!< Sends an addressed card into the inactive state. */
bogdanm 89:552587b429a1 316 #define SD_CMD_SET_BLOCKLEN ((uint8_t)16) /*!< Sets the block length (in bytes for SDSC) for all following block commands
bogdanm 89:552587b429a1 317 (read, write, lock). Default block length is fixed to 512 Bytes. Not effective
bogdanm 89:552587b429a1 318 for SDHS and SDXC. */
bogdanm 89:552587b429a1 319 #define SD_CMD_READ_SINGLE_BLOCK ((uint8_t)17) /*!< Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
bogdanm 89:552587b429a1 320 fixed 512 bytes in case of SDHC and SDXC. */
bogdanm 89:552587b429a1 321 #define SD_CMD_READ_MULT_BLOCK ((uint8_t)18) /*!< Continuously transfers data blocks from card to host until interrupted by
bogdanm 89:552587b429a1 322 STOP_TRANSMISSION command. */
bogdanm 89:552587b429a1 323 #define SD_CMD_HS_BUSTEST_WRITE ((uint8_t)19) /*!< 64 bytes tuning pattern is sent for SDR50 and SDR104. */
bogdanm 89:552587b429a1 324 #define SD_CMD_WRITE_DAT_UNTIL_STOP ((uint8_t)20) /*!< Speed class control command. */
bogdanm 89:552587b429a1 325 #define SD_CMD_SET_BLOCK_COUNT ((uint8_t)23) /*!< Specify block count for CMD18 and CMD25. */
bogdanm 89:552587b429a1 326 #define SD_CMD_WRITE_SINGLE_BLOCK ((uint8_t)24) /*!< Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
bogdanm 89:552587b429a1 327 fixed 512 bytes in case of SDHC and SDXC. */
bogdanm 89:552587b429a1 328 #define SD_CMD_WRITE_MULT_BLOCK ((uint8_t)25) /*!< Continuously writes blocks of data until a STOP_TRANSMISSION follows. */
bogdanm 89:552587b429a1 329 #define SD_CMD_PROG_CID ((uint8_t)26) /*!< Reserved for manufacturers. */
bogdanm 89:552587b429a1 330 #define SD_CMD_PROG_CSD ((uint8_t)27) /*!< Programming of the programmable bits of the CSD. */
bogdanm 89:552587b429a1 331 #define SD_CMD_SET_WRITE_PROT ((uint8_t)28) /*!< Sets the write protection bit of the addressed group. */
bogdanm 89:552587b429a1 332 #define SD_CMD_CLR_WRITE_PROT ((uint8_t)29) /*!< Clears the write protection bit of the addressed group. */
bogdanm 89:552587b429a1 333 #define SD_CMD_SEND_WRITE_PROT ((uint8_t)30) /*!< Asks the card to send the status of the write protection bits. */
bogdanm 89:552587b429a1 334 #define SD_CMD_SD_ERASE_GRP_START ((uint8_t)32) /*!< Sets the address of the first write block to be erased. (For SD card only). */
bogdanm 89:552587b429a1 335 #define SD_CMD_SD_ERASE_GRP_END ((uint8_t)33) /*!< Sets the address of the last write block of the continuous range to be erased. */
bogdanm 89:552587b429a1 336 #define SD_CMD_ERASE_GRP_START ((uint8_t)35) /*!< Sets the address of the first write block to be erased. Reserved for each command
bogdanm 89:552587b429a1 337 system set by switch function command (CMD6). */
bogdanm 89:552587b429a1 338 #define SD_CMD_ERASE_GRP_END ((uint8_t)36) /*!< Sets the address of the last write block of the continuous range to be erased.
bogdanm 89:552587b429a1 339 Reserved for each command system set by switch function command (CMD6). */
bogdanm 89:552587b429a1 340 #define SD_CMD_ERASE ((uint8_t)38) /*!< Reserved for SD security applications. */
bogdanm 89:552587b429a1 341 #define SD_CMD_FAST_IO ((uint8_t)39) /*!< SD card doesn't support it (Reserved). */
bogdanm 89:552587b429a1 342 #define SD_CMD_GO_IRQ_STATE ((uint8_t)40) /*!< SD card doesn't support it (Reserved). */
bogdanm 89:552587b429a1 343 #define SD_CMD_LOCK_UNLOCK ((uint8_t)42) /*!< Sets/resets the password or lock/unlock the card. The size of the data block is set by
bogdanm 89:552587b429a1 344 the SET_BLOCK_LEN command. */
bogdanm 89:552587b429a1 345 #define SD_CMD_APP_CMD ((uint8_t)55) /*!< Indicates to the card that the next command is an application specific command rather
bogdanm 89:552587b429a1 346 than a standard command. */
bogdanm 89:552587b429a1 347 #define SD_CMD_GEN_CMD ((uint8_t)56) /*!< Used either to transfer a data block to the card or to get a data block from the card
bogdanm 89:552587b429a1 348 for general purpose/application specific commands. */
bogdanm 89:552587b429a1 349 #define SD_CMD_NO_CMD ((uint8_t)64)
bogdanm 89:552587b429a1 350
bogdanm 89:552587b429a1 351 /**
bogdanm 89:552587b429a1 352 * @brief Following commands are SD Card Specific commands.
bogdanm 89:552587b429a1 353 * SDIO_APP_CMD should be sent before sending these commands.
bogdanm 89:552587b429a1 354 */
bogdanm 89:552587b429a1 355 #define SD_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6) /*!< (ACMD6) Defines the data bus width to be used for data transfer. The allowed data bus
bogdanm 89:552587b429a1 356 widths are given in SCR register. */
bogdanm 89:552587b429a1 357 #define SD_CMD_SD_APP_STAUS ((uint8_t)13) /*!< (ACMD13) Sends the SD status. */
bogdanm 89:552587b429a1 358 #define SD_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22) /*!< (ACMD22) Sends the number of the written (without errors) write blocks. Responds with
bogdanm 89:552587b429a1 359 32bit+CRC data block. */
bogdanm 89:552587b429a1 360 #define SD_CMD_SD_APP_OP_COND ((uint8_t)41) /*!< (ACMD41) Sends host capacity support information (HCS) and asks the accessed card to
bogdanm 89:552587b429a1 361 send its operating condition register (OCR) content in the response on the CMD line. */
bogdanm 89:552587b429a1 362 #define SD_CMD_SD_APP_SET_CLR_CARD_DETECT ((uint8_t)42) /*!< (ACMD42) Connects/Disconnects the 50 KOhm pull-up resistor on CD/DAT3 (pin 1) of the card. */
bogdanm 89:552587b429a1 363 #define SD_CMD_SD_APP_SEND_SCR ((uint8_t)51) /*!< Reads the SD Configuration Register (SCR). */
bogdanm 89:552587b429a1 364 #define SD_CMD_SDIO_RW_DIRECT ((uint8_t)52) /*!< For SD I/O card only, reserved for security specification. */
bogdanm 89:552587b429a1 365 #define SD_CMD_SDIO_RW_EXTENDED ((uint8_t)53) /*!< For SD I/O card only, reserved for security specification. */
bogdanm 89:552587b429a1 366
bogdanm 89:552587b429a1 367 /**
bogdanm 89:552587b429a1 368 * @brief Following commands are SD Card Specific security commands.
bogdanm 89:552587b429a1 369 * SD_CMD_APP_CMD should be sent before sending these commands.
bogdanm 89:552587b429a1 370 */
bogdanm 89:552587b429a1 371 #define SD_CMD_SD_APP_GET_MKB ((uint8_t)43) /*!< For SD card only */
bogdanm 89:552587b429a1 372 #define SD_CMD_SD_APP_GET_MID ((uint8_t)44) /*!< For SD card only */
bogdanm 89:552587b429a1 373 #define SD_CMD_SD_APP_SET_CER_RN1 ((uint8_t)45) /*!< For SD card only */
bogdanm 89:552587b429a1 374 #define SD_CMD_SD_APP_GET_CER_RN2 ((uint8_t)46) /*!< For SD card only */
bogdanm 89:552587b429a1 375 #define SD_CMD_SD_APP_SET_CER_RES2 ((uint8_t)47) /*!< For SD card only */
bogdanm 89:552587b429a1 376 #define SD_CMD_SD_APP_GET_CER_RES1 ((uint8_t)48) /*!< For SD card only */
bogdanm 89:552587b429a1 377 #define SD_CMD_SD_APP_SECURE_READ_MULTIPLE_BLOCK ((uint8_t)18) /*!< For SD card only */
bogdanm 89:552587b429a1 378 #define SD_CMD_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK ((uint8_t)25) /*!< For SD card only */
bogdanm 89:552587b429a1 379 #define SD_CMD_SD_APP_SECURE_ERASE ((uint8_t)38) /*!< For SD card only */
bogdanm 89:552587b429a1 380 #define SD_CMD_SD_APP_CHANGE_SECURE_AREA ((uint8_t)49) /*!< For SD card only */
bogdanm 89:552587b429a1 381 #define SD_CMD_SD_APP_SECURE_WRITE_MKB ((uint8_t)48) /*!< For SD card only */
bogdanm 89:552587b429a1 382
bogdanm 89:552587b429a1 383 /**
bogdanm 89:552587b429a1 384 * @brief Supported SD Memory Cards
bogdanm 89:552587b429a1 385 */
bogdanm 89:552587b429a1 386 #define STD_CAPACITY_SD_CARD_V1_1 ((uint32_t)0x00000000)
bogdanm 89:552587b429a1 387 #define STD_CAPACITY_SD_CARD_V2_0 ((uint32_t)0x00000001)
bogdanm 89:552587b429a1 388 #define HIGH_CAPACITY_SD_CARD ((uint32_t)0x00000002)
bogdanm 89:552587b429a1 389 #define MULTIMEDIA_CARD ((uint32_t)0x00000003)
bogdanm 89:552587b429a1 390 #define SECURE_DIGITAL_IO_CARD ((uint32_t)0x00000004)
bogdanm 89:552587b429a1 391 #define HIGH_SPEED_MULTIMEDIA_CARD ((uint32_t)0x00000005)
bogdanm 89:552587b429a1 392 #define SECURE_DIGITAL_IO_COMBO_CARD ((uint32_t)0x00000006)
bogdanm 89:552587b429a1 393 #define HIGH_CAPACITY_MMC_CARD ((uint32_t)0x00000007)
bogdanm 89:552587b429a1 394 /**
bogdanm 89:552587b429a1 395 * @}
bogdanm 89:552587b429a1 396 */
bogdanm 89:552587b429a1 397
bogdanm 89:552587b429a1 398 /* Exported macro ------------------------------------------------------------*/
bogdanm 89:552587b429a1 399
bogdanm 92:4fc01daae5a5 400 /** @defgroup SD_Exported_macros
bogdanm 89:552587b429a1 401 * @brief macros to handle interrupts and specific clock configurations
bogdanm 89:552587b429a1 402 * @{
bogdanm 89:552587b429a1 403 */
bogdanm 89:552587b429a1 404
bogdanm 89:552587b429a1 405 /**
bogdanm 89:552587b429a1 406 * @brief Enable the SD device.
bogdanm 89:552587b429a1 407 * @retval None
bogdanm 89:552587b429a1 408 */
bogdanm 89:552587b429a1 409 #define __HAL_SD_SDIO_ENABLE() __SDIO_ENABLE()
bogdanm 89:552587b429a1 410
bogdanm 89:552587b429a1 411 /**
bogdanm 89:552587b429a1 412 * @brief Disable the SD device.
bogdanm 89:552587b429a1 413 * @retval None
bogdanm 89:552587b429a1 414 */
bogdanm 89:552587b429a1 415 #define __HAL_SD_SDIO_DISABLE() __SDIO_DISABLE()
bogdanm 89:552587b429a1 416
bogdanm 89:552587b429a1 417 /**
bogdanm 89:552587b429a1 418 * @brief Enable the SDIO DMA transfer.
bogdanm 89:552587b429a1 419 * @retval None
bogdanm 89:552587b429a1 420 */
bogdanm 89:552587b429a1 421 #define __HAL_SD_SDIO_DMA_ENABLE() __SDIO_DMA_ENABLE()
bogdanm 89:552587b429a1 422
bogdanm 89:552587b429a1 423 /**
bogdanm 89:552587b429a1 424 * @brief Disable the SDIO DMA transfer.
bogdanm 89:552587b429a1 425 * @retval None
bogdanm 89:552587b429a1 426 */
bogdanm 89:552587b429a1 427 #define __HAL_SD_SDIO_DMA_DISABLE() __SDIO_DMA_DISABLE()
bogdanm 89:552587b429a1 428
bogdanm 89:552587b429a1 429 /**
bogdanm 89:552587b429a1 430 * @brief Enable the SD device interrupt.
bogdanm 89:552587b429a1 431 * @param __HANDLE__: SD Handle
bogdanm 89:552587b429a1 432 * @param __INTERRUPT__: specifies the SDIO interrupt sources to be enabled.
bogdanm 89:552587b429a1 433 * This parameter can be one or a combination of the following values:
bogdanm 89:552587b429a1 434 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
bogdanm 89:552587b429a1 435 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
bogdanm 89:552587b429a1 436 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
bogdanm 89:552587b429a1 437 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
bogdanm 89:552587b429a1 438 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
bogdanm 89:552587b429a1 439 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
bogdanm 89:552587b429a1 440 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
bogdanm 89:552587b429a1 441 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
bogdanm 89:552587b429a1 442 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
bogdanm 89:552587b429a1 443 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
bogdanm 89:552587b429a1 444 * bus mode interrupt
bogdanm 89:552587b429a1 445 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
bogdanm 89:552587b429a1 446 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
bogdanm 89:552587b429a1 447 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
bogdanm 89:552587b429a1 448 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
bogdanm 89:552587b429a1 449 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
bogdanm 89:552587b429a1 450 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
bogdanm 89:552587b429a1 451 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
bogdanm 89:552587b429a1 452 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
bogdanm 89:552587b429a1 453 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
bogdanm 89:552587b429a1 454 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
bogdanm 89:552587b429a1 455 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
bogdanm 89:552587b429a1 456 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
bogdanm 89:552587b429a1 457 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
bogdanm 89:552587b429a1 458 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
bogdanm 89:552587b429a1 459 * @retval None
bogdanm 89:552587b429a1 460 */
bogdanm 89:552587b429a1 461 #define __HAL_SD_SDIO_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
bogdanm 89:552587b429a1 462
bogdanm 89:552587b429a1 463 /**
bogdanm 89:552587b429a1 464 * @brief Disable the SD device interrupt.
bogdanm 89:552587b429a1 465 * @param __HANDLE__: SD Handle
bogdanm 89:552587b429a1 466 * @param __INTERRUPT__: specifies the SDIO interrupt sources to be disabled.
bogdanm 89:552587b429a1 467 * This parameter can be one or a combination of the following values:
bogdanm 89:552587b429a1 468 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
bogdanm 89:552587b429a1 469 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
bogdanm 89:552587b429a1 470 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
bogdanm 89:552587b429a1 471 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
bogdanm 89:552587b429a1 472 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
bogdanm 89:552587b429a1 473 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
bogdanm 89:552587b429a1 474 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
bogdanm 89:552587b429a1 475 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
bogdanm 89:552587b429a1 476 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
bogdanm 89:552587b429a1 477 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
bogdanm 89:552587b429a1 478 * bus mode interrupt
bogdanm 89:552587b429a1 479 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
bogdanm 89:552587b429a1 480 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
bogdanm 89:552587b429a1 481 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
bogdanm 89:552587b429a1 482 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
bogdanm 89:552587b429a1 483 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
bogdanm 89:552587b429a1 484 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
bogdanm 89:552587b429a1 485 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
bogdanm 89:552587b429a1 486 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
bogdanm 89:552587b429a1 487 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
bogdanm 89:552587b429a1 488 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
bogdanm 89:552587b429a1 489 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
bogdanm 89:552587b429a1 490 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
bogdanm 89:552587b429a1 491 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
bogdanm 89:552587b429a1 492 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
bogdanm 89:552587b429a1 493 * @retval None
bogdanm 89:552587b429a1 494 */
bogdanm 89:552587b429a1 495 #define __HAL_SD_SDIO_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
bogdanm 89:552587b429a1 496
bogdanm 89:552587b429a1 497 /**
bogdanm 89:552587b429a1 498 * @brief Check whether the specified SD flag is set or not.
bogdanm 89:552587b429a1 499 * @param __HANDLE__: SD Handle
bogdanm 89:552587b429a1 500 * @param __FLAG__: specifies the flag to check.
bogdanm 89:552587b429a1 501 * This parameter can be one of the following values:
bogdanm 89:552587b429a1 502 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
bogdanm 89:552587b429a1 503 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
bogdanm 89:552587b429a1 504 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
bogdanm 89:552587b429a1 505 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
bogdanm 89:552587b429a1 506 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
bogdanm 89:552587b429a1 507 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
bogdanm 89:552587b429a1 508 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
bogdanm 89:552587b429a1 509 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
bogdanm 89:552587b429a1 510 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
bogdanm 89:552587b429a1 511 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode.
bogdanm 89:552587b429a1 512 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
bogdanm 89:552587b429a1 513 * @arg SDIO_FLAG_CMDACT: Command transfer in progress
bogdanm 89:552587b429a1 514 * @arg SDIO_FLAG_TXACT: Data transmit in progress
bogdanm 89:552587b429a1 515 * @arg SDIO_FLAG_RXACT: Data receive in progress
bogdanm 89:552587b429a1 516 * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty
bogdanm 89:552587b429a1 517 * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full
bogdanm 89:552587b429a1 518 * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full
bogdanm 89:552587b429a1 519 * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full
bogdanm 89:552587b429a1 520 * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty
bogdanm 89:552587b429a1 521 * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty
bogdanm 89:552587b429a1 522 * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO
bogdanm 89:552587b429a1 523 * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO
bogdanm 89:552587b429a1 524 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
bogdanm 89:552587b429a1 525 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
bogdanm 89:552587b429a1 526 * @retval The new state of SD FLAG (SET or RESET).
bogdanm 89:552587b429a1 527 */
bogdanm 89:552587b429a1 528 #define __HAL_SD_SDIO_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
bogdanm 89:552587b429a1 529
bogdanm 89:552587b429a1 530 /**
bogdanm 89:552587b429a1 531 * @brief Clear the SD's pending flags.
bogdanm 89:552587b429a1 532 * @param __HANDLE__: SD Handle
bogdanm 89:552587b429a1 533 * @param __FLAG__: specifies the flag to clear.
bogdanm 89:552587b429a1 534 * This parameter can be one or a combination of the following values:
bogdanm 89:552587b429a1 535 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
bogdanm 89:552587b429a1 536 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
bogdanm 89:552587b429a1 537 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
bogdanm 89:552587b429a1 538 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
bogdanm 89:552587b429a1 539 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
bogdanm 89:552587b429a1 540 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
bogdanm 89:552587b429a1 541 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
bogdanm 89:552587b429a1 542 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
bogdanm 89:552587b429a1 543 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
bogdanm 89:552587b429a1 544 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode
bogdanm 89:552587b429a1 545 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
bogdanm 89:552587b429a1 546 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
bogdanm 89:552587b429a1 547 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
bogdanm 89:552587b429a1 548 * @retval None
bogdanm 89:552587b429a1 549 */
bogdanm 89:552587b429a1 550 #define __HAL_SD_SDIO_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
bogdanm 89:552587b429a1 551
bogdanm 89:552587b429a1 552 /**
bogdanm 89:552587b429a1 553 * @brief Check whether the specified SD interrupt has occurred or not.
bogdanm 89:552587b429a1 554 * @param __HANDLE__: SD Handle
bogdanm 89:552587b429a1 555 * @param __INTERRUPT__: specifies the SDIO interrupt source to check.
bogdanm 89:552587b429a1 556 * This parameter can be one of the following values:
bogdanm 89:552587b429a1 557 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
bogdanm 89:552587b429a1 558 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
bogdanm 89:552587b429a1 559 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
bogdanm 89:552587b429a1 560 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
bogdanm 89:552587b429a1 561 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
bogdanm 89:552587b429a1 562 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
bogdanm 89:552587b429a1 563 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
bogdanm 89:552587b429a1 564 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
bogdanm 89:552587b429a1 565 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
bogdanm 89:552587b429a1 566 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
bogdanm 89:552587b429a1 567 * bus mode interrupt
bogdanm 89:552587b429a1 568 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
bogdanm 89:552587b429a1 569 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
bogdanm 89:552587b429a1 570 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
bogdanm 89:552587b429a1 571 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
bogdanm 89:552587b429a1 572 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
bogdanm 89:552587b429a1 573 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
bogdanm 89:552587b429a1 574 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
bogdanm 89:552587b429a1 575 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
bogdanm 89:552587b429a1 576 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
bogdanm 89:552587b429a1 577 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
bogdanm 89:552587b429a1 578 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
bogdanm 89:552587b429a1 579 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
bogdanm 89:552587b429a1 580 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
bogdanm 89:552587b429a1 581 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
bogdanm 89:552587b429a1 582 * @retval The new state of SD IT (SET or RESET).
bogdanm 89:552587b429a1 583 */
bogdanm 89:552587b429a1 584 #define __HAL_SD_SDIO_GET_IT (__HANDLE__, __INTERRUPT__) __SDIO_GET_IT ((__HANDLE__)->Instance, __INTERRUPT__)
bogdanm 89:552587b429a1 585
bogdanm 89:552587b429a1 586 /**
bogdanm 89:552587b429a1 587 * @brief Clear the SD's interrupt pending bits.
bogdanm 89:552587b429a1 588 * @param __HANDLE__ : SD Handle
bogdanm 89:552587b429a1 589 * @param __INTERRUPT__: specifies the interrupt pending bit to clear.
bogdanm 89:552587b429a1 590 * This parameter can be one or a combination of the following values:
bogdanm 89:552587b429a1 591 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
bogdanm 89:552587b429a1 592 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
bogdanm 89:552587b429a1 593 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
bogdanm 89:552587b429a1 594 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
bogdanm 89:552587b429a1 595 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
bogdanm 89:552587b429a1 596 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
bogdanm 89:552587b429a1 597 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
bogdanm 89:552587b429a1 598 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
bogdanm 89:552587b429a1 599 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIO_DCOUNT, is zero) interrupt
bogdanm 89:552587b429a1 600 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
bogdanm 89:552587b429a1 601 * bus mode interrupt
bogdanm 89:552587b429a1 602 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
bogdanm 89:552587b429a1 603 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61
bogdanm 89:552587b429a1 604 * @retval None
bogdanm 89:552587b429a1 605 */
bogdanm 89:552587b429a1 606 #define __HAL_SD_SDIO_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
bogdanm 89:552587b429a1 607 /**
bogdanm 89:552587b429a1 608 * @}
bogdanm 89:552587b429a1 609 */
bogdanm 89:552587b429a1 610
bogdanm 89:552587b429a1 611 /* Exported functions --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 612 /** @addtogroup SD_Exported_Functions
bogdanm 92:4fc01daae5a5 613 * @{
bogdanm 92:4fc01daae5a5 614 */
bogdanm 92:4fc01daae5a5 615
bogdanm 92:4fc01daae5a5 616 /* Initialization/de-initialization functions ********************************/
bogdanm 92:4fc01daae5a5 617 /** @addtogroup SD_Group1
bogdanm 92:4fc01daae5a5 618 * @{
bogdanm 92:4fc01daae5a5 619 */
bogdanm 89:552587b429a1 620 HAL_SD_ErrorTypedef HAL_SD_Init(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *SDCardInfo);
bogdanm 89:552587b429a1 621 HAL_StatusTypeDef HAL_SD_DeInit (SD_HandleTypeDef *hsd);
bogdanm 89:552587b429a1 622 void HAL_SD_MspInit(SD_HandleTypeDef *hsd);
bogdanm 89:552587b429a1 623 void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd);
bogdanm 92:4fc01daae5a5 624 /**
bogdanm 92:4fc01daae5a5 625 * @}
bogdanm 92:4fc01daae5a5 626 */
bogdanm 92:4fc01daae5a5 627
bogdanm 92:4fc01daae5a5 628 /* I/O operation functions ***************************************************/
bogdanm 92:4fc01daae5a5 629 /** @addtogroup SD_Group2
bogdanm 92:4fc01daae5a5 630 * @{
bogdanm 92:4fc01daae5a5 631 */
bogdanm 89:552587b429a1 632 /* Blocking mode: Polling */
bogdanm 89:552587b429a1 633 HAL_SD_ErrorTypedef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
bogdanm 89:552587b429a1 634 HAL_SD_ErrorTypedef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
bogdanm 89:552587b429a1 635 HAL_SD_ErrorTypedef HAL_SD_Erase(SD_HandleTypeDef *hsd, uint64_t startaddr, uint64_t endaddr);
bogdanm 89:552587b429a1 636
bogdanm 89:552587b429a1 637 /* Non-Blocking mode: Interrupt */
bogdanm 89:552587b429a1 638 void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd);
bogdanm 89:552587b429a1 639
bogdanm 89:552587b429a1 640 /* Callback in non blocking modes (DMA) */
bogdanm 89:552587b429a1 641 void HAL_SD_DMA_RxCpltCallback(DMA_HandleTypeDef *hdma);
bogdanm 89:552587b429a1 642 void HAL_SD_DMA_RxErrorCallback(DMA_HandleTypeDef *hdma);
bogdanm 89:552587b429a1 643 void HAL_SD_DMA_TxCpltCallback(DMA_HandleTypeDef *hdma);
bogdanm 89:552587b429a1 644 void HAL_SD_DMA_TxErrorCallback(DMA_HandleTypeDef *hdma);
bogdanm 89:552587b429a1 645 void HAL_SD_XferCpltCallback(SD_HandleTypeDef *hsd);
bogdanm 89:552587b429a1 646 void HAL_SD_XferErrorCallback(SD_HandleTypeDef *hsd);
bogdanm 89:552587b429a1 647
bogdanm 89:552587b429a1 648 /* Non-Blocking mode: DMA */
bogdanm 89:552587b429a1 649 HAL_SD_ErrorTypedef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
bogdanm 89:552587b429a1 650 HAL_SD_ErrorTypedef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
bogdanm 89:552587b429a1 651 HAL_SD_ErrorTypedef HAL_SD_CheckWriteOperation(SD_HandleTypeDef *hsd, uint32_t Timeout);
bogdanm 89:552587b429a1 652 HAL_SD_ErrorTypedef HAL_SD_CheckReadOperation(SD_HandleTypeDef *hsd, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 653 /**
bogdanm 92:4fc01daae5a5 654 * @}
bogdanm 92:4fc01daae5a5 655 */
bogdanm 92:4fc01daae5a5 656
bogdanm 92:4fc01daae5a5 657 /* Peripheral Control functions **********************************************/
bogdanm 92:4fc01daae5a5 658 /** @addtogroup SD_Group3
bogdanm 92:4fc01daae5a5 659 * @{
bogdanm 92:4fc01daae5a5 660 */
bogdanm 89:552587b429a1 661 HAL_SD_ErrorTypedef HAL_SD_Get_CardInfo(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *pCardInfo);
bogdanm 89:552587b429a1 662 HAL_SD_ErrorTypedef HAL_SD_WideBusOperation_Config(SD_HandleTypeDef *hsd, uint32_t WideMode);
bogdanm 89:552587b429a1 663 HAL_SD_ErrorTypedef HAL_SD_StopTransfer(SD_HandleTypeDef *hsd);
bogdanm 89:552587b429a1 664 HAL_SD_ErrorTypedef HAL_SD_HighSpeed (SD_HandleTypeDef *hsd);
bogdanm 92:4fc01daae5a5 665 /**
bogdanm 92:4fc01daae5a5 666 * @}
bogdanm 92:4fc01daae5a5 667 */
bogdanm 92:4fc01daae5a5 668
bogdanm 92:4fc01daae5a5 669 /* Peripheral State functions ************************************************/
bogdanm 92:4fc01daae5a5 670 /** @addtogroup SD_Group4
bogdanm 92:4fc01daae5a5 671 * @{
bogdanm 92:4fc01daae5a5 672 */
bogdanm 89:552587b429a1 673 HAL_SD_ErrorTypedef HAL_SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus);
bogdanm 89:552587b429a1 674 HAL_SD_ErrorTypedef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypedef *pCardStatus);
bogdanm 89:552587b429a1 675 HAL_SD_TransferStateTypedef HAL_SD_GetStatus(SD_HandleTypeDef *hsd);
bogdanm 92:4fc01daae5a5 676 /**
bogdanm 92:4fc01daae5a5 677 * @}
bogdanm 92:4fc01daae5a5 678 */
bogdanm 92:4fc01daae5a5 679
bogdanm 92:4fc01daae5a5 680 /**
bogdanm 92:4fc01daae5a5 681 * @}
bogdanm 92:4fc01daae5a5 682 */
bogdanm 92:4fc01daae5a5 683
bogdanm 89:552587b429a1 684 /**
bogdanm 89:552587b429a1 685 * @}
bogdanm 89:552587b429a1 686 */
bogdanm 89:552587b429a1 687
bogdanm 89:552587b429a1 688 /**
bogdanm 89:552587b429a1 689 * @}
bogdanm 89:552587b429a1 690 */
bogdanm 89:552587b429a1 691
bogdanm 89:552587b429a1 692 #ifdef __cplusplus
bogdanm 89:552587b429a1 693 }
bogdanm 89:552587b429a1 694 #endif
bogdanm 89:552587b429a1 695
bogdanm 89:552587b429a1 696
bogdanm 89:552587b429a1 697 #endif /* __STM32F4xx_HAL_SD_H */
bogdanm 89:552587b429a1 698
bogdanm 89:552587b429a1 699 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/