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TARGET_ARCH_MAX/stm32f4xx_hal_hash.h@98:01a414ca7d6d, 2015-04-08 (annotated)

Committer:
yusuke_kyo
Date:
Wed Apr 08 08:04:18 2015 +0000
Revision:
98:01a414ca7d6d
Parent:
92:4fc01daae5a5 
remove SerialHalfDuplex.h

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 89:552587b429a1 1 /**
bogdanm 89:552587b429a1 2 ******************************************************************************
bogdanm 89:552587b429a1 3 * @file stm32f4xx_hal_hash.h
bogdanm 89:552587b429a1 4 * @author MCD Application Team
bogdanm 92:4fc01daae5a5 5 * @version V1.1.0
bogdanm 92:4fc01daae5a5 6 * @date 19-June-2014
bogdanm 89:552587b429a1 7 * @brief Header file of HASH HAL module.
bogdanm 89:552587b429a1 8 ******************************************************************************
bogdanm 89:552587b429a1 9 * @attention
bogdanm 89:552587b429a1 10 *
bogdanm 89:552587b429a1 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 89:552587b429a1 12 *
bogdanm 89:552587b429a1 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 89:552587b429a1 14 * are permitted provided that the following conditions are met:
bogdanm 89:552587b429a1 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 89:552587b429a1 16 * this list of conditions and the following disclaimer.
bogdanm 89:552587b429a1 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 89:552587b429a1 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 89:552587b429a1 19 * and/or other materials provided with the distribution.
bogdanm 89:552587b429a1 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 89:552587b429a1 21 * may be used to endorse or promote products derived from this software
bogdanm 89:552587b429a1 22 * without specific prior written permission.
bogdanm 89:552587b429a1 23 *
bogdanm 89:552587b429a1 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 89:552587b429a1 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 89:552587b429a1 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 89:552587b429a1 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 89:552587b429a1 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 89:552587b429a1 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 89:552587b429a1 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 89:552587b429a1 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 89:552587b429a1 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 89:552587b429a1 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 89:552587b429a1 34 *
bogdanm 89:552587b429a1 35 ******************************************************************************
bogdanm 89:552587b429a1 36 */
bogdanm 89:552587b429a1 37
bogdanm 89:552587b429a1 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 89:552587b429a1 39 #ifndef __STM32F4xx_HAL_HASH_H
bogdanm 89:552587b429a1 40 #define __STM32F4xx_HAL_HASH_H
bogdanm 89:552587b429a1 41
bogdanm 89:552587b429a1 42 #ifdef __cplusplus
bogdanm 89:552587b429a1 43 extern "C" {
bogdanm 89:552587b429a1 44 #endif
bogdanm 89:552587b429a1 45
bogdanm 89:552587b429a1 46 #if defined(STM32F415xx) || defined(STM32F417xx) || defined(STM32F437xx) || defined(STM32F439xx)
bogdanm 89:552587b429a1 47
bogdanm 89:552587b429a1 48 /* Includes ------------------------------------------------------------------*/
bogdanm 89:552587b429a1 49 #include "stm32f4xx_hal_def.h"
bogdanm 89:552587b429a1 50
bogdanm 89:552587b429a1 51 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 89:552587b429a1 52 * @{
bogdanm 89:552587b429a1 53 */
bogdanm 89:552587b429a1 54
bogdanm 89:552587b429a1 55 /** @addtogroup HASH
bogdanm 89:552587b429a1 56 * @{
bogdanm 89:552587b429a1 57 */
bogdanm 89:552587b429a1 58
bogdanm 89:552587b429a1 59 /* Exported types ------------------------------------------------------------*/
bogdanm 89:552587b429a1 60
bogdanm 89:552587b429a1 61 /**
bogdanm 89:552587b429a1 62 * @brief HASH Configuration Structure definition
bogdanm 89:552587b429a1 63 */
bogdanm 89:552587b429a1 64 typedef struct
bogdanm 89:552587b429a1 65 {
bogdanm 89:552587b429a1 66 uint32_t DataType; /*!< 32-bit data, 16-bit data, 8-bit data or 1-bit string.
bogdanm 89:552587b429a1 67 This parameter can be a value of @ref HASH_Data_Type */
bogdanm 89:552587b429a1 68
bogdanm 89:552587b429a1 69 uint32_t KeySize; /*!< The key size is used only in HMAC operation */
bogdanm 89:552587b429a1 70
bogdanm 89:552587b429a1 71 uint8_t* pKey; /*!< The key is used only in HMAC operation */
bogdanm 89:552587b429a1 72 }HASH_InitTypeDef;
bogdanm 89:552587b429a1 73
bogdanm 89:552587b429a1 74 /**
bogdanm 89:552587b429a1 75 * @brief HAL State structures definition
bogdanm 89:552587b429a1 76 */
bogdanm 89:552587b429a1 77 typedef enum
bogdanm 89:552587b429a1 78 {
bogdanm 89:552587b429a1 79 HAL_HASH_STATE_RESET = 0x00, /*!< HASH not yet initialized or disabled */
bogdanm 89:552587b429a1 80 HAL_HASH_STATE_READY = 0x01, /*!< HASH initialized and ready for use */
bogdanm 89:552587b429a1 81 HAL_HASH_STATE_BUSY = 0x02, /*!< HASH internal process is ongoing */
bogdanm 89:552587b429a1 82 HAL_HASH_STATE_TIMEOUT = 0x03, /*!< HASH timeout state */
bogdanm 89:552587b429a1 83 HAL_HASH_STATE_ERROR = 0x04 /*!< HASH error state */
bogdanm 89:552587b429a1 84 }HAL_HASH_STATETypeDef;
bogdanm 89:552587b429a1 85
bogdanm 89:552587b429a1 86 /**
bogdanm 89:552587b429a1 87 * @brief HAL phase structures definition
bogdanm 89:552587b429a1 88 */
bogdanm 89:552587b429a1 89 typedef enum
bogdanm 89:552587b429a1 90 {
bogdanm 89:552587b429a1 91 HAL_HASH_PHASE_READY = 0x01, /*!< HASH peripheral is ready for initialization */
bogdanm 89:552587b429a1 92 HAL_HASH_PHASE_PROCESS = 0x02, /*!< HASH peripheral is in processing phase */
bogdanm 89:552587b429a1 93 }HAL_HASHPhaseTypeDef;
bogdanm 89:552587b429a1 94
bogdanm 89:552587b429a1 95 /**
bogdanm 89:552587b429a1 96 * @brief HASH Handle Structure definition
bogdanm 89:552587b429a1 97 */
bogdanm 89:552587b429a1 98 typedef struct
bogdanm 89:552587b429a1 99 {
bogdanm 89:552587b429a1 100 HASH_InitTypeDef Init; /*!< HASH required parameters */
bogdanm 89:552587b429a1 101
bogdanm 89:552587b429a1 102 uint8_t *pHashInBuffPtr; /*!< Pointer to input buffer */
bogdanm 89:552587b429a1 103
bogdanm 89:552587b429a1 104 uint8_t *pHashOutBuffPtr; /*!< Pointer to input buffer */
bogdanm 89:552587b429a1 105
bogdanm 89:552587b429a1 106 __IO uint32_t HashBuffSize; /*!< Size of buffer to be processed */
bogdanm 89:552587b429a1 107
bogdanm 89:552587b429a1 108 __IO uint32_t HashInCount; /*!< Counter of inputed data */
bogdanm 89:552587b429a1 109
bogdanm 89:552587b429a1 110 __IO uint32_t HashITCounter; /*!< Counter of issued interrupts */
bogdanm 89:552587b429a1 111
bogdanm 89:552587b429a1 112 HAL_StatusTypeDef Status; /*!< HASH peripheral status */
bogdanm 89:552587b429a1 113
bogdanm 89:552587b429a1 114 HAL_HASHPhaseTypeDef Phase; /*!< HASH peripheral phase */
bogdanm 89:552587b429a1 115
bogdanm 89:552587b429a1 116 DMA_HandleTypeDef *hdmain; /*!< HASH In DMA handle parameters */
bogdanm 89:552587b429a1 117
bogdanm 89:552587b429a1 118 HAL_LockTypeDef Lock; /*!< HASH locking object */
bogdanm 89:552587b429a1 119
bogdanm 89:552587b429a1 120 __IO HAL_HASH_STATETypeDef State; /*!< HASH peripheral state */
bogdanm 89:552587b429a1 121 } HASH_HandleTypeDef;
bogdanm 89:552587b429a1 122
bogdanm 89:552587b429a1 123 /* Exported constants --------------------------------------------------------*/
bogdanm 89:552587b429a1 124
bogdanm 89:552587b429a1 125 /** @defgroup HASH_Exported_Constants
bogdanm 89:552587b429a1 126 * @{
bogdanm 89:552587b429a1 127 */
bogdanm 89:552587b429a1 128
bogdanm 89:552587b429a1 129 /** @defgroup HASH_Algo_Selection
bogdanm 89:552587b429a1 130 * @{
bogdanm 89:552587b429a1 131 */
bogdanm 89:552587b429a1 132 #define HASH_AlgoSelection_SHA1 ((uint32_t)0x0000) /*!< HASH function is SHA1 */
bogdanm 89:552587b429a1 133 #define HASH_AlgoSelection_SHA224 HASH_CR_ALGO_1 /*!< HASH function is SHA224 */
bogdanm 89:552587b429a1 134 #define HASH_AlgoSelection_SHA256 HASH_CR_ALGO /*!< HASH function is SHA256 */
bogdanm 89:552587b429a1 135 #define HASH_AlgoSelection_MD5 HASH_CR_ALGO_0 /*!< HASH function is MD5 */
bogdanm 89:552587b429a1 136
bogdanm 89:552587b429a1 137 #define IS_HASH_ALGOSELECTION(ALGOSELECTION) (((ALGOSELECTION) == HASH_AlgoSelection_SHA1) || \
bogdanm 89:552587b429a1 138 ((ALGOSELECTION) == HASH_AlgoSelection_SHA224) || \
bogdanm 89:552587b429a1 139 ((ALGOSELECTION) == HASH_AlgoSelection_SHA256) || \
bogdanm 89:552587b429a1 140 ((ALGOSELECTION) == HASH_AlgoSelection_MD5))
bogdanm 89:552587b429a1 141 /**
bogdanm 89:552587b429a1 142 * @}
bogdanm 89:552587b429a1 143 */
bogdanm 89:552587b429a1 144
bogdanm 89:552587b429a1 145 /** @defgroup HASH_Algorithm_Mode
bogdanm 89:552587b429a1 146 * @{
bogdanm 89:552587b429a1 147 */
bogdanm 89:552587b429a1 148 #define HASH_AlgoMode_HASH ((uint32_t)0x00000000) /*!< Algorithm is HASH */
bogdanm 89:552587b429a1 149 #define HASH_AlgoMode_HMAC HASH_CR_MODE /*!< Algorithm is HMAC */
bogdanm 89:552587b429a1 150
bogdanm 89:552587b429a1 151 #define IS_HASH_ALGOMODE(ALGOMODE) (((ALGOMODE) == HASH_AlgoMode_HASH) || \
bogdanm 89:552587b429a1 152 ((ALGOMODE) == HASH_AlgoMode_HMAC))
bogdanm 89:552587b429a1 153 /**
bogdanm 89:552587b429a1 154 * @}
bogdanm 89:552587b429a1 155 */
bogdanm 89:552587b429a1 156
bogdanm 89:552587b429a1 157 /** @defgroup HASH_Data_Type
bogdanm 89:552587b429a1 158 * @{
bogdanm 89:552587b429a1 159 */
bogdanm 89:552587b429a1 160 #define HASH_DATATYPE_32B ((uint32_t)0x0000) /*!< 32-bit data. No swapping */
bogdanm 89:552587b429a1 161 #define HASH_DATATYPE_16B HASH_CR_DATATYPE_0 /*!< 16-bit data. Each half word is swapped */
bogdanm 89:552587b429a1 162 #define HASH_DATATYPE_8B HASH_CR_DATATYPE_1 /*!< 8-bit data. All bytes are swapped */
bogdanm 89:552587b429a1 163 #define HASH_DATATYPE_1B HASH_CR_DATATYPE /*!< 1-bit data. In the word all bits are swapped */
bogdanm 89:552587b429a1 164
bogdanm 89:552587b429a1 165 #define IS_HASH_DATATYPE(DATATYPE) (((DATATYPE) == HASH_DATATYPE_32B)|| \
bogdanm 89:552587b429a1 166 ((DATATYPE) == HASH_DATATYPE_16B)|| \
bogdanm 89:552587b429a1 167 ((DATATYPE) == HASH_DATATYPE_8B) || \
bogdanm 89:552587b429a1 168 ((DATATYPE) == HASH_DATATYPE_1B))
bogdanm 89:552587b429a1 169 /**
bogdanm 89:552587b429a1 170 * @}
bogdanm 89:552587b429a1 171 */
bogdanm 89:552587b429a1 172
bogdanm 89:552587b429a1 173 /** @defgroup HASH_HMAC_Long_key_only_for_HMAC_mode
bogdanm 89:552587b429a1 174 * @{
bogdanm 89:552587b429a1 175 */
bogdanm 89:552587b429a1 176 #define HASH_HMACKeyType_ShortKey ((uint32_t)0x00000000) /*!< HMAC Key is <= 64 bytes */
bogdanm 89:552587b429a1 177 #define HASH_HMACKeyType_LongKey HASH_CR_LKEY /*!< HMAC Key is > 64 bytes */
bogdanm 89:552587b429a1 178
bogdanm 89:552587b429a1 179 #define IS_HASH_HMAC_KEYTYPE(KEYTYPE) (((KEYTYPE) == HASH_HMACKeyType_ShortKey) || \
bogdanm 89:552587b429a1 180 ((KEYTYPE) == HASH_HMACKeyType_LongKey))
bogdanm 89:552587b429a1 181 /**
bogdanm 89:552587b429a1 182 * @}
bogdanm 89:552587b429a1 183 */
bogdanm 89:552587b429a1 184
bogdanm 89:552587b429a1 185 /** @defgroup HASH_flags_definition
bogdanm 89:552587b429a1 186 * @{
bogdanm 89:552587b429a1 187 */
bogdanm 89:552587b429a1 188 #define HASH_FLAG_DINIS HASH_SR_DINIS /*!< 16 locations are free in the DIN : A new block can be entered into the input buffer */
bogdanm 89:552587b429a1 189 #define HASH_FLAG_DCIS HASH_SR_DCIS /*!< Digest calculation complete */
bogdanm 89:552587b429a1 190 #define HASH_FLAG_DMAS HASH_SR_DMAS /*!< DMA interface is enabled (DMAE=1) or a transfer is ongoing */
bogdanm 89:552587b429a1 191 #define HASH_FLAG_BUSY HASH_SR_BUSY /*!< The hash core is Busy : processing a block of data */
bogdanm 89:552587b429a1 192 #define HASH_FLAG_DINNE HASH_CR_DINNE /*!< DIN not empty : The input buffer contains at least one word of data */
bogdanm 89:552587b429a1 193 /**
bogdanm 89:552587b429a1 194 * @}
bogdanm 89:552587b429a1 195 */
bogdanm 89:552587b429a1 196
bogdanm 89:552587b429a1 197 /** @defgroup HASH_interrupts_definition
bogdanm 89:552587b429a1 198 * @{
bogdanm 89:552587b429a1 199 */
bogdanm 89:552587b429a1 200 #define HASH_IT_DINI HASH_IMR_DINIM /*!< A new block can be entered into the input buffer (DIN) */
bogdanm 89:552587b429a1 201 #define HASH_IT_DCI HASH_IMR_DCIM /*!< Digest calculation complete */
bogdanm 89:552587b429a1 202 /**
bogdanm 89:552587b429a1 203 * @}
bogdanm 89:552587b429a1 204 */
bogdanm 89:552587b429a1 205
bogdanm 89:552587b429a1 206 /**
bogdanm 89:552587b429a1 207 * @}
bogdanm 89:552587b429a1 208 */
bogdanm 89:552587b429a1 209
bogdanm 89:552587b429a1 210 /* Exported macro ------------------------------------------------------------*/
bogdanm 89:552587b429a1 211
bogdanm 89:552587b429a1 212 /** @brief Reset HASH handle state
bogdanm 89:552587b429a1 213 * @param __HANDLE__: specifies the HASH handle.
bogdanm 89:552587b429a1 214 * @retval None
bogdanm 89:552587b429a1 215 */
bogdanm 89:552587b429a1 216 #define __HAL_HASH_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_HASH_STATE_RESET)
bogdanm 89:552587b429a1 217
bogdanm 89:552587b429a1 218 /** @brief Check whether the specified HASH flag is set or not.
bogdanm 89:552587b429a1 219 * @param __FLAG__: specifies the flag to check.
bogdanm 89:552587b429a1 220 * This parameter can be one of the following values:
bogdanm 89:552587b429a1 221 * @arg HASH_FLAG_DINIS: A new block can be entered into the input buffer.
bogdanm 89:552587b429a1 222 * @arg HASH_FLAG_DCIS: Digest calculation complete
bogdanm 89:552587b429a1 223 * @arg HASH_FLAG_DMAS: DMA interface is enabled (DMAE=1) or a transfer is ongoing
bogdanm 89:552587b429a1 224 * @arg HASH_FLAG_BUSY: The hash core is Busy : processing a block of data
bogdanm 89:552587b429a1 225 * @arg HASH_FLAG_DINNE: DIN not empty : The input buffer contains at least one word of data
bogdanm 89:552587b429a1 226 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 89:552587b429a1 227 */
bogdanm 89:552587b429a1 228 #define __HAL_HASH_GET_FLAG(__FLAG__) ((HASH->SR & (__FLAG__)) == (__FLAG__))
bogdanm 89:552587b429a1 229
bogdanm 89:552587b429a1 230 /**
bogdanm 89:552587b429a1 231 * @brief Macros for HMAC finish.
bogdanm 89:552587b429a1 232 * @param None
bogdanm 89:552587b429a1 233 * @retval None
bogdanm 89:552587b429a1 234 */
bogdanm 89:552587b429a1 235 #define HAL_HMAC_MD5_Finish HAL_HASH_MD5_Finish
bogdanm 89:552587b429a1 236 #define HAL_HMAC_SHA1_Finish HAL_HASH_SHA1_Finish
bogdanm 89:552587b429a1 237 #define HAL_HMAC_SHA224_Finish HAL_HASH_SHA224_Finish
bogdanm 89:552587b429a1 238 #define HAL_HMAC_SHA256_Finish HAL_HASH_SHA256_Finish
bogdanm 89:552587b429a1 239
bogdanm 89:552587b429a1 240 /**
bogdanm 89:552587b429a1 241 * @brief Enable the multiple DMA mode.
bogdanm 89:552587b429a1 242 * This feature is available only in STM32F429x and STM32F439x devices.
bogdanm 89:552587b429a1 243 * @param None
bogdanm 89:552587b429a1 244 * @retval None
bogdanm 89:552587b429a1 245 */
bogdanm 89:552587b429a1 246 #define __HAL_HASH_SET_MDMAT() HASH->CR |= HASH_CR_MDMAT
bogdanm 89:552587b429a1 247
bogdanm 89:552587b429a1 248 /**
bogdanm 89:552587b429a1 249 * @brief Disable the multiple DMA mode.
bogdanm 89:552587b429a1 250 * @param None
bogdanm 89:552587b429a1 251 * @retval None
bogdanm 89:552587b429a1 252 */
bogdanm 89:552587b429a1 253 #define __HAL_HASH_RESET_MDMAT() HASH->CR &= (uint32_t)(~HASH_CR_MDMAT)
bogdanm 89:552587b429a1 254
bogdanm 89:552587b429a1 255 /**
bogdanm 89:552587b429a1 256 * @brief Start the digest computation
bogdanm 89:552587b429a1 257 * @param None
bogdanm 89:552587b429a1 258 * @retval None
bogdanm 89:552587b429a1 259 */
bogdanm 89:552587b429a1 260 #define __HAL_HASH_START_DIGEST() HASH->STR |= HASH_STR_DCAL
bogdanm 89:552587b429a1 261
bogdanm 89:552587b429a1 262 /**
bogdanm 89:552587b429a1 263 * @brief Set the number of valid bits in last word written in Data register
bogdanm 89:552587b429a1 264 * @param SIZE: size in byte of last data written in Data register.
bogdanm 89:552587b429a1 265 * @retval None
bogdanm 89:552587b429a1 266 */
bogdanm 89:552587b429a1 267 #define __HAL_HASH_SET_NBVALIDBITS(SIZE) do{HASH->STR &= ~(HASH_STR_NBW);\
bogdanm 89:552587b429a1 268 HASH->STR |= 8 * ((SIZE) % 4);\
bogdanm 89:552587b429a1 269 }while(0)
bogdanm 89:552587b429a1 270
bogdanm 89:552587b429a1 271 /* Include HASH HAL Extension module */
bogdanm 89:552587b429a1 272 #include "stm32f4xx_hal_hash_ex.h"
bogdanm 89:552587b429a1 273
bogdanm 89:552587b429a1 274 /* Exported functions --------------------------------------------------------*/
bogdanm 89:552587b429a1 275
bogdanm 89:552587b429a1 276 /* Initialization and de-initialization functions **********************************/
bogdanm 89:552587b429a1 277 HAL_StatusTypeDef HAL_HASH_Init(HASH_HandleTypeDef *hhash);
bogdanm 89:552587b429a1 278 HAL_StatusTypeDef HAL_HASH_DeInit(HASH_HandleTypeDef *hhash);
bogdanm 89:552587b429a1 279
bogdanm 89:552587b429a1 280 /* HASH processing using polling *********************************************/
bogdanm 89:552587b429a1 281 HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout);
bogdanm 89:552587b429a1 282 HAL_StatusTypeDef HAL_HASH_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout);
bogdanm 89:552587b429a1 283 HAL_StatusTypeDef HAL_HASH_MD5_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
bogdanm 89:552587b429a1 284 HAL_StatusTypeDef HAL_HASH_SHA1_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
bogdanm 89:552587b429a1 285
bogdanm 89:552587b429a1 286 /* HASH-MAC processing using polling *****************************************/
bogdanm 89:552587b429a1 287 HAL_StatusTypeDef HAL_HMAC_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout);
bogdanm 89:552587b429a1 288 HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout);
bogdanm 89:552587b429a1 289
bogdanm 89:552587b429a1 290 /* HASH processing using interrupt *******************************************/
bogdanm 89:552587b429a1 291 HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer);
bogdanm 89:552587b429a1 292 HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer);
bogdanm 89:552587b429a1 293
bogdanm 89:552587b429a1 294 /* HASH processing using DMA *************************************************/
bogdanm 89:552587b429a1 295 HAL_StatusTypeDef HAL_HASH_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
bogdanm 89:552587b429a1 296 HAL_StatusTypeDef HAL_HASH_SHA1_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout);
bogdanm 89:552587b429a1 297 HAL_StatusTypeDef HAL_HASH_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
bogdanm 89:552587b429a1 298 HAL_StatusTypeDef HAL_HASH_MD5_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout);
bogdanm 89:552587b429a1 299
bogdanm 89:552587b429a1 300 /* HASH-HMAC processing using DMA ********************************************/
bogdanm 89:552587b429a1 301 HAL_StatusTypeDef HAL_HMAC_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
bogdanm 89:552587b429a1 302 HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
bogdanm 89:552587b429a1 303
bogdanm 89:552587b429a1 304 /* Processing functions ******************************************************/
bogdanm 89:552587b429a1 305 void HAL_HASH_IRQHandler(HASH_HandleTypeDef *hhash);
bogdanm 89:552587b429a1 306
bogdanm 89:552587b429a1 307 /* Peripheral State functions ************************************************/
bogdanm 89:552587b429a1 308 HAL_HASH_STATETypeDef HAL_HASH_GetState(HASH_HandleTypeDef *hhash);
bogdanm 89:552587b429a1 309 void HAL_HASH_MspInit(HASH_HandleTypeDef *hhash);
bogdanm 89:552587b429a1 310 void HAL_HASH_MspDeInit(HASH_HandleTypeDef *hhash);
bogdanm 89:552587b429a1 311 void HAL_HASH_InCpltCallback(HASH_HandleTypeDef *hhash);
bogdanm 89:552587b429a1 312 void HAL_HASH_DgstCpltCallback(HASH_HandleTypeDef *hhash);
bogdanm 89:552587b429a1 313 void HAL_HASH_ErrorCallback(HASH_HandleTypeDef *hhash);
bogdanm 89:552587b429a1 314
bogdanm 89:552587b429a1 315 #endif /* STM32F415xx || STM32F417xx || STM32F437xx || STM32F439xx */
bogdanm 89:552587b429a1 316 /**
bogdanm 89:552587b429a1 317 * @}
bogdanm 89:552587b429a1 318 */
bogdanm 89:552587b429a1 319
bogdanm 89:552587b429a1 320 /**
bogdanm 89:552587b429a1 321 * @}
bogdanm 89:552587b429a1 322 */
bogdanm 89:552587b429a1 323
bogdanm 89:552587b429a1 324 #ifdef __cplusplus
bogdanm 89:552587b429a1 325 }
bogdanm 89:552587b429a1 326 #endif
bogdanm 89:552587b429a1 327
bogdanm 89:552587b429a1 328
bogdanm 89:552587b429a1 329 #endif /* __STM32F4xx_HAL_HASH_H */
bogdanm 89:552587b429a1 330
bogdanm 89:552587b429a1 331 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/