adc
Diff: communication.cpp
- Revision:
- 3:1d62b3be52e8
- Parent:
- 2:f480200c8600
diff -r f480200c8600 -r 1d62b3be52e8 communication.cpp --- a/communication.cpp Tue Oct 27 13:23:41 2020 +0000 +++ b/communication.cpp Wed Oct 28 15:35:08 2020 +0000 @@ -1,31 +1,36 @@ #include "communication.h" #include "cmsis_os.h" +#include <cstring> -extern UART_HandleTypeDef huart3; +//extern UART_HandleTypeDef huart3; enum _BOOL_ uart3PkgTransmited = _FALSE_; enum _BOOL_ uart3PkgReceived = _FALSE_; extern SPI_HandleTypeDef hspi1; +ALIGN_32BYTES(volatile uint8_t spi1Buf[ALIGN32_SIZE(256)] __attribute__((section(".SRAM")))); +ALIGN_32BYTES(volatile uint8_t spi1AddrBuf __attribute__((section(".SRAM")))); enum _BOOL_ spi1PkgTransmited = _FALSE_; enum _BOOL_ spi1PkgReceived = _FALSE_; enum OP_TYPE spi1OpType = NONE; -uint8_t *spi1Buf; +//uint8_t *spi1Buf; uint8_t spi1Len; //void ReceiveUARTPackage(UART_HandleTypeDef *huart, uint8_t *buf, uint8_t len) //{ // TickType_t timeBegin = xTaskGetTickCount(); +// //SCB_InvalidateDCache(); // HAL_StatusTypeDef err = HAL_UART_Receive_DMA(huart, buf, len); // while (!uart3PkgReceived && xTaskGetTickCount() - timeBegin < COMMUNICATION_WAITTING) osDelay(COMMUNICATION_DELAY); // // uart3PkgReceived = _FALSE_; //} -// -// -// + + + //void TransmitUARTPackage(UART_HandleTypeDef *huart, uint8_t *buf, uint8_t len) //{ // TickType_t timeBegin = xTaskGetTickCount(); +// //SCB_CleanDCache(); // HAL_StatusTypeDef err = HAL_UART_Transmit_DMA(huart, buf, len); // while (!uart3PkgTransmited && xTaskGetTickCount() - timeBegin < COMMUNICATION_WAITTING) osDelay(COMMUNICATION_DELAY); // @@ -54,17 +59,19 @@ void WriteToRegisterBySPI(SPI_HandleTypeDef *hspi, uint8_t addr, uint8_t *buf, uint8_t len) { - //TickType_t timeBegin = xTaskGetTickCount(); +// TickType_t timeBegin = xTaskGetTickCount(); enum _BOOL_ *cpltCheck; if(hspi == &hspi1) { - spi1Buf = buf; + //spi1Buf = buf; spi1Len = len; spi1OpType = WRITE; cpltCheck = &spi1PkgTransmited; } - - HAL_SPI_Transmit_DMA(hspi, &addr, 1); + memcpy((void*)&spi1AddrBuf, (void*)&addr, 1); + SCB_CleanDCache_by_Addr((uint32_t*)&spi1AddrBuf, ALIGN32_SIZE(1)); + HAL_SPI_Transmit_DMA(hspi, (uint8_t*)&spi1AddrBuf, 1); + memcpy((void*)&spi1Buf, (void*)buf, 1); // while (!*cpltCheck && xTaskGetTickCount() - timeBegin < COMMUNICATION_WAITTING) osDelay(COMMUNICATION_DELAY); *cpltCheck = _FALSE_; } @@ -77,16 +84,18 @@ enum _BOOL_ *cpltCheck; if(hspi == &hspi1) { - spi1Buf = buf; + //spi1Buf = buf; spi1Len = len; spi1OpType = READ; cpltCheck = &spi1PkgReceived; } - uint8_t addrBuf = addr; - HAL_SPI_Transmit_DMA(hspi, &addrBuf, 1); + memcpy((void*)&spi1AddrBuf, (void*)&addr, 1); + SCB_CleanDCache_by_Addr((uint32_t*)&spi1AddrBuf, ALIGN32_SIZE(1)); + HAL_SPI_Transmit_DMA(hspi, (uint8_t*)&spi1AddrBuf, 1); // while (!*cpltCheck && xTaskGetTickCount() - timeBegin < COMMUNICATION_WAITTING) osDelay(COMMUNICATION_DELAY); *cpltCheck = _FALSE_; + memcpy((void*)buf, (void*)&spi1Buf, spi1Len); } @@ -98,11 +107,12 @@ { case WRITE: spi1OpType = CPLT; - HAL_SPI_Transmit_DMA(hspi, spi1Buf, spi1Len); + SCB_CleanDCache_by_Addr((uint32_t*)&spi1Buf, ALIGN32_SIZE(spi1Len)); + HAL_SPI_Transmit_DMA(hspi, (uint8_t*)spi1Buf, spi1Len); break; case READ: spi1OpType = CPLT; - HAL_SPI_Receive_DMA(hspi, spi1Buf, spi1Len); + HAL_SPI_Receive_DMA(hspi, (uint8_t*)spi1Buf, spi1Len); break; case CPLT: spi1PkgTransmited = _TRUE_; @@ -119,6 +129,7 @@ void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi) { if(hspi == &hspi1) { + SCB_InvalidateDCache_by_Addr((uint32_t*)&spi1Buf, ALIGN32_SIZE(spi1Len)); spi1PkgReceived = _TRUE_; spi1OpType = NONE; }