Yuliya Smirnova / ADE7912

adc

Dependents:   h7adc

communication.cpp@3:1d62b3be52e8, 2020-10-28 (annotated)

Committer:
yuliyasm
Date:
Wed Oct 28 15:35:08 2020 +0000
Revision:
3:1d62b3be52e8
Parent:
2:f480200c8600 
new

Who changed what in which revision?

UserRevisionLine numberNew contents of line
yuliyasm 1:5796bdddf29c 1 #include "communication.h"
yuliyasm 1:5796bdddf29c 2 #include "cmsis_os.h"
yuliyasm 3:1d62b3be52e8 3 #include <cstring>
yuliyasm 1:5796bdddf29c 4
yuliyasm 3:1d62b3be52e8 5 //extern UART_HandleTypeDef huart3;
yuliyasm 1:5796bdddf29c 6 enum _BOOL_ uart3PkgTransmited = _FALSE_;
yuliyasm 1:5796bdddf29c 7 enum _BOOL_ uart3PkgReceived = _FALSE_;
yuliyasm 1:5796bdddf29c 8
yuliyasm 1:5796bdddf29c 9 extern SPI_HandleTypeDef hspi1;
yuliyasm 3:1d62b3be52e8 10 ALIGN_32BYTES(volatile uint8_t spi1Buf[ALIGN32_SIZE(256)] __attribute__((section(".SRAM"))));
yuliyasm 3:1d62b3be52e8 11 ALIGN_32BYTES(volatile uint8_t spi1AddrBuf __attribute__((section(".SRAM"))));
yuliyasm 1:5796bdddf29c 12 enum _BOOL_ spi1PkgTransmited = _FALSE_;
yuliyasm 1:5796bdddf29c 13 enum _BOOL_ spi1PkgReceived = _FALSE_;
yuliyasm 1:5796bdddf29c 14 enum OP_TYPE spi1OpType = NONE;
yuliyasm 3:1d62b3be52e8 15 //uint8_t *spi1Buf;
yuliyasm 1:5796bdddf29c 16 uint8_t spi1Len;
yuliyasm 1:5796bdddf29c 17
yuliyasm 1:5796bdddf29c 18 //void ReceiveUARTPackage(UART_HandleTypeDef *huart, uint8_t *buf, uint8_t len)
yuliyasm 1:5796bdddf29c 19 //{
yuliyasm 1:5796bdddf29c 20 // TickType_t timeBegin = xTaskGetTickCount();
yuliyasm 3:1d62b3be52e8 21 // //SCB_InvalidateDCache();
yuliyasm 1:5796bdddf29c 22 // HAL_StatusTypeDef err = HAL_UART_Receive_DMA(huart, buf, len);
yuliyasm 1:5796bdddf29c 23 // while (!uart3PkgReceived && xTaskGetTickCount() - timeBegin < COMMUNICATION_WAITTING) osDelay(COMMUNICATION_DELAY);
yuliyasm 1:5796bdddf29c 24 //
yuliyasm 1:5796bdddf29c 25 // uart3PkgReceived = _FALSE_;
yuliyasm 1:5796bdddf29c 26 //}
yuliyasm 3:1d62b3be52e8 27
yuliyasm 3:1d62b3be52e8 28
yuliyasm 3:1d62b3be52e8 29
yuliyasm 1:5796bdddf29c 30 //void TransmitUARTPackage(UART_HandleTypeDef *huart, uint8_t *buf, uint8_t len)
yuliyasm 1:5796bdddf29c 31 //{
yuliyasm 1:5796bdddf29c 32 // TickType_t timeBegin = xTaskGetTickCount();
yuliyasm 3:1d62b3be52e8 33 // //SCB_CleanDCache();
yuliyasm 1:5796bdddf29c 34 // HAL_StatusTypeDef err = HAL_UART_Transmit_DMA(huart, buf, len);
yuliyasm 1:5796bdddf29c 35 // while (!uart3PkgTransmited && xTaskGetTickCount() - timeBegin < COMMUNICATION_WAITTING) osDelay(COMMUNICATION_DELAY);
yuliyasm 1:5796bdddf29c 36 //
yuliyasm 1:5796bdddf29c 37 // uart3PkgTransmited = _FALSE_;
yuliyasm 1:5796bdddf29c 38 //}
yuliyasm 1:5796bdddf29c 39 //
yuliyasm 1:5796bdddf29c 40 //
yuliyasm 1:5796bdddf29c 41 //
yuliyasm 1:5796bdddf29c 42 //void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
yuliyasm 1:5796bdddf29c 43 //{
yuliyasm 1:5796bdddf29c 44 // if(huart == &huart3) {
yuliyasm 1:5796bdddf29c 45 // uart3PkgTransmited = _TRUE_;
yuliyasm 1:5796bdddf29c 46 // }
yuliyasm 1:5796bdddf29c 47 //}
yuliyasm 1:5796bdddf29c 48 //
yuliyasm 1:5796bdddf29c 49 //
yuliyasm 1:5796bdddf29c 50 //
yuliyasm 1:5796bdddf29c 51 //void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
yuliyasm 1:5796bdddf29c 52 //{
yuliyasm 1:5796bdddf29c 53 // if(huart == &huart3){
yuliyasm 1:5796bdddf29c 54 // uart3PkgReceived = _TRUE_;
yuliyasm 1:5796bdddf29c 55 // }
yuliyasm 1:5796bdddf29c 56 //}
yuliyasm 1:5796bdddf29c 57
yuliyasm 1:5796bdddf29c 58
yuliyasm 1:5796bdddf29c 59
yuliyasm 1:5796bdddf29c 60 void WriteToRegisterBySPI(SPI_HandleTypeDef *hspi, uint8_t addr, uint8_t *buf, uint8_t len)
yuliyasm 1:5796bdddf29c 61 {
yuliyasm 3:1d62b3be52e8 62 // TickType_t timeBegin = xTaskGetTickCount();
yuliyasm 1:5796bdddf29c 63
yuliyasm 1:5796bdddf29c 64 enum _BOOL_ *cpltCheck;
yuliyasm 1:5796bdddf29c 65 if(hspi == &hspi1) {
yuliyasm 3:1d62b3be52e8 66 //spi1Buf = buf;
yuliyasm 1:5796bdddf29c 67 spi1Len = len;
yuliyasm 1:5796bdddf29c 68 spi1OpType = WRITE;
yuliyasm 1:5796bdddf29c 69 cpltCheck = &spi1PkgTransmited;
yuliyasm 1:5796bdddf29c 70 }
yuliyasm 3:1d62b3be52e8 71 memcpy((void*)&spi1AddrBuf, (void*)&addr, 1);
yuliyasm 3:1d62b3be52e8 72 SCB_CleanDCache_by_Addr((uint32_t*)&spi1AddrBuf, ALIGN32_SIZE(1));
yuliyasm 3:1d62b3be52e8 73 HAL_SPI_Transmit_DMA(hspi, (uint8_t*)&spi1AddrBuf, 1);
yuliyasm 3:1d62b3be52e8 74 memcpy((void*)&spi1Buf, (void*)buf, 1);
yuliyasm 1:5796bdddf29c 75 // while (!*cpltCheck && xTaskGetTickCount() - timeBegin < COMMUNICATION_WAITTING) osDelay(COMMUNICATION_DELAY);
yuliyasm 1:5796bdddf29c 76 *cpltCheck = _FALSE_;
yuliyasm 1:5796bdddf29c 77 }
yuliyasm 1:5796bdddf29c 78
yuliyasm 1:5796bdddf29c 79
yuliyasm 1:5796bdddf29c 80
yuliyasm 1:5796bdddf29c 81 void ReadFromRegisterBySPI(SPI_HandleTypeDef *hspi, uint8_t addr, uint8_t *buf, uint8_t len)
yuliyasm 1:5796bdddf29c 82 {
yuliyasm 1:5796bdddf29c 83 // TickType_t timeBegin = xTaskGetTickCount();
yuliyasm 1:5796bdddf29c 84
yuliyasm 1:5796bdddf29c 85 enum _BOOL_ *cpltCheck;
yuliyasm 1:5796bdddf29c 86 if(hspi == &hspi1) {
yuliyasm 3:1d62b3be52e8 87 //spi1Buf = buf;
yuliyasm 1:5796bdddf29c 88 spi1Len = len;
yuliyasm 1:5796bdddf29c 89 spi1OpType = READ;
yuliyasm 1:5796bdddf29c 90 cpltCheck = &spi1PkgReceived;
yuliyasm 1:5796bdddf29c 91 }
yuliyasm 1:5796bdddf29c 92
yuliyasm 3:1d62b3be52e8 93 memcpy((void*)&spi1AddrBuf, (void*)&addr, 1);
yuliyasm 3:1d62b3be52e8 94 SCB_CleanDCache_by_Addr((uint32_t*)&spi1AddrBuf, ALIGN32_SIZE(1));
yuliyasm 3:1d62b3be52e8 95 HAL_SPI_Transmit_DMA(hspi, (uint8_t*)&spi1AddrBuf, 1);
yuliyasm 1:5796bdddf29c 96 // while (!*cpltCheck && xTaskGetTickCount() - timeBegin < COMMUNICATION_WAITTING) osDelay(COMMUNICATION_DELAY);
yuliyasm 1:5796bdddf29c 97 *cpltCheck = _FALSE_;
yuliyasm 3:1d62b3be52e8 98 memcpy((void*)buf, (void*)&spi1Buf, spi1Len);
yuliyasm 1:5796bdddf29c 99 }
yuliyasm 1:5796bdddf29c 100
yuliyasm 1:5796bdddf29c 101
yuliyasm 1:5796bdddf29c 102
yuliyasm 1:5796bdddf29c 103 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
yuliyasm 1:5796bdddf29c 104 {
yuliyasm 1:5796bdddf29c 105 if(hspi == &hspi1) {
yuliyasm 1:5796bdddf29c 106 switch (spi1OpType)
yuliyasm 1:5796bdddf29c 107 {
yuliyasm 1:5796bdddf29c 108 case WRITE:
yuliyasm 1:5796bdddf29c 109 spi1OpType = CPLT;
yuliyasm 3:1d62b3be52e8 110 SCB_CleanDCache_by_Addr((uint32_t*)&spi1Buf, ALIGN32_SIZE(spi1Len));
yuliyasm 3:1d62b3be52e8 111 HAL_SPI_Transmit_DMA(hspi, (uint8_t*)spi1Buf, spi1Len);
yuliyasm 1:5796bdddf29c 112 break;
yuliyasm 1:5796bdddf29c 113 case READ:
yuliyasm 1:5796bdddf29c 114 spi1OpType = CPLT;
yuliyasm 3:1d62b3be52e8 115 HAL_SPI_Receive_DMA(hspi, (uint8_t*)spi1Buf, spi1Len);
yuliyasm 1:5796bdddf29c 116 break;
yuliyasm 1:5796bdddf29c 117 case CPLT:
yuliyasm 1:5796bdddf29c 118 spi1PkgTransmited = _TRUE_;
yuliyasm 1:5796bdddf29c 119 spi1OpType = NONE;
yuliyasm 1:5796bdddf29c 120 break;
yuliyasm 1:5796bdddf29c 121 case NONE:
yuliyasm 1:5796bdddf29c 122 break;
yuliyasm 1:5796bdddf29c 123 }
yuliyasm 1:5796bdddf29c 124 }
yuliyasm 1:5796bdddf29c 125 }
yuliyasm 1:5796bdddf29c 126
yuliyasm 1:5796bdddf29c 127
yuliyasm 1:5796bdddf29c 128
yuliyasm 1:5796bdddf29c 129 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
yuliyasm 1:5796bdddf29c 130 {
yuliyasm 1:5796bdddf29c 131 if(hspi == &hspi1) {
yuliyasm 3:1d62b3be52e8 132 SCB_InvalidateDCache_by_Addr((uint32_t*)&spi1Buf, ALIGN32_SIZE(spi1Len));
yuliyasm 1:5796bdddf29c 133 spi1PkgReceived = _TRUE_;
yuliyasm 1:5796bdddf29c 134 spi1OpType = NONE;
yuliyasm 1:5796bdddf29c 135 }
yuliyasm 1:5796bdddf29c 136 }
yuliyasm 1:5796bdddf29c 137