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Show/hide line numbers HAL_CM.c Source File

HAL_CM.c

00001 /*----------------------------------------------------------------------------
00002  *      RL-ARM - RTX
00003  *----------------------------------------------------------------------------
00004  *      Name:    HAL_CM.C
00005  *      Purpose: Hardware Abstraction Layer for Cortex-M
00006  *      Rev.:    V4.60
00007  *----------------------------------------------------------------------------
00008  *
00009  * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
00010  * All rights reserved.
00011  * Redistribution and use in source and binary forms, with or without
00012  * modification, are permitted provided that the following conditions are met:
00013  *  - Redistributions of source code must retain the above copyright
00014  *    notice, this list of conditions and the following disclaimer.
00015  *  - Redistributions in binary form must reproduce the above copyright
00016  *    notice, this list of conditions and the following disclaimer in the
00017  *    documentation and/or other materials provided with the distribution.
00018  *  - Neither the name of ARM  nor the names of its contributors may be used 
00019  *    to endorse or promote products derived from this software without 
00020  *    specific prior written permission.
00021  *
00022  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
00023  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
00024  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00025  * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
00026  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
00027  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
00028  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
00029  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
00030  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
00031  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00032  * POSSIBILITY OF SUCH DAMAGE.
00033  *---------------------------------------------------------------------------*/
00034 
00035 #include "rt_TypeDef.h"
00036 #include "RTX_Conf.h"
00037 #include "rt_HAL_CM.h"
00038 
00039 
00040 /*----------------------------------------------------------------------------
00041  *      Global Variables
00042  *---------------------------------------------------------------------------*/
00043 
00044 #ifdef DBG_MSG
00045 BIT dbg_msg;
00046 #endif
00047 
00048 /*----------------------------------------------------------------------------
00049  *      Functions
00050  *---------------------------------------------------------------------------*/
00051 
00052 
00053 /*--------------------------- rt_init_stack ---------------------------------*/
00054 
00055 void rt_init_stack (P_TCB p_TCB, FUNCP task_body) {
00056   /* Prepare TCB and saved context for a first time start of a task. */
00057   U32 *stk,i,size;
00058 
00059   /* Prepare a complete interrupt frame for first task start */
00060   size = p_TCB->priv_stack >> 2;
00061   
00062   /* Write to the top of stack. */
00063   stk = &p_TCB->stack[size];
00064 
00065   /* Auto correct to 8-byte ARM stack alignment. */
00066   if ((U32)stk & 0x04) {
00067     stk--;
00068   }
00069 
00070   stk -= 16;
00071 
00072   /* Default xPSR and initial PC */
00073   stk[15] = INITIAL_xPSR;
00074   stk[14] = (U32)task_body;
00075 
00076   /* Clear R4-R11,R0-R3,R12,LR registers. */
00077   for (i = 0; i < 14; i++) {
00078     stk[i] = 0;
00079   }
00080 
00081   /* Assign a void pointer to R0. */
00082   stk[8] = (U32)p_TCB->msg;
00083 
00084   /* Initial Task stack pointer. */
00085   p_TCB->tsk_stack = (U32)stk;
00086 
00087   /* Task entry point. */
00088   p_TCB->ptask = task_body;
00089 
00090   /* Set a magic word for checking of stack overflow.
00091    For the main thread (ID: 0x01) the stack is in a memory area shared with the
00092    heap, therefore the last word of the stack is a moving target.
00093    We want to do stack/heap collision detection instead.
00094   */
00095   if (p_TCB->task_id != 0x01)
00096       p_TCB->stack[0] = MAGIC_WORD;
00097 }
00098 
00099 
00100 /*--------------------------- rt_ret_val ----------------------------------*/
00101 
00102 static __inline U32 *rt_ret_regs (P_TCB p_TCB) {
00103   /* Get pointer to task return value registers (R0..R3) in Stack */
00104 #if (__TARGET_FPU_VFP)
00105   if (p_TCB->stack_frame) {
00106     /* Extended Stack Frame: R4-R11,S16-S31,R0-R3,R12,LR,PC,xPSR,S0-S15,FPSCR */
00107     return (U32 *)(p_TCB->tsk_stack + 8*4 + 16*4);
00108   } else {
00109     /* Basic Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
00110     return (U32 *)(p_TCB->tsk_stack + 8*4);
00111   }
00112 #else
00113   /* Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
00114   return (U32 *)(p_TCB->tsk_stack + 8*4);
00115 #endif
00116 }
00117 
00118 void rt_ret_val (P_TCB p_TCB, U32 v0) {
00119   U32 *ret;
00120 
00121   ret = rt_ret_regs(p_TCB);
00122   ret[0] = v0;
00123 }
00124 
00125 void rt_ret_val2(P_TCB p_TCB, U32 v0, U32 v1) {
00126   U32 *ret;
00127 
00128   ret = rt_ret_regs(p_TCB);
00129   ret[0] = v0;
00130   ret[1] = v1;
00131 }
00132 
00133 
00134 /*--------------------------- dbg_init --------------------------------------*/
00135 
00136 #ifdef DBG_MSG
00137 void dbg_init (void) {
00138   if ((DEMCR & DEMCR_TRCENA)     && 
00139       (ITM_CONTROL & ITM_ITMENA) &&
00140       (ITM_ENABLE & (1UL << 31))) {
00141     dbg_msg = __TRUE;
00142   }
00143 }
00144 #endif
00145 
00146 /*--------------------------- dbg_task_notify -------------------------------*/
00147 
00148 #ifdef DBG_MSG
00149 void dbg_task_notify (P_TCB p_tcb, BOOL create) {
00150   while (ITM_PORT31_U32 == 0);
00151   ITM_PORT31_U32 = (U32)p_tcb->ptask;
00152   while (ITM_PORT31_U32 == 0);
00153   ITM_PORT31_U16 = (create << 8) | p_tcb->task_id;
00154 }
00155 #endif
00156 
00157 /*--------------------------- dbg_task_switch -------------------------------*/
00158 
00159 #ifdef DBG_MSG
00160 void dbg_task_switch (U32 task_id) {
00161   while (ITM_PORT31_U32 == 0);
00162   ITM_PORT31_U8 = task_id;
00163 }
00164 #endif
00165 
00166 
00167 /*----------------------------------------------------------------------------
00168  * end of file
00169  *---------------------------------------------------------------------------*/
00170