Yasuhiro ISHII
/
MPU9150_DMP
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MPU9150_DMP
by 
Chris Pepper
Revision 0:74f0ae286b03, committed 2014-08-31
- Comitter:
- p3p
- Date:
- Sun Aug 31 12:52:29 2014 +0000
- Child:
- 1:8ff0beb54dd4
- Commit message:
- MPU9150 api using its DMP for quaternions
Changed in this revision
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/MPU9150.cpp Sun Aug 31 12:52:29 2014 +0000
@@ -0,0 +1,846 @@
+#include "MPU9150.h"
+
+uint8_t MPU9150::getDeviceID(){
+ uint8_t ret = 0;
+ readBits(MPU6050_RA_WHO_AM_I, MPU6050_WHO_AM_I_BIT, MPU6050_WHO_AM_I_LENGTH, &ret);
+ return ret;
+}
+
+bool MPU9150::isReady(){
+ return (getDeviceID() == (device_address >> 1));
+}
+
+void MPU9150::initialise(){
+ reset();
+ wait_ms(20);//wait for reset
+
+ sleep(false);
+ clockSelect(MPU6050_CLOCK_PLL_XGYRO); //use the gyro clock as its more reliable
+ setGyroFullScaleRange(MPU6050_GYRO_FS_250);
+ setAccelFullScaleRange(MPU6050_ACCEL_FS_2);
+ setStandbyAccX(true);
+ setI2CMasterClock(MPU6050_CLOCK_DIV_400);
+ setDigitalLowPassFilter(MPU6050_DLPF_BW_42);
+ setSampleRateDivider(4);
+
+ initialiseMagnetometer();
+
+ setFifoReset(true);
+
+ setTemperatureFifo(true);
+ setAccelFifo(true);
+ setGyroFifo(true);
+ setSlave0Fifo(true);
+
+ setInterruptDataReadyEnable(true);
+ setEnableFifo(true);
+}
+
+void MPU9150::initialiseMagnetometer(){
+ //set up slave 0 to read the magnetometor data
+ setWaitForExternalSensor(true);
+ //read data
+ setI2cSlaveRW(0, true);
+ setI2cSlaveAddress(0, 0x0C);
+ setI2cSlaveRegister(0, 3);
+ setI2cSlaveEnable(0, true);
+ setI2cSlaveTransactionLength(0, 6);
+
+
+ //set up slave 1 to request a new magnetometor reading by writing 0x01 to 0xA
+ setI2cSlaveAddress(1, 0x0C);
+ setI2cSlaveRegister(1, 0x0A);
+ setI2cSlaveTransactionLength(1, 1);
+ setI2cSlaveEnable(1, true);
+ setI2cSlaveDataOut(1, 1);
+
+ //configure update rates
+ setI2cMasterDelay(4);
+ setI2cSlaveDelay(0, true);
+ setI2cSlaveDelay(1, true);
+
+ //Enable the aux i2c bus with MPU9150 as master
+ setI2cMasterEnable(true);
+}
+
+void MPU9150::initialiseDMP(){
+ reset();
+ wait_ms(20);
+ sleep(false);
+
+//does this exist in the 9150?
+ char product[6] = {0,0,0,0,0,0};
+ read(0x77, product, 6 );
+ int rev = ((product[5] & 0x01) << 2) | ((product[3] & 0x01) << 1) |
+ (product[1] & 0x01);
+ debug.printf("%02X, %02X, %02X, %02X, %02X, %02X\r\n", product[0], product[1], product[2], product[3], product[4], product[5]);
+ debug.printf("Product Revision: %d\r\n", rev);
+
+
+ setMemoryBank(0x10, true, true);
+ setMemoryStartAddress(0x06);
+ debug.printf("Hardware Version: %d\r\n", readMemoryByte());
+
+ setMemoryBank(0);
+ // check OTP bank valid
+ uint8_t otpValid = getOTPBankValid();
+ debug.printf("optValid: %d\r\n", otpValid);
+
+ //Enabling interrupt latch, clear on any read, AUX bypass enabled
+ write(MPU6050_RA_INT_PIN_CFG, 0x32);
+
+ if (writeMemoryBlock(dmpMemory, MPU6050_DMP_CODE_SIZE, 0 ,0, true)) {
+ debug.printf("Success! DMP code written and verified.\r\n");
+ if (writeDMPConfigurationSet(dmpConfig, MPU6050_DMP_CONFIG_SIZE)) {
+ debug.printf("Success! DMP configuration written and verified.\r\n");
+ setIntDMPEnabled(true);
+ setInterruptFifoOverflowEnable(true);
+ setSampleRateDivider(4);
+ clockSelect(MPU6050_CLOCK_PLL_XGYRO);
+ setDigitalLowPassFilter(MPU6050_DLPF_BW_42);
+ setGyroFullScaleRange(MPU6050_GYRO_FS_2000);
+
+ setExternalFrameSync(MPU6050_EXT_SYNC_TEMP_OUT_L);
+ setDMPConfig1(0x03);
+ setDMPConfig2(0x00);
+
+ unsigned char *update_ptr = (unsigned char*)dmpUpdates;
+ writeMemoryBlock(update_ptr + 3, update_ptr[2], update_ptr[0], update_ptr[1], true);
+ update_ptr += update_ptr[2] + 3;
+ writeMemoryBlock(update_ptr + 3, update_ptr[2], update_ptr[0], update_ptr[1], true);
+
+ setFifoReset(true);
+
+ update_ptr += update_ptr[2] + 3;
+ writeMemoryBlock(update_ptr + 3, update_ptr[2], update_ptr[0], update_ptr[1], true);
+ update_ptr += update_ptr[2] + 3;
+ writeMemoryBlock(update_ptr + 3, update_ptr[2], update_ptr[0], update_ptr[1], true);
+
+ write(MPU6050_RA_PWR_MGMT_2, 0x00);
+ setInterruptAnyReadClear(true);
+ setInterruptLatch(true);
+
+ setI2cSlaveRW(0, true);
+ setI2cSlaveAddress(0, 0x0C);
+ setI2cSlaveRegister(0, 1);
+ setI2cSlaveEnable(0, true);
+ setI2cSlaveTransactionLength(0, 10);
+
+ //set up slave 1 to request a new magnetometor reading by writing 0x01 to 0xA
+ setI2cSlaveAddress(2, 0x0C);
+ setI2cSlaveRegister(2, 0x0A);
+ setI2cSlaveTransactionLength(2, 1);
+ setI2cSlaveEnable(2, true);
+ setI2cSlaveDataOut(2, 1);
+
+ //configure update rates
+ setI2cMasterDelay(4);
+ setI2cSlaveDelay(0, true);
+ setI2cSlaveDelay(2, true);
+
+ //Enable the aux i2c bus with MPU9150 as master
+ setI2cMasterEnable(true);
+
+ write(MPU6050_RA_INT_PIN_CFG, 0x00);
+
+ // enable I2C master mode and reset DMP/FIFO
+ //DEBUG_PRINTLN(F("Enabling I2C master mode..."));
+ write( MPU6050_RA_USER_CTRL, 0x20);
+ //DEBUG_PRINTLN(F("Resetting FIFO..."));
+ write(MPU6050_RA_USER_CTRL, 0x24);
+ //DEBUG_PRINTLN(F("Rewriting I2C master mode enabled because...I don't know"));
+ write(MPU6050_RA_USER_CTRL, 0x20);
+ //DEBUG_PRINTLN(F("Enabling and resetting DMP/FIFO..."));
+ write(MPU6050_RA_USER_CTRL, 0xE8);
+
+ update_ptr += update_ptr[2] + 3;
+ writeMemoryBlock(update_ptr + 3, update_ptr[2], update_ptr[0], update_ptr[1], true);
+ update_ptr += update_ptr[2] + 3;
+ writeMemoryBlock(update_ptr + 3, update_ptr[2], update_ptr[0], update_ptr[1], true);
+ update_ptr += update_ptr[2] + 3;
+ writeMemoryBlock(update_ptr + 3, update_ptr[2], update_ptr[0], update_ptr[1], true);
+ update_ptr += update_ptr[2] + 3;
+ writeMemoryBlock(update_ptr + 3, update_ptr[2], update_ptr[0], update_ptr[1], true);
+ update_ptr += update_ptr[2] + 3;
+ writeMemoryBlock(update_ptr + 3, update_ptr[2], update_ptr[0], update_ptr[1], true);
+ update_ptr += update_ptr[2] + 3;
+ writeMemoryBlock(update_ptr + 3, update_ptr[2], update_ptr[0], update_ptr[1], true);
+ update_ptr += update_ptr[2] + 3;
+ writeMemoryBlock(update_ptr + 3, update_ptr[2], update_ptr[0], update_ptr[1], true);
+
+ //read?
+ update_ptr += update_ptr[2] + 3;
+ //stalls?
+ //readMemoryBlock(update_ptr + 3, update_ptr[2], update_ptr[0], update_ptr[1]);
+
+
+ update_ptr += update_ptr[2] + 3;
+ writeMemoryBlock(update_ptr + 3, update_ptr[2], update_ptr[0], update_ptr[1], true);
+ update_ptr += update_ptr[2] + 3;
+ writeMemoryBlock(update_ptr + 3, update_ptr[2], update_ptr[0], update_ptr[1], true);
+ update_ptr += update_ptr[2] + 3;
+ writeMemoryBlock(update_ptr + 3, update_ptr[2], update_ptr[0], update_ptr[1], true);
+ update_ptr += update_ptr[2] + 3;
+ writeMemoryBlock(update_ptr + 3, update_ptr[2], update_ptr[0], update_ptr[1], true);
+ update_ptr += update_ptr[2] + 3;
+ writeMemoryBlock(update_ptr + 3, update_ptr[2], update_ptr[0], update_ptr[1], true);
+
+ int fifoCount = 0;
+ while ((fifoCount = getFifoCount()) < 46);
+ uint8_t buffer[128];
+ getFifoBuffer((char *)buffer, fifoCount);
+ getInterruptStatus();
+
+ update_ptr += update_ptr[2] + 3;
+ writeMemoryBlock(update_ptr + 3, update_ptr[2], update_ptr[0], update_ptr[1], true);
+
+ fifoCount = 0;
+ while ((fifoCount = getFifoCount()) < 48);
+ getFifoBuffer((char *)buffer, fifoCount);
+ getInterruptStatus();
+ fifoCount = 0;
+ while ((fifoCount = getFifoCount()) < 48);
+ getFifoBuffer((char *)buffer, fifoCount);
+ getInterruptStatus();
+
+ update_ptr += update_ptr[2] + 3;
+ writeMemoryBlock(update_ptr + 3, update_ptr[2], update_ptr[0], update_ptr[1], true);
+
+ setDMPEnabled(false);
+
+ debug.printf("finished\r\n");
+
+ }
+ }
+
+
+}
+
+//PWR_MGMT_1 Control Register
+//*****************************/
+void MPU9150::reset(){
+ writeBit(MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_DEVICE_RESET_BIT, true);
+}
+
+void MPU9150::sleep(bool state){
+ writeBit(MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_SLEEP_BIT, state);
+}
+
+/*
+cycle between sleep mode and waking up to take a single sample of data from
+active sensors at a rate determined by LP_WAKE_CTRL (register 108).
+*/
+void MPU9150::cycleMode(bool state){
+ writeBit(MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CYCLE_BIT, state);
+}
+void MPU9150::disableTemperatureSensor(bool state){
+ writeBit(MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_TEMP_DIS_BIT, state);
+}
+void MPU9150::clockSelect(uint8_t clk){
+ writeBits(MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CLKSEL_BIT, MPU6050_PWR1_CLKSEL_LENGTH, clk);
+}
+
+//PWR_MGMT_2 Control Register
+//*****************************/
+void MPU9150::setCycleWakeFrequency(uint8_t freq){
+ writeBits(MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_LP_WAKE_CTRL_BIT, MPU6050_PWR2_LP_WAKE_CTRL_LENGTH, freq);
+}
+void MPU9150::setStandbyAccX(bool value){
+ writeBit(MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XA_BIT, value);
+}
+void MPU9150::setStandbyAccY(bool value){
+ writeBit(MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YA_BIT, value);
+}
+void MPU9150::setStandbyAccZ(bool value){
+ writeBit(MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZA_BIT, value);
+}
+void MPU9150::setStandbyGyroX( bool value){
+ writeBit(MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XG_BIT, value);
+}
+void MPU9150::setStandbyGyroY( bool value){
+ writeBit(MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YG_BIT, value);
+}
+void MPU9150::setStandbyGyroZ( bool value){
+ writeBit(MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZG_BIT, value);
+}
+
+//SMPRT_DIV Sample Rate Divider
+//*****************************/
+void MPU9150::setSampleRateDivider(uint8_t value){
+ write(MPU6050_RA_SMPLRT_DIV, value);
+}
+
+//CONFIG
+void MPU9150::setExternalFrameSync(uint8_t value){
+ writeBits(MPU6050_RA_CONFIG, MPU6050_CFG_EXT_SYNC_SET_BIT, MPU6050_CFG_EXT_SYNC_SET_LENGTH, value);
+}
+void MPU9150::setDigitalLowPassFilter(uint8_t value){
+ writeBits(MPU6050_RA_CONFIG, MPU6050_CFG_DLPF_CFG_BIT, MPU6050_CFG_DLPF_CFG_LENGTH, value);
+}
+
+//GYRO_CONFIG
+void MPU9150::setGyroSelfTest(bool value){
+ writeBit(MPU6050_RA_GYRO_CONFIG, 7, value); //X
+ writeBit(MPU6050_RA_GYRO_CONFIG, 6, value); //Y
+ writeBit(MPU6050_RA_GYRO_CONFIG, 5, value); //Z
+}
+
+void MPU9150::setGyroFullScaleRange(uint8_t value){
+ writeBits(MPU6050_RA_GYRO_CONFIG, MPU6050_GCONFIG_FS_SEL_BIT, MPU6050_GCONFIG_FS_SEL_LENGTH, value);
+}
+
+//ACCEL_CONFIG
+void MPU9150::setAccelSelfTest(bool value){
+ writeBit(MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_XA_ST_BIT, value);
+ writeBit(MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_YA_ST_BIT, value);
+ writeBit(MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ZA_ST_BIT, value);
+}
+void MPU9150::setAccelFullScaleRange(uint8_t value){
+ writeBits(MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_AFS_SEL_BIT , MPU6050_ACONFIG_AFS_SEL_LENGTH, value);
+}
+
+//FIFO_EN
+void MPU9150::setTemperatureFifo(bool value){
+ writeBit(MPU6050_RA_FIFO_EN, MPU6050_TEMP_FIFO_EN_BIT, value);
+}
+void MPU9150::setGyroFifo(bool value){
+ writeBit(MPU6050_RA_FIFO_EN, MPU6050_XG_FIFO_EN_BIT, value);
+ writeBit(MPU6050_RA_FIFO_EN, MPU6050_YG_FIFO_EN_BIT, value);
+ writeBit(MPU6050_RA_FIFO_EN, MPU6050_ZG_FIFO_EN_BIT, value);
+}
+void MPU9150::setAccelFifo(bool value){
+ writeBit(MPU6050_RA_FIFO_EN, MPU6050_ACCEL_FIFO_EN_BIT, value);
+}
+void MPU9150::setSlave2Fifo(bool value){
+ writeBit(MPU6050_RA_FIFO_EN, MPU6050_SLV2_FIFO_EN_BIT, value);
+}
+void MPU9150::setSlave1Fifo(bool value){
+ writeBit(MPU6050_RA_FIFO_EN, MPU6050_SLV1_FIFO_EN_BIT, value);
+}
+void MPU9150::setSlave0Fifo(bool value){
+ writeBit(MPU6050_RA_FIFO_EN, MPU6050_SLV0_FIFO_EN_BIT, value);
+}
+
+//I2C_MST_CTRL
+void MPU9150::setMultiMaster(bool value){
+ writeBit(MPU6050_RA_I2C_MST_CTRL, MPU6050_MULT_MST_EN_BIT, value);
+}
+void MPU9150::setWaitForExternalSensor(bool value){
+ writeBit(MPU6050_RA_I2C_MST_CTRL, MPU6050_WAIT_FOR_ES_BIT, value);
+}
+void MPU9150::setSlave3Fifo(bool value){
+ writeBit(MPU6050_RA_I2C_MST_CTRL, MPU6050_SLV_3_FIFO_EN_BIT, value);
+}
+void MPU9150::setMasterStartStop(bool value){
+ writeBit(MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_P_NSR_BIT, value);
+}
+void MPU9150::setI2CMasterClock(uint8_t value){
+ writeBits(MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_CLK_BIT, MPU6050_I2C_MST_CLK_LENGTH, value);
+}
+
+//I2C slaves 0 to 3
+//I2C_SLV0_ADDR
+void MPU9150::setI2cSlaveRW(uint8_t slave_id, bool value){
+ if(slave_id > 3)return;
+ writeBit(MPU6050_RA_I2C_SLV0_ADDR + (slave_id * 3), MPU6050_I2C_SLV_RW_BIT, value);
+}
+void MPU9150::setI2cSlaveAddress(uint8_t slave_id, uint8_t value){
+ if(slave_id > 3)return;
+ writeBits(MPU6050_RA_I2C_SLV0_ADDR + (slave_id * 3), MPU6050_I2C_SLV_ADDR_BIT, MPU6050_I2C_SLV_ADDR_LENGTH, value);
+}
+//I2C_SLV0_REG,
+void MPU9150::setI2cSlaveRegister(uint8_t slave_id, uint8_t value){
+ if(slave_id > 3)return;
+ write(MPU6050_RA_I2C_SLV0_REG + (slave_id * 3), value);
+}
+//I2C_SLV0_CTRL
+void MPU9150::setI2cSlaveEnable(uint8_t slave_id, bool value){
+ if(slave_id > 3)return;
+ writeBit(MPU6050_RA_I2C_SLV0_CTRL + (slave_id * 3), MPU6050_I2C_SLV_EN_BIT, value);
+}
+void MPU9150::setI2cSlaveByteSwap(uint8_t slave_id, bool value){
+ if(slave_id > 3)return;
+ writeBit(MPU6050_RA_I2C_SLV0_CTRL + (slave_id * 3), MPU6050_I2C_SLV_BYTE_SW_BIT, value);
+}
+void MPU9150::setI2cSlaveRegDisable(uint8_t slave_id, bool value){
+ if(slave_id > 3)return;
+ writeBit(MPU6050_RA_I2C_SLV0_CTRL + (slave_id * 3), MPU6050_I2C_SLV_REG_DIS_BIT, value);
+}
+void MPU9150::setI2cSlaveByteGrouping(uint8_t slave_id, bool value){
+ if(slave_id > 3)return;
+ writeBit(MPU6050_RA_I2C_SLV0_CTRL + (slave_id * 3), MPU6050_I2C_SLV_GRP_BIT, value);
+}
+void MPU9150::setI2cSlaveTransactionLength(uint8_t slave_id, uint8_t value){
+ if(slave_id > 3)return;
+ writeBits(MPU6050_RA_I2C_SLV0_CTRL + (slave_id * 3), MPU6050_I2C_SLV_LEN_BIT, MPU6050_I2C_SLV_LEN_LENGTH, value);
+}
+//I2C_SLV0_DO
+void MPU9150::setI2cSlaveDataOut(uint8_t slave_id, uint8_t value){
+ if(slave_id > 3)return;
+ write(MPU6050_RA_I2C_SLV0_DO + slave_id, value);
+}
+//I2C_MST_DELAY_CTRL
+void MPU9150::setI2cSlaveDelay(uint8_t slave_id, uint8_t value){
+ writeBit(MPU6050_RA_I2C_MST_DELAY_CTRL, slave_id, value);
+}
+void MPU9150::setI2cSlaveShadowDelay(uint8_t value){
+ writeBit(MPU6050_RA_I2C_MST_DELAY_CTRL, 7, value);
+}
+
+//I2C slave4
+//I2C_SLV4_ADDR
+void MPU9150::setI2cSlave4RW( bool value){
+ writeBit(MPU6050_RA_I2C_SLV4_ADDR, MPU6050_I2C_SLV4_RW_BIT, value);
+}
+void MPU9150::setI2cSlave4Address( uint8_t value){
+ writeBits(MPU6050_RA_I2C_SLV4_ADDR, MPU6050_I2C_SLV4_ADDR_BIT, MPU6050_I2C_SLV4_ADDR_LENGTH, value);
+}
+//I2C_SLV4_REG,
+void MPU9150::setI2cSlave4Register(uint8_t value){
+ write(MPU6050_RA_I2C_SLV4_REG, value);
+}
+//I2C_SLV4_DO
+void MPU9150::setI2cSlave4DataOut(uint8_t value){
+ write(MPU6050_RA_I2C_SLV4_DO, value);
+}
+
+//I2C_SLV4_CTRL
+void MPU9150::setI2cSlave4Enable(bool value){
+ writeBit(MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_EN_BIT, value);
+}
+
+void MPU9150::setI2cSlave4IntEnable(bool value){
+ writeBit(MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_INT_EN_BIT, value);
+}
+
+void MPU9150::setI2cSlave4RegDisable(bool value){
+ writeBit(MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_REG_DIS_BIT, value);
+}
+
+void MPU9150::setI2cMasterDelay(uint8_t value){
+ writeBits(MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_MST_DLY_BIT, MPU6050_I2C_SLV4_MST_DLY_LENGTH, value);
+}
+
+uint8_t MPU9150::getI2cSlave4Di(){
+ return get8(MPU6050_RA_I2C_SLV4_DI);
+}
+
+//I2C_MST_STATUS
+bool MPU9150::setI2cPassthrough(){
+ return getBit(MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_PASS_THROUGH_BIT);
+}
+bool MPU9150::setI2cSlave4Done(){
+ return getBit(MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV4_DONE_BIT);
+}
+bool MPU9150::setI2cLostArbitration(){
+ return getBit(MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_LOST_ARB_BIT);
+}
+bool MPU9150::setI2cSlave0Nack(){
+ return getBit(MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV0_NACK_BIT);
+}
+bool MPU9150::setI2cSlave1Nack(){
+ return getBit(MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV1_NACK_BIT);
+}
+bool MPU9150::setI2cSlave2Nack(){
+ return getBit(MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV2_NACK_BIT);
+}
+bool MPU9150::setI2cSlave3Nack(){
+ return getBit(MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV3_NACK_BIT);
+}
+bool MPU9150::setI2cSlave4Nack(){
+ return getBit(MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV4_NACK_BIT);
+}
+
+//INT_PIN_CFG
+void MPU9150::setInterruptActiveLow(bool value){
+ writeBit(MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_LEVEL_BIT, value);
+}
+void MPU9150::setInterruptOpenDrain(bool value){
+ writeBit(MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_OPEN_BIT, value);
+}
+void MPU9150::setInterruptLatch(bool value){
+ writeBit(MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_LATCH_INT_EN_BIT, value);
+}
+void MPU9150::setInterruptAnyReadClear(bool value){
+ writeBit(MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_RD_CLEAR_BIT, value);
+}
+void MPU9150::setFsyncInterruptActiveLow(bool value){
+ writeBit(MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT, value);
+}
+void MPU9150::setFsyncInterruptEnable(bool value){
+ writeBit(MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_EN_BIT, value);
+}
+void MPU9150::setI2cAuxBypassEnable(bool value){
+ writeBit(MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_I2C_BYPASS_EN_BIT, value);
+}
+
+//INT_ENABLE
+void MPU9150::setInterruptFifoOverflowEnable(bool value){
+ writeBit(MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FIFO_OFLOW_BIT, value);
+}
+void MPU9150::setInterruptMasterEnable(bool value){
+ writeBit(MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_I2C_MST_INT_BIT, value);
+}
+void MPU9150::setInterruptDataReadyEnable(bool value){
+ writeBit(MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DATA_RDY_BIT, value);
+}
+
+//INT_STATUS
+bool MPU9150::getInterruptFifoOverflow(){
+ return getBit(MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_FIFO_OFLOW_BIT);
+}
+bool MPU9150::getInterruptMaster(){
+ return getBit(MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_I2C_MST_INT_BIT);
+}
+bool MPU9150::getInterruptDataReady(){
+ return getBit(MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_DATA_RDY_BIT);
+}
+
+uint8_t MPU9150::getInterruptStatus(){
+ return get8(MPU6050_RA_INT_STATUS);
+}
+
+//SIGNAL_PATH_RESET
+void MPU9150::resetGyroSignalPath(){
+ writeBit(MPU6050_RA_SIGNAL_PATH_RESET, MPU6050_PATHRESET_GYRO_RESET_BIT, true);
+}
+void MPU9150::resetAccelSignalPath(){
+ writeBit(MPU6050_RA_SIGNAL_PATH_RESET, MPU6050_PATHRESET_ACCEL_RESET_BIT, true);
+}
+void MPU9150::resetTempSignalPath(){
+ writeBit(MPU6050_RA_SIGNAL_PATH_RESET, MPU6050_PATHRESET_TEMP_RESET_BIT, true);
+}
+
+//USER_CTRL
+void MPU9150::setEnableFifo(bool value){
+ writeBit(MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_FIFO_EN_BIT, value);
+}
+void MPU9150::setI2cMasterEnable(bool value){
+ writeBit(MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_MST_EN_BIT, value);
+}
+void MPU9150::setFifoReset(bool value){
+ writeBit(MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_FIFO_RESET_BIT, value);
+}
+void MPU9150::setI2cMasterReset(bool value){
+ writeBit(MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_MST_RESET_BIT, value);
+}
+void MPU9150::setFullSensorReset(bool value){
+ writeBit(MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_SIG_COND_RESET_BIT, value);
+}
+
+//FIFO_COUNT_H and FIFO_COUNT_L
+int16_t MPU9150::getFifoCount(){
+ return get16(MPU6050_RA_FIFO_COUNTH);
+}
+
+//FIFO_R_W
+bool MPU9150::getFifoBuffer(char* buffer, int16_t length){
+ return read(MPU6050_RA_FIFO_R_W, buffer, length);
+}
+
+//UNDOCUMENTED (again reimplemention from sparkfun github) can't find any origional documentation
+// XG_OFFS_TC
+uint8_t MPU9150::getOTPBankValid() {
+ return getBit(MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OTP_BNK_VLD_BIT);
+}
+
+//INT_ENABLE
+void MPU9150::setIntPLLReadyEnabled(bool value) {
+ writeBit( MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_PLL_RDY_INT_BIT, value);
+}
+void MPU9150::setIntDMPEnabled(bool value) {
+ writeBit( MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DMP_INT_BIT, value);
+}
+
+// INT_STATUS
+bool MPU9150::getIntPLLReadyStatus() {
+ return getBit( MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_PLL_RDY_INT_BIT);
+}
+bool MPU9150::getIntDMPStatus() {
+ return getBit( MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_DMP_INT_BIT);
+}
+
+// USER_CTRL
+bool MPU9150::getDMPEnabled() {
+ return getBit(MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_DMP_EN_BIT);
+}
+void MPU9150::setDMPEnabled(bool value) {
+ writeBit(MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_DMP_EN_BIT, value);
+}
+void MPU9150::resetDMP() {
+ writeBit(MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_DMP_RESET_BIT, true);
+}
+
+// BANK_SEL
+void MPU9150::setMemoryBank(uint8_t bank, bool prefetchEnabled, bool userBank) {
+ bank &= 0x1F;
+ if (userBank){
+ bank |= 0x20;
+ }
+ if (prefetchEnabled){
+ bank |= 0x40;
+ }
+ write( MPU6050_RA_BANK_SEL, bank);
+}
+
+// MEM_START_ADDR
+void MPU9150::setMemoryStartAddress(uint8_t address) {
+ write(MPU6050_RA_MEM_START_ADDR, address);
+}
+
+// MEM_R_W
+uint8_t MPU9150::readMemoryByte() {
+ return get8(MPU6050_RA_MEM_R_W);
+}
+void MPU9150::writeMemoryByte(uint8_t value) {
+ write(MPU6050_RA_MEM_R_W, value);
+}
+void MPU9150::readMemoryBlock(uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address) {
+ setMemoryBank(bank);
+ setMemoryStartAddress(address);
+
+ uint8_t chunkSize;
+ for (uint16_t i = 0; i < dataSize;) {
+ // determine correct chunk size according to bank position and data size
+ chunkSize = MPU6050_DMP_MEMORY_CHUNK_SIZE;
+
+ // make sure we don't go past the data size
+ if (i + chunkSize > dataSize) chunkSize = dataSize - i;
+
+ // make sure this chunk doesn't go past the bank boundary (256 bytes)
+ if (chunkSize > 256 - address) chunkSize = 256 - address;
+ debug.printf("reading %d", chunkSize);
+ // read the chunk of data as specified
+ read(MPU6050_RA_MEM_R_W, (char*)(data+i), chunkSize);
+ debug.printf("read");
+ // increase byte index by [chunkSize]
+ i += chunkSize;
+
+ // uint8_t automatically wraps to 0 at 256
+ address += chunkSize;
+
+ // if we aren't done, update bank (if necessary) and address
+ if (i < dataSize) {
+ if (address == 0) bank++;
+ setMemoryBank(bank);
+ setMemoryStartAddress(address);
+ }
+ }
+}
+bool MPU9150::writeMemoryBlock(const uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address, bool verify) {
+ setMemoryBank(bank);
+ setMemoryStartAddress(address);
+ uint8_t chunkSize;
+ uint8_t *verifyBuffer = 0;
+ uint8_t *progBuffer = 0;
+ uint16_t i;
+
+ if (verify) verifyBuffer = (uint8_t *)malloc(MPU6050_DMP_MEMORY_CHUNK_SIZE);
+ for (i = 0; i < dataSize;) {
+ // determine correct chunk size according to bank position and data size
+ chunkSize = MPU6050_DMP_MEMORY_CHUNK_SIZE;
+
+ // make sure we don't go past the data size
+ if (i + chunkSize > dataSize) chunkSize = dataSize - i;
+
+ // make sure this chunk doesn't go past the bank boundary (256 bytes)
+ if (chunkSize > 256 - address) chunkSize = 256 - address;
+
+ progBuffer = (uint8_t *)data + i;
+
+ write(MPU6050_RA_MEM_R_W, (char*)progBuffer, chunkSize);
+
+
+ // verify data if needed
+ if (verify && verifyBuffer) {
+ setMemoryBank(bank);
+ setMemoryStartAddress(address);
+ read(MPU6050_RA_MEM_R_W, (char*)verifyBuffer, chunkSize);
+ if (memcmp(progBuffer, verifyBuffer, chunkSize) != 0) {
+ free(verifyBuffer);
+ debug.printf("invalid(%d, %d)\r\n", bank, read_errors, write_errors);
+ return false; // uh oh.
+ }
+ }
+
+ // increase byte index by [chunkSize]
+ i += chunkSize;
+
+ // uint8_t automatically wraps to 0 at 256
+ address += chunkSize;
+
+ // if we aren't done, update bank (if necessary) and address
+ if (i < dataSize) {
+ if (address == 0) bank++;
+ setMemoryBank(bank);
+ setMemoryStartAddress(address);
+ }
+ }
+ if (verify) free(verifyBuffer);
+ return true;
+}
+bool MPU9150::writeDMPConfigurationSet(const uint8_t *data, uint16_t dataSize) {
+ uint8_t *progBuffer;
+ uint8_t success, special;
+ uint16_t i;
+
+ // config set data is a long string of blocks with the following structure:
+ // [bank] [offset] [length] [byte[0], byte[1], ..., byte[length]]
+ uint8_t bank, offset, length;
+ for (i = 0; i < dataSize;) {
+ bank = data[i++];
+ offset = data[i++];
+ length = data[i++];
+
+ // write data or perform special action
+ if (length > 0) {
+ progBuffer = (uint8_t *)data + i;
+ success = writeMemoryBlock(progBuffer, length, bank, offset, true);
+ i += length;
+ } else {
+ // special instruction
+ // NOTE: this kind of behavior (what and when to do certain things)
+ // is totally undocumented. This code is in here based on observed
+ // behavior only, and exactly why (or even whether) it has to be here
+ // is anybody's guess for now.
+ special = data[i++];
+
+ if (special == 0x01) {
+ // enable DMP-related interrupts
+ //setIntZeroMotionEnabled(true);
+ //setIntFIFOBufferOverflowEnabled(true);
+ //setIntDMPEnabled(true);
+ write(MPU6050_RA_INT_ENABLE, 0x32); // single operation
+ success = true;
+ } else {
+ // unknown special command
+ success = false;
+ }
+ }
+
+ if (!success) {
+ return false;
+ }
+ }
+ return true;
+}
+// DMP_CFG_1
+uint8_t MPU9150::getDMPConfig1() {
+ return get8(MPU6050_RA_DMP_CFG_1);
+
+}
+void MPU9150::setDMPConfig1(uint8_t config) {
+ write(MPU6050_RA_DMP_CFG_1, config);
+}
+
+// DMP_CFG_2
+uint8_t MPU9150::getDMPConfig2() {
+ return get8(MPU6050_RA_DMP_CFG_2);
+
+}
+void MPU9150::setDMPConfig2(uint8_t config) {
+ write(MPU6050_RA_DMP_CFG_2, config);
+}
+
+//Utility Functions
+bool MPU9150::getBit(char reg_addr, uint8_t bit){
+ uint8_t data = 0;
+ readBit(reg_addr, bit, &data);
+ return (bool)data;
+}
+
+int8_t MPU9150::get8(char reg_addr){
+ char data;
+ read(reg_addr, &data);
+ return data;
+}
+
+int16_t MPU9150::get16(char reg_addr){
+ char data[2];
+ if(!read(reg_addr, data, 2))debug.printf("get16: read fail:%02X\r\n", reg_addr);
+ return (data[0]<<8) + data[1];
+}
+
+int16_t MPU9150::get16L(char reg_addr){
+ char data[2];
+ read(reg_addr, data, 2);
+ return (data[1]<<8) + data[0];
+}
+
+bool MPU9150::write(char reg_addr, char data){
+ return write(reg_addr, &data, 1);
+}
+
+bool MPU9150::write(char reg_addr, char* data, int length){
+ i2c.start();
+ i2c.write(device_address << 1);
+ i2c.write(reg_addr);
+ for(int i = 0; i < length; i++) {
+ if(!i2c.write(data[i])){
+ write_errors++;
+ debug.printf("Write Error %d\r\n", reg_addr);
+ return false;
+ }
+ }
+ i2c.stop();
+ return true;
+}
+
+bool MPU9150::writeBit(char reg_addr, uint8_t bit, bool value){
+ return writeBits(reg_addr, bit, 1, (uint8_t)value);
+}
+
+bool MPU9150::writeBits(char reg_addr, uint8_t bit_start, uint8_t length, uint8_t data){
+ char ret;
+
+ if(!read(reg_addr, &ret)){
+ return false;
+ }
+
+ uint8_t mask = ((1 << length) - 1) << (bit_start - length + 1);
+ data <<= (bit_start - length + 1);
+
+ data &= mask;
+ ret &= ~(mask);
+ ret |= data;
+
+ return write(reg_addr, ret);
+}
+
+bool MPU9150::read(char reg_addr, char* data){
+ return read(reg_addr, data, 1);
+}
+
+bool MPU9150::read(char reg_addr, char* data, int length){
+ if(i2c.write(device_address << 1, ®_addr, 1, true)){
+ read_errors ++;
+ debug.printf("Read: Address Write Error %d\r\n", reg_addr);
+ return false;
+ }
+ if(i2c.read(device_address << 1, data, length)){
+ read_errors ++;
+ debug.printf("Read: Error %d\r\n", reg_addr);
+ return false;
+ }
+ return true;
+}
+
+
+bool MPU9150::readBit(char reg_addr, uint8_t bit_start, uint8_t *data){
+ return readBits(reg_addr, bit_start, 1, data);
+}
+
+bool MPU9150::readBits(char reg_addr, uint8_t bit_start, uint8_t length, uint8_t *data){
+ char ret;
+
+ if(!read(reg_addr, &ret)){
+ return false;
+ }
+
+ uint8_t mask = ((1 << length) - 1) << (bit_start - length + 1);
+ ret &= mask;
+ ret >>= (bit_start - length + 1);
+ *data = ret;
+
+ return true;
+}
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/MPU9150.h Sun Aug 31 12:52:29 2014 +0000
@@ -0,0 +1,212 @@
+#ifndef MPU9150_INCLUDE
+#define MPU9150_INCLUDE
+
+#include "mbed.h"
+#include "registers.h"
+#include "dmpdata.h"
+//https://github.com/sparkfun/MPU-9150_Breakout/blob/master/firmware/MPU6050/MPU6050_9Axis_MotionApps41.h
+extern Serial debug;
+
+class MPU9150{
+public:
+ MPU9150(PinName scl, PinName sda, PinName interrupt, bool secondary_addr = false):i2c(sda, scl){
+ device_address = MPU6050_DEFAULT_ADDRESS;
+ read_errors = 0;
+ write_errors = 0;
+ if(secondary_addr){
+ device_address = MPU6050_ADDRESS_AD0_HIGH;
+ }
+
+ // i2c.frequency(400000);
+ i2c.frequency(100000);
+ }
+ ~MPU9150(){}
+
+ bool getBit(char reg_addr, uint8_t bit);
+ int8_t get8(char reg_addr);
+ int16_t get16(char reg_addr);
+ int16_t get16L(char reg_addr);
+
+ bool read(char reg_addr, char* data);
+ bool read(char reg_addr, char* data, int length);
+ bool readBit(char reg_addr, uint8_t bit_start, uint8_t *data);
+ bool readBits(char reg_addr, uint8_t bit_start, uint8_t length, uint8_t *data);
+
+ bool write(char reg_addr, char data);
+ bool write(char reg_addr, char* data, int length);
+ bool writeBit(char reg_addr, uint8_t bit, bool value);
+ bool writeBits(char reg_addr, uint8_t bit_start, uint8_t length, uint8_t data);
+
+ uint8_t getDeviceID();
+ bool isReady();
+ void initialise();
+ void initialiseMagnetometer();
+ void initialiseDMP();
+
+
+ //PWR_MGMT_1 Control Register
+ void reset();
+ void sleep(bool state);
+ void cycleMode(bool state);
+ void disableTemperatureSensor(bool state);
+ void clockSelect(uint8_t clk);
+
+ //PWR_MGMT_2 Control Register
+ void setCycleWakeFrequency(uint8_t value);
+ void setStandbyAccX( bool value );
+ void setStandbyAccY( bool value );
+ void setStandbyAccZ( bool value );
+ void setStandbyGyroX( bool value );
+ void setStandbyGyroY( bool value );
+ void setStandbyGyroZ( bool value );
+
+ //SMPRT_DI Sample Rate Divider
+ void setSampleRateDivider(uint8_t value);
+
+ //CONFIG
+ void setExternalFrameSync(uint8_t value);
+ void setDigitalLowPassFilter(uint8_t value);
+
+ //GYRO_CONFIG
+ void setGyroSelfTest(bool value);
+ void setGyroFullScaleRange(uint8_t value);
+
+ //ACCEL_CONFIG
+ void setAccelSelfTest(bool value);
+ void setAccelFullScaleRange(uint8_t value);
+
+ //FIFO_EN
+ void setTemperatureFifo(bool value);
+ void setGyroFifo(bool value);
+ void setAccelFifo(bool value);
+ void setSlave2Fifo(bool value);
+ void setSlave1Fifo(bool value);
+ void setSlave0Fifo(bool value);
+
+ //I2C_MST_CTRL
+ void setMultiMaster(bool value);
+ void setWaitForExternalSensor(bool value);
+ void setSlave3Fifo(bool value);
+ void setMasterStartStop(bool value);
+ void setI2CMasterClock(uint8_t value);
+
+ //I2C_SLV0_ADDR
+ void setI2cSlaveRW(uint8_t slave_id, bool value);
+ void setI2cSlaveAddress(uint8_t slave_id, uint8_t value);
+ //I2C_SLV0_REG,
+ void setI2cSlaveRegister(uint8_t slave_id, uint8_t value);
+ //I2C_SLV0_CTRL
+ void setI2cSlaveEnable(uint8_t slave_id, bool value);
+ void setI2cSlaveByteSwap(uint8_t slave_id, bool value);
+ void setI2cSlaveRegDisable(uint8_t slave_id, bool value);
+ void setI2cSlaveByteGrouping(uint8_t slave_id, bool value);
+ void setI2cSlaveTransactionLength(uint8_t slave_id, uint8_t value);
+ //I2C_SLV0_DO
+ void setI2cSlaveDataOut(uint8_t slave_id, uint8_t value);
+ //I2C_MST_DELAY_CTRL
+ void setI2cSlaveDelay(uint8_t slave_id, uint8_t value);
+ void setI2cSlaveShadowDelay(uint8_t value) ;
+ //Slave4 is different
+ void setI2cSlave4RW( bool value);
+ void setI2cSlave4Address( uint8_t value);
+ void setI2cSlave4Register(uint8_t value);
+ void setI2cSlave4DataOut(uint8_t value);
+ void setI2cSlave4Enable(bool value);
+ void setI2cSlave4IntEnable(bool value);
+ void setI2cSlave4RegDisable(bool value);
+ void setI2cMasterDelay(uint8_t value);
+ uint8_t getI2cSlave4Di();
+
+ //I2C_MST_STATUS
+ bool setI2cPassthrough();
+ bool setI2cSlave4Done();
+ bool setI2cLostArbitration();
+ bool setI2cSlave0Nack();
+ bool setI2cSlave1Nack();
+ bool setI2cSlave2Nack();
+ bool setI2cSlave3Nack();
+ bool setI2cSlave4Nack();
+
+ //INT_PIN_CFG
+ void setInterruptActiveLow(bool value);
+ void setInterruptOpenDrain(bool value);
+ void setInterruptLatch(bool value);
+ void setInterruptAnyReadClear(bool value);
+ void setFsyncInterruptActiveLow(bool value);
+ void setFsyncInterruptEnable(bool value);
+ void setI2cAuxBypassEnable(bool value);
+
+ //INT_ENABLE
+ void setInterruptFifoOverflowEnable(bool value);
+ void setInterruptMasterEnable(bool value);
+ void setInterruptDataReadyEnable(bool value);
+
+ //INT_STATUS
+ bool getInterruptFifoOverflow();
+ bool getInterruptMaster();
+ bool getInterruptDataReady();
+ uint8_t getInterruptStatus();
+
+ //SIGNAL_PATH_RESET
+ void resetGyroSignalPath();
+ void resetAccelSignalPath();
+ void resetTempSignalPath();
+
+ //USER_CTRL
+ void setEnableFifo(bool value);
+ void setI2cMasterEnable(bool value);
+ void setFifoReset(bool value);
+ void setI2cMasterReset(bool value);
+ void setFullSensorReset(bool value);
+
+ //FIFO_COUNT_H and FIFO_COUNT_L
+ int16_t getFifoCount();
+
+ //FIFO_R_W
+ bool getFifoBuffer(char* buffer, int16_t length);
+
+ //UNDOCUMENTED
+ // XG_OFFS_TC
+ uint8_t getOTPBankValid();
+
+ //INT_ENABLE
+ void setIntPLLReadyEnabled(bool value);
+ void setIntDMPEnabled(bool value);
+
+ // INT_STATUS
+ bool getIntPLLReadyStatus();
+ bool getIntDMPStatus();
+
+ // USER_CTRL
+ bool getDMPEnabled();
+ void setDMPEnabled(bool value);
+ void resetDMP();
+
+ // BANK_SEL
+ void setMemoryBank(uint8_t bank, bool prefetchEnabled=false, bool userBank=false);
+
+ // MEM_START_ADDR
+ void setMemoryStartAddress(uint8_t address);
+
+ // MEM_R_W register
+ uint8_t readMemoryByte();
+ void writeMemoryByte(uint8_t value);
+ void readMemoryBlock(uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address);
+ bool writeMemoryBlock(const uint8_t *data, uint16_t dataSize, uint8_t bank = 0, uint8_t address = 0, bool verify = false);
+ bool writeDMPConfigurationSet(const uint8_t *data, uint16_t dataSize);
+
+ // DMP_CFG_1
+ uint8_t getDMPConfig1();
+ void setDMPConfig1(uint8_t config);
+
+ // DMP_CFG_2
+ uint8_t getDMPConfig2();
+ void setDMPConfig2(uint8_t config);
+
+ I2C i2c;
+ uint8_t device_address;
+ uint32_t read_errors;
+ uint32_t write_errors;
+};
+
+#endif
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/dmpdata.h Sun Aug 31 12:52:29 2014 +0000
@@ -0,0 +1,254 @@
+//ripped from sparkfun github
+
+/* ============================================
+I2Cdev device library code is placed under the MIT license
+Copyright (c) 2012 Jeff Rowberg
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+THE SOFTWARE.
+===============================================
+*/
+#define MPU6050_DMP_CODE_SIZE 1962 // dmpMemory[]
+#define MPU6050_DMP_CONFIG_SIZE 232 // dmpConfig[]
+#define MPU6050_DMP_UPDATES_SIZE 140 // dmpUpdates[]
+
+/* ================================================================================================ *
+ | Default MotionApps v4.1 48-byte FIFO packet structure: |
+ | |
+ | [QUAT W][ ][QUAT X][ ][QUAT Y][ ][QUAT Z][ ][GYRO X][ ][GYRO Y][ ] |
+ | 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 |
+ | |
+ | [GYRO Z][ ][MAG X ][MAG Y ][MAG Z ][ACC X ][ ][ACC Y ][ ][ACC Z ][ ][ ] |
+ | 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 |
+ * ================================================================================================ */
+
+// this block of memory gets written to the MPU on start-up, and it seems
+// to be volatile memory, so it has to be done each time (it only takes ~1
+// second though)
+const unsigned char dmpMemory[MPU6050_DMP_CODE_SIZE] = {
+ // bank 0, 256 bytes
+ 0xFB, 0x00, 0x00, 0x3E, 0x00, 0x0B, 0x00, 0x36, 0x00, 0x01, 0x00, 0x02, 0x00, 0x03, 0x00, 0x00,
+ 0x00, 0x65, 0x00, 0x54, 0xFF, 0xEF, 0x00, 0x00, 0xFA, 0x80, 0x00, 0x0B, 0x12, 0x82, 0x00, 0x01,
+ 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x28, 0x00, 0x00, 0xFF, 0xFF, 0x45, 0x81, 0xFF, 0xFF, 0xFA, 0x72, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x03, 0xE8, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, 0x7F, 0xFF, 0xFF, 0xFE, 0x80, 0x01,
+ 0x00, 0x1B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x3E, 0x03, 0x30, 0x40, 0x00, 0x00, 0x00, 0x02, 0xCA, 0xE3, 0x09, 0x3E, 0x80, 0x00, 0x00,
+ 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00,
+ 0x41, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x0B, 0x2A, 0x00, 0x00, 0x16, 0x55, 0x00, 0x00, 0x21, 0x82,
+ 0xFD, 0x87, 0x26, 0x50, 0xFD, 0x80, 0x00, 0x00, 0x00, 0x1F, 0x00, 0x00, 0x00, 0x05, 0x80, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00,
+ 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x6F, 0x00, 0x02, 0x65, 0x32, 0x00, 0x00, 0x5E, 0xC0,
+ 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0xFB, 0x8C, 0x6F, 0x5D, 0xFD, 0x5D, 0x08, 0xD9, 0x00, 0x7C, 0x73, 0x3B, 0x00, 0x6C, 0x12, 0xCC,
+ 0x32, 0x00, 0x13, 0x9D, 0x32, 0x00, 0xD0, 0xD6, 0x32, 0x00, 0x08, 0x00, 0x40, 0x00, 0x01, 0xF4,
+ 0xFF, 0xE6, 0x80, 0x79, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0xD0, 0xD6, 0x00, 0x00, 0x27, 0x10,
+
+ // bank 1, 256 bytes
+ 0xFB, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0xFA, 0x36, 0xFF, 0xBC, 0x30, 0x8E, 0x00, 0x05, 0xFB, 0xF0, 0xFF, 0xD9, 0x5B, 0xC8,
+ 0xFF, 0xD0, 0x9A, 0xBE, 0x00, 0x00, 0x10, 0xA9, 0xFF, 0xF4, 0x1E, 0xB2, 0x00, 0xCE, 0xBB, 0xF7,
+ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x02, 0x00, 0x02, 0x02, 0x00, 0x00, 0x0C,
+ 0xFF, 0xC2, 0x80, 0x00, 0x00, 0x01, 0x80, 0x00, 0x00, 0xCF, 0x80, 0x00, 0x40, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x14,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x03, 0x3F, 0x68, 0xB6, 0x79, 0x35, 0x28, 0xBC, 0xC6, 0x7E, 0xD1, 0x6C,
+ 0x80, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0xB2, 0x6A, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0xF0, 0x00, 0x00, 0x00, 0x30,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x25, 0x4D, 0x00, 0x2F, 0x70, 0x6D, 0x00, 0x00, 0x05, 0xAE, 0x00, 0x0C, 0x02, 0xD0,
+
+ // bank 2, 256 bytes
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x65, 0x00, 0x54, 0xFF, 0xEF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x01, 0x00, 0x00, 0x44, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x01, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x65, 0x00, 0x00, 0x00, 0x54, 0x00, 0x00, 0xFF, 0xEF, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x1B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
+ 0x00, 0x1B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x47, 0x78, 0xA2,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+
+ // bank 3, 256 bytes
+ 0xD8, 0xDC, 0xF4, 0xD8, 0xB9, 0xAB, 0xF3, 0xF8, 0xFA, 0xF1, 0xBA, 0xA2, 0xDE, 0xB2, 0xB8, 0xB4,
+ 0xA8, 0x81, 0x98, 0xF7, 0x4A, 0x90, 0x7F, 0x91, 0x6A, 0xF3, 0xF9, 0xDB, 0xA8, 0xF9, 0xB0, 0xBA,
+ 0xA0, 0x80, 0xF2, 0xCE, 0x81, 0xF3, 0xC2, 0xF1, 0xC1, 0xF2, 0xC3, 0xF3, 0xCC, 0xA2, 0xB2, 0x80,
+ 0xF1, 0xC6, 0xD8, 0x80, 0xBA, 0xA7, 0xDF, 0xDF, 0xDF, 0xF2, 0xA7, 0xC3, 0xCB, 0xC5, 0xB6, 0xF0,
+ 0x87, 0xA2, 0x94, 0x24, 0x48, 0x70, 0x3C, 0x95, 0x40, 0x68, 0x34, 0x58, 0x9B, 0x78, 0xA2, 0xF1,
+ 0x83, 0x92, 0x2D, 0x55, 0x7D, 0xD8, 0xB1, 0xB4, 0xB8, 0xA1, 0xD0, 0x91, 0x80, 0xF2, 0x70, 0xF3,
+ 0x70, 0xF2, 0x7C, 0x80, 0xA8, 0xF1, 0x01, 0xB0, 0x98, 0x87, 0xD9, 0x43, 0xD8, 0x86, 0xC9, 0x88,
+ 0xBA, 0xA1, 0xF2, 0x0E, 0xB8, 0x97, 0x80, 0xF1, 0xA9, 0xDF, 0xDF, 0xDF, 0xAA, 0xDF, 0xDF, 0xDF,
+ 0xF2, 0xAA, 0xC5, 0xCD, 0xC7, 0xA9, 0x0C, 0xC9, 0x2C, 0x97, 0x97, 0x97, 0x97, 0xF1, 0xA9, 0x89,
+ 0x26, 0x46, 0x66, 0xB0, 0xB4, 0xBA, 0x80, 0xAC, 0xDE, 0xF2, 0xCA, 0xF1, 0xB2, 0x8C, 0x02, 0xA9,
+ 0xB6, 0x98, 0x00, 0x89, 0x0E, 0x16, 0x1E, 0xB8, 0xA9, 0xB4, 0x99, 0x2C, 0x54, 0x7C, 0xB0, 0x8A,
+ 0xA8, 0x96, 0x36, 0x56, 0x76, 0xF1, 0xB9, 0xAF, 0xB4, 0xB0, 0x83, 0xC0, 0xB8, 0xA8, 0x97, 0x11,
+ 0xB1, 0x8F, 0x98, 0xB9, 0xAF, 0xF0, 0x24, 0x08, 0x44, 0x10, 0x64, 0x18, 0xF1, 0xA3, 0x29, 0x55,
+ 0x7D, 0xAF, 0x83, 0xB5, 0x93, 0xF0, 0x00, 0x28, 0x50, 0xF5, 0xBA, 0xAD, 0x8F, 0x9F, 0x28, 0x54,
+ 0x7C, 0xB9, 0xF1, 0xA3, 0x86, 0x9F, 0x61, 0xA6, 0xDA, 0xDE, 0xDF, 0xDB, 0xB2, 0xB6, 0x8E, 0x9D,
+ 0xAE, 0xF5, 0x60, 0x68, 0x70, 0xB1, 0xB5, 0xF1, 0xDA, 0xA6, 0xDF, 0xD9, 0xA6, 0xFA, 0xA3, 0x86,
+
+ // bank 4, 256 bytes
+ 0x96, 0xDB, 0x31, 0xA6, 0xD9, 0xF8, 0xDF, 0xBA, 0xA6, 0x8F, 0xC2, 0xC5, 0xC7, 0xB2, 0x8C, 0xC1,
+ 0xB8, 0xA2, 0xDF, 0xDF, 0xDF, 0xA3, 0xDF, 0xDF, 0xDF, 0xD8, 0xD8, 0xF1, 0xB8, 0xA8, 0xB2, 0x86,
+ 0xB4, 0x98, 0x0D, 0x35, 0x5D, 0xB8, 0xAA, 0x98, 0xB0, 0x87, 0x2D, 0x35, 0x3D, 0xB2, 0xB6, 0xBA,
+ 0xAF, 0x8C, 0x96, 0x19, 0x8F, 0x9F, 0xA7, 0x0E, 0x16, 0x1E, 0xB4, 0x9A, 0xB8, 0xAA, 0x87, 0x2C,
+ 0x54, 0x7C, 0xB9, 0xA3, 0xDE, 0xDF, 0xDF, 0xA3, 0xB1, 0x80, 0xF2, 0xC4, 0xCD, 0xC9, 0xF1, 0xB8,
+ 0xA9, 0xB4, 0x99, 0x83, 0x0D, 0x35, 0x5D, 0x89, 0xB9, 0xA3, 0x2D, 0x55, 0x7D, 0xB5, 0x93, 0xA3,
+ 0x0E, 0x16, 0x1E, 0xA9, 0x2C, 0x54, 0x7C, 0xB8, 0xB4, 0xB0, 0xF1, 0x97, 0x83, 0xA8, 0x11, 0x84,
+ 0xA5, 0x09, 0x98, 0xA3, 0x83, 0xF0, 0xDA, 0x24, 0x08, 0x44, 0x10, 0x64, 0x18, 0xD8, 0xF1, 0xA5,
+ 0x29, 0x55, 0x7D, 0xA5, 0x85, 0x95, 0x02, 0x1A, 0x2E, 0x3A, 0x56, 0x5A, 0x40, 0x48, 0xF9, 0xF3,
+ 0xA3, 0xD9, 0xF8, 0xF0, 0x98, 0x83, 0x24, 0x08, 0x44, 0x10, 0x64, 0x18, 0x97, 0x82, 0xA8, 0xF1,
+ 0x11, 0xF0, 0x98, 0xA2, 0x24, 0x08, 0x44, 0x10, 0x64, 0x18, 0xDA, 0xF3, 0xDE, 0xD8, 0x83, 0xA5,
+ 0x94, 0x01, 0xD9, 0xA3, 0x02, 0xF1, 0xA2, 0xC3, 0xC5, 0xC7, 0xD8, 0xF1, 0x84, 0x92, 0xA2, 0x4D,
+ 0xDA, 0x2A, 0xD8, 0x48, 0x69, 0xD9, 0x2A, 0xD8, 0x68, 0x55, 0xDA, 0x32, 0xD8, 0x50, 0x71, 0xD9,
+ 0x32, 0xD8, 0x70, 0x5D, 0xDA, 0x3A, 0xD8, 0x58, 0x79, 0xD9, 0x3A, 0xD8, 0x78, 0x93, 0xA3, 0x4D,
+ 0xDA, 0x2A, 0xD8, 0x48, 0x69, 0xD9, 0x2A, 0xD8, 0x68, 0x55, 0xDA, 0x32, 0xD8, 0x50, 0x71, 0xD9,
+ 0x32, 0xD8, 0x70, 0x5D, 0xDA, 0x3A, 0xD8, 0x58, 0x79, 0xD9, 0x3A, 0xD8, 0x78, 0xA8, 0x8A, 0x9A,
+
+ // bank 5, 256 bytes
+ 0xF0, 0x28, 0x50, 0x78, 0x9E, 0xF3, 0x88, 0x18, 0xF1, 0x9F, 0x1D, 0x98, 0xA8, 0xD9, 0x08, 0xD8,
+ 0xC8, 0x9F, 0x12, 0x9E, 0xF3, 0x15, 0xA8, 0xDA, 0x12, 0x10, 0xD8, 0xF1, 0xAF, 0xC8, 0x97, 0x87,
+ 0x34, 0xB5, 0xB9, 0x94, 0xA4, 0x21, 0xF3, 0xD9, 0x22, 0xD8, 0xF2, 0x2D, 0xF3, 0xD9, 0x2A, 0xD8,
+ 0xF2, 0x35, 0xF3, 0xD9, 0x32, 0xD8, 0x81, 0xA4, 0x60, 0x60, 0x61, 0xD9, 0x61, 0xD8, 0x6C, 0x68,
+ 0x69, 0xD9, 0x69, 0xD8, 0x74, 0x70, 0x71, 0xD9, 0x71, 0xD8, 0xB1, 0xA3, 0x84, 0x19, 0x3D, 0x5D,
+ 0xA3, 0x83, 0x1A, 0x3E, 0x5E, 0x93, 0x10, 0x30, 0x81, 0x10, 0x11, 0xB8, 0xB0, 0xAF, 0x8F, 0x94,
+ 0xF2, 0xDA, 0x3E, 0xD8, 0xB4, 0x9A, 0xA8, 0x87, 0x29, 0xDA, 0xF8, 0xD8, 0x87, 0x9A, 0x35, 0xDA,
+ 0xF8, 0xD8, 0x87, 0x9A, 0x3D, 0xDA, 0xF8, 0xD8, 0xB1, 0xB9, 0xA4, 0x98, 0x85, 0x02, 0x2E, 0x56,
+ 0xA5, 0x81, 0x00, 0x0C, 0x14, 0xA3, 0x97, 0xB0, 0x8A, 0xF1, 0x2D, 0xD9, 0x28, 0xD8, 0x4D, 0xD9,
+ 0x48, 0xD8, 0x6D, 0xD9, 0x68, 0xD8, 0xB1, 0x84, 0x0D, 0xDA, 0x0E, 0xD8, 0xA3, 0x29, 0x83, 0xDA,
+ 0x2C, 0x0E, 0xD8, 0xA3, 0x84, 0x49, 0x83, 0xDA, 0x2C, 0x4C, 0x0E, 0xD8, 0xB8, 0xB0, 0x97, 0x86,
+ 0xA8, 0x31, 0x9B, 0x06, 0x99, 0x07, 0xAB, 0x97, 0x28, 0x88, 0x9B, 0xF0, 0x0C, 0x20, 0x14, 0x40,
+ 0xB9, 0xA3, 0x8A, 0xC3, 0xC5, 0xC7, 0x9A, 0xA3, 0x28, 0x50, 0x78, 0xF1, 0xB5, 0x93, 0x01, 0xD9,
+ 0xDF, 0xDF, 0xDF, 0xD8, 0xB8, 0xB4, 0xA8, 0x8C, 0x9C, 0xF0, 0x04, 0x28, 0x51, 0x79, 0x1D, 0x30,
+ 0x14, 0x38, 0xB2, 0x82, 0xAB, 0xD0, 0x98, 0x2C, 0x50, 0x50, 0x78, 0x78, 0x9B, 0xF1, 0x1A, 0xB0,
+ 0xF0, 0xB1, 0x83, 0x9C, 0xA8, 0x29, 0x51, 0x79, 0xB0, 0x8B, 0x29, 0x51, 0x79, 0xB1, 0x83, 0x24,
+
+ // bank 6, 256 bytes
+ 0x70, 0x59, 0xB0, 0x8B, 0x20, 0x58, 0x71, 0xB1, 0x83, 0x44, 0x69, 0x38, 0xB0, 0x8B, 0x39, 0x40,
+ 0x68, 0xB1, 0x83, 0x64, 0x48, 0x31, 0xB0, 0x8B, 0x30, 0x49, 0x60, 0xA5, 0x88, 0x20, 0x09, 0x71,
+ 0x58, 0x44, 0x68, 0x11, 0x39, 0x64, 0x49, 0x30, 0x19, 0xF1, 0xAC, 0x00, 0x2C, 0x54, 0x7C, 0xF0,
+ 0x8C, 0xA8, 0x04, 0x28, 0x50, 0x78, 0xF1, 0x88, 0x97, 0x26, 0xA8, 0x59, 0x98, 0xAC, 0x8C, 0x02,
+ 0x26, 0x46, 0x66, 0xF0, 0x89, 0x9C, 0xA8, 0x29, 0x51, 0x79, 0x24, 0x70, 0x59, 0x44, 0x69, 0x38,
+ 0x64, 0x48, 0x31, 0xA9, 0x88, 0x09, 0x20, 0x59, 0x70, 0xAB, 0x11, 0x38, 0x40, 0x69, 0xA8, 0x19,
+ 0x31, 0x48, 0x60, 0x8C, 0xA8, 0x3C, 0x41, 0x5C, 0x20, 0x7C, 0x00, 0xF1, 0x87, 0x98, 0x19, 0x86,
+ 0xA8, 0x6E, 0x76, 0x7E, 0xA9, 0x99, 0x88, 0x2D, 0x55, 0x7D, 0x9E, 0xB9, 0xA3, 0x8A, 0x22, 0x8A,
+ 0x6E, 0x8A, 0x56, 0x8A, 0x5E, 0x9F, 0xB1, 0x83, 0x06, 0x26, 0x46, 0x66, 0x0E, 0x2E, 0x4E, 0x6E,
+ 0x9D, 0xB8, 0xAD, 0x00, 0x2C, 0x54, 0x7C, 0xF2, 0xB1, 0x8C, 0xB4, 0x99, 0xB9, 0xA3, 0x2D, 0x55,
+ 0x7D, 0x81, 0x91, 0xAC, 0x38, 0xAD, 0x3A, 0xB5, 0x83, 0x91, 0xAC, 0x2D, 0xD9, 0x28, 0xD8, 0x4D,
+ 0xD9, 0x48, 0xD8, 0x6D, 0xD9, 0x68, 0xD8, 0x8C, 0x9D, 0xAE, 0x29, 0xD9, 0x04, 0xAE, 0xD8, 0x51,
+ 0xD9, 0x04, 0xAE, 0xD8, 0x79, 0xD9, 0x04, 0xD8, 0x81, 0xF3, 0x9D, 0xAD, 0x00, 0x8D, 0xAE, 0x19,
+ 0x81, 0xAD, 0xD9, 0x01, 0xD8, 0xF2, 0xAE, 0xDA, 0x26, 0xD8, 0x8E, 0x91, 0x29, 0x83, 0xA7, 0xD9,
+ 0xAD, 0xAD, 0xAD, 0xAD, 0xF3, 0x2A, 0xD8, 0xD8, 0xF1, 0xB0, 0xAC, 0x89, 0x91, 0x3E, 0x5E, 0x76,
+ 0xF3, 0xAC, 0x2E, 0x2E, 0xF1, 0xB1, 0x8C, 0x5A, 0x9C, 0xAC, 0x2C, 0x28, 0x28, 0x28, 0x9C, 0xAC,
+
+ // bank 7, 170 bytes (remainder)
+ 0x30, 0x18, 0xA8, 0x98, 0x81, 0x28, 0x34, 0x3C, 0x97, 0x24, 0xA7, 0x28, 0x34, 0x3C, 0x9C, 0x24,
+ 0xF2, 0xB0, 0x89, 0xAC, 0x91, 0x2C, 0x4C, 0x6C, 0x8A, 0x9B, 0x2D, 0xD9, 0xD8, 0xD8, 0x51, 0xD9,
+ 0xD8, 0xD8, 0x79, 0xD9, 0xD8, 0xD8, 0xF1, 0x9E, 0x88, 0xA3, 0x31, 0xDA, 0xD8, 0xD8, 0x91, 0x2D,
+ 0xD9, 0x28, 0xD8, 0x4D, 0xD9, 0x48, 0xD8, 0x6D, 0xD9, 0x68, 0xD8, 0xB1, 0x83, 0x93, 0x35, 0x3D,
+ 0x80, 0x25, 0xDA, 0xD8, 0xD8, 0x85, 0x69, 0xDA, 0xD8, 0xD8, 0xB4, 0x93, 0x81, 0xA3, 0x28, 0x34,
+ 0x3C, 0xF3, 0xAB, 0x8B, 0xA3, 0x91, 0xB6, 0x09, 0xB4, 0xD9, 0xAB, 0xDE, 0xB0, 0x87, 0x9C, 0xB9,
+ 0xA3, 0xDD, 0xF1, 0xA3, 0xA3, 0xA3, 0xA3, 0x95, 0xF1, 0xA3, 0xA3, 0xA3, 0x9D, 0xF1, 0xA3, 0xA3,
+ 0xA3, 0xA3, 0xF2, 0xA3, 0xB4, 0x90, 0x80, 0xF2, 0xA3, 0xA3, 0xA3, 0xA3, 0xA3, 0xA3, 0xA3, 0xA3,
+ 0xA3, 0xA3, 0xB2, 0xA3, 0xA3, 0xA3, 0xA3, 0xA3, 0xA3, 0xB0, 0x87, 0xB5, 0x99, 0xF1, 0xA3, 0xA3,
+ 0xA3, 0x98, 0xF1, 0xA3, 0xA3, 0xA3, 0xA3, 0x97, 0xA3, 0xA3, 0xA3, 0xA3, 0xF3, 0x9B, 0xA3, 0xA3,
+ 0xDC, 0xB9, 0xA7, 0xF1, 0x26, 0x26, 0x26, 0xD8, 0xD8, 0xFF
+};
+
+const unsigned char dmpConfig[MPU6050_DMP_CONFIG_SIZE] = {
+// BANK OFFSET LENGTH [DATA]
+ 0x02, 0xEC, 0x04, 0x00, 0x47, 0x7D, 0x1A, // ?
+ 0x03, 0x82, 0x03, 0x4C, 0xCD, 0x6C, // FCFG_1 inv_set_gyro_calibration
+ 0x03, 0xB2, 0x03, 0x36, 0x56, 0x76, // FCFG_3 inv_set_gyro_calibration
+ 0x00, 0x68, 0x04, 0x02, 0xCA, 0xE3, 0x09, // D_0_104 inv_set_gyro_calibration
+ 0x01, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, // D_1_152 inv_set_accel_calibration
+ 0x03, 0x86, 0x03, 0x0C, 0xC9, 0x2C, // FCFG_2 inv_set_accel_calibration
+ 0x03, 0x90, 0x03, 0x26, 0x46, 0x66, // (continued)...FCFG_2 inv_set_accel_calibration
+ 0x00, 0x6C, 0x02, 0x40, 0x00, // D_0_108 inv_set_accel_calibration
+
+ 0x02, 0x40, 0x04, 0x00, 0x00, 0x00, 0x00, // CPASS_MTX_00 inv_set_compass_calibration
+ 0x02, 0x44, 0x04, 0x40, 0x00, 0x00, 0x00, // CPASS_MTX_01
+ 0x02, 0x48, 0x04, 0x00, 0x00, 0x00, 0x00, // CPASS_MTX_02
+ 0x02, 0x4C, 0x04, 0x40, 0x00, 0x00, 0x00, // CPASS_MTX_10
+ 0x02, 0x50, 0x04, 0x00, 0x00, 0x00, 0x00, // CPASS_MTX_11
+ 0x02, 0x54, 0x04, 0x00, 0x00, 0x00, 0x00, // CPASS_MTX_12
+ 0x02, 0x58, 0x04, 0x00, 0x00, 0x00, 0x00, // CPASS_MTX_20
+ 0x02, 0x5C, 0x04, 0x00, 0x00, 0x00, 0x00, // CPASS_MTX_21
+ 0x02, 0xBC, 0x04, 0xC0, 0x00, 0x00, 0x00, // CPASS_MTX_22
+
+ 0x01, 0xEC, 0x04, 0x00, 0x00, 0x40, 0x00, // D_1_236 inv_apply_endian_accel
+ 0x03, 0x86, 0x06, 0x0C, 0xC9, 0x2C, 0x97, 0x97, 0x97, // FCFG_2 inv_set_mpu_sensors
+ 0x04, 0x22, 0x03, 0x0D, 0x35, 0x5D, // CFG_MOTION_BIAS inv_turn_on_bias_from_no_motion
+ 0x00, 0xA3, 0x01, 0x00, // ?
+ 0x04, 0x29, 0x04, 0x87, 0x2D, 0x35, 0x3D, // FCFG_5 inv_set_bias_update
+ 0x07, 0x62, 0x05, 0xF1, 0x20, 0x28, 0x30, 0x38, // CFG_8 inv_send_quaternion
+ 0x07, 0x9F, 0x01, 0x30, // CFG_16 inv_set_footer
+ 0x07, 0x67, 0x01, 0x9A, // CFG_GYRO_SOURCE inv_send_gyro
+ 0x07, 0x68, 0x04, 0xF1, 0x28, 0x30, 0x38, // CFG_9 inv_send_gyro -> inv_construct3_fifo
+ 0x07, 0x62, 0x05, 0xF1, 0x20, 0x28, 0x30, 0x38, // ?
+ 0x02, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, // ?
+ 0x07, 0x83, 0x06, 0xC2, 0xCA, 0xC4, 0xA3, 0xA3, 0xA3, // ?
+ // SPECIAL 0x01 = enable interrupts
+ 0x00, 0x00, 0x00, 0x01, // SET INT_ENABLE, SPECIAL INSTRUCTION
+ 0x07, 0xA7, 0x01, 0xFE, // ?
+ 0x07, 0x62, 0x05, 0xF1, 0x20, 0x28, 0x30, 0x38, // ?
+ 0x07, 0x67, 0x01, 0x9A, // ?
+ 0x07, 0x68, 0x04, 0xF1, 0x28, 0x30, 0x38, // CFG_12 inv_send_accel -> inv_construct3_fifo
+ 0x07, 0x8D, 0x04, 0xF1, 0x28, 0x30, 0x38, // ??? CFG_12 inv_send_mag -> inv_construct3_fifo
+ 0x02, 0x16, 0x02, 0x00, 0x09 // D_0_22 inv_set_fifo_rate
+
+ // This very last 0x01 WAS a 0x09, which drops the FIFO rate down to 20 Hz. 0x07 is 25 Hz,
+ // 0x01 is 100Hz. Going faster than 100Hz (0x00=200Hz) tends to result in very noisy data.
+ // DMP output frequency is calculated easily using this equation: (200Hz / (1 + value))
+
+ // It is important to make sure the host processor can keep up with reading and processing
+ // the FIFO output at the desired rate. Handling FIFO overflow cleanly is also a good idea.
+};
+
+const unsigned char dmpUpdates[MPU6050_DMP_UPDATES_SIZE] = {
+ 0x01, 0xB2, 0x02, 0xFF, 0xF5,
+ 0x01, 0x90, 0x04, 0x0A, 0x0D, 0x97, 0xC0,
+ 0x00, 0xA3, 0x01, 0x00,
+ 0x04, 0x29, 0x04, 0x87, 0x2D, 0x35, 0x3D,
+ 0x01, 0x6A, 0x02, 0x06, 0x00,
+ 0x01, 0x60, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x60, 0x04, 0x40, 0x00, 0x00, 0x00,
+ 0x02, 0x60, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x01, 0x08, 0x02, 0x01, 0x20,
+ 0x01, 0x0A, 0x02, 0x00, 0x4E,
+ 0x01, 0x02, 0x02, 0xFE, 0xB3,
+ 0x02, 0x6C, 0x04, 0x00, 0x00, 0x00, 0x00, // READ
+ 0x02, 0x6C, 0x04, 0xFA, 0xFE, 0x00, 0x00,
+ 0x02, 0x60, 0x0C, 0xFF, 0xFF, 0xCB, 0x4D, 0x00, 0x01, 0x08, 0xC1, 0xFF, 0xFF, 0xBC, 0x2C,
+ 0x02, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00,
+ 0x02, 0xF8, 0x04, 0x00, 0x00, 0x00, 0x00,
+ 0x02, 0xFC, 0x04, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x60, 0x04, 0x40, 0x00, 0x00, 0x00,
+ 0x00, 0x60, 0x04, 0x00, 0x40, 0x00, 0x00
+};
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/registers.h Sun Aug 31 12:52:29 2014 +0000 @@ -0,0 +1,389 @@ +//registers ripped from sparkfun github + +/* ============================================ +I2Cdev device library code is placed under the MIT license +Copyright (c) 2012 Jeff Rowberg + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +THE SOFTWARE. +=============================================== +*/ + +//Magnetometer Registers +#define MPU9150_RA_MAG_ADDRESS 0x0C +#define MPU9150_RA_MAG_XOUT_L 0x03 +#define MPU9150_RA_MAG_XOUT_H 0x04 +#define MPU9150_RA_MAG_YOUT_L 0x05 +#define MPU9150_RA_MAG_YOUT_H 0x06 +#define MPU9150_RA_MAG_ZOUT_L 0x07 +#define MPU9150_RA_MAG_ZOUT_H 0x08 +#define MPU9150_RA_MAG_CTRL 0x0A + +#define MPU6050_ADDRESS_AD0_LOW 0x68 // address pin low (GND), default for InvenSense evaluation board +#define MPU6050_ADDRESS_AD0_HIGH 0x69 // address pin high (VCC) +#define MPU6050_DEFAULT_ADDRESS MPU6050_ADDRESS_AD0_LOW + +#define MPU6050_RA_XG_OFFS_TC 0x00 //[7] PWR_MODE, [6:1] XG_OFFS_TC, [0] OTP_BNK_VLD +#define MPU6050_RA_YG_OFFS_TC 0x01 //[7] PWR_MODE, [6:1] YG_OFFS_TC, [0] OTP_BNK_VLD +#define MPU6050_RA_ZG_OFFS_TC 0x02 //[7] PWR_MODE, [6:1] ZG_OFFS_TC, [0] OTP_BNK_VLD +#define MPU6050_RA_X_FINE_GAIN 0x03 //[7:0] X_FINE_GAIN +#define MPU6050_RA_Y_FINE_GAIN 0x04 //[7:0] Y_FINE_GAIN +#define MPU6050_RA_Z_FINE_GAIN 0x05 //[7:0] Z_FINE_GAIN +#define MPU6050_RA_XA_OFFS_H 0x06 //[15:0] XA_OFFS +#define MPU6050_RA_XA_OFFS_L_TC 0x07 +#define MPU6050_RA_YA_OFFS_H 0x08 //[15:0] YA_OFFS +#define MPU6050_RA_YA_OFFS_L_TC 0x09 +#define MPU6050_RA_ZA_OFFS_H 0x0A //[15:0] ZA_OFFS +#define MPU6050_RA_ZA_OFFS_L_TC 0x0B +#define MPU6050_RA_XG_OFFS_USRH 0x13 //[15:0] XG_OFFS_USR +#define MPU6050_RA_XG_OFFS_USRL 0x14 +#define MPU6050_RA_YG_OFFS_USRH 0x15 //[15:0] YG_OFFS_USR +#define MPU6050_RA_YG_OFFS_USRL 0x16 +#define MPU6050_RA_ZG_OFFS_USRH 0x17 //[15:0] ZG_OFFS_USR +#define MPU6050_RA_ZG_OFFS_USRL 0x18 +#define MPU6050_RA_SMPLRT_DIV 0x19 +#define MPU6050_RA_CONFIG 0x1A +#define MPU6050_RA_GYRO_CONFIG 0x1B +#define MPU6050_RA_ACCEL_CONFIG 0x1C +#define MPU6050_RA_FF_THR 0x1D +#define MPU6050_RA_FF_DUR 0x1E +#define MPU6050_RA_MOT_THR 0x1F +#define MPU6050_RA_MOT_DUR 0x20 +#define MPU6050_RA_ZRMOT_THR 0x21 +#define MPU6050_RA_ZRMOT_DUR 0x22 +#define MPU6050_RA_FIFO_EN 0x23 +#define MPU6050_RA_I2C_MST_CTRL 0x24 +#define MPU6050_RA_I2C_SLV0_ADDR 0x25 +#define MPU6050_RA_I2C_SLV0_REG 0x26 +#define MPU6050_RA_I2C_SLV0_CTRL 0x27 +#define MPU6050_RA_I2C_SLV1_ADDR 0x28 +#define MPU6050_RA_I2C_SLV1_REG 0x29 +#define MPU6050_RA_I2C_SLV1_CTRL 0x2A +#define MPU6050_RA_I2C_SLV2_ADDR 0x2B +#define MPU6050_RA_I2C_SLV2_REG 0x2C +#define MPU6050_RA_I2C_SLV2_CTRL 0x2D +#define MPU6050_RA_I2C_SLV3_ADDR 0x2E +#define MPU6050_RA_I2C_SLV3_REG 0x2F +#define MPU6050_RA_I2C_SLV3_CTRL 0x30 +#define MPU6050_RA_I2C_SLV4_ADDR 0x31 +#define MPU6050_RA_I2C_SLV4_REG 0x32 +#define MPU6050_RA_I2C_SLV4_DO 0x33 +#define MPU6050_RA_I2C_SLV4_CTRL 0x34 +#define MPU6050_RA_I2C_SLV4_DI 0x35 +#define MPU6050_RA_I2C_MST_STATUS 0x36 +#define MPU6050_RA_INT_PIN_CFG 0x37 +#define MPU6050_RA_INT_ENABLE 0x38 +#define MPU6050_RA_DMP_INT_STATUS 0x39 +#define MPU6050_RA_INT_STATUS 0x3A +#define MPU6050_RA_ACCEL_XOUT_H 0x3B +#define MPU6050_RA_ACCEL_XOUT_L 0x3C +#define MPU6050_RA_ACCEL_YOUT_H 0x3D +#define MPU6050_RA_ACCEL_YOUT_L 0x3E +#define MPU6050_RA_ACCEL_ZOUT_H 0x3F +#define MPU6050_RA_ACCEL_ZOUT_L 0x40 +#define MPU6050_RA_TEMP_OUT_H 0x41 +#define MPU6050_RA_TEMP_OUT_L 0x42 +#define MPU6050_RA_GYRO_XOUT_H 0x43 +#define MPU6050_RA_GYRO_XOUT_L 0x44 +#define MPU6050_RA_GYRO_YOUT_H 0x45 +#define MPU6050_RA_GYRO_YOUT_L 0x46 +#define MPU6050_RA_GYRO_ZOUT_H 0x47 +#define MPU6050_RA_GYRO_ZOUT_L 0x48 +#define MPU6050_RA_EXT_SENS_DATA_00 0x49 +#define MPU6050_RA_EXT_SENS_DATA_01 0x4A +#define MPU6050_RA_EXT_SENS_DATA_02 0x4B +#define MPU6050_RA_EXT_SENS_DATA_03 0x4C +#define MPU6050_RA_EXT_SENS_DATA_04 0x4D +#define MPU6050_RA_EXT_SENS_DATA_05 0x4E +#define MPU6050_RA_EXT_SENS_DATA_06 0x4F +#define MPU6050_RA_EXT_SENS_DATA_07 0x50 +#define MPU6050_RA_EXT_SENS_DATA_08 0x51 +#define MPU6050_RA_EXT_SENS_DATA_09 0x52 +#define MPU6050_RA_EXT_SENS_DATA_10 0x53 +#define MPU6050_RA_EXT_SENS_DATA_11 0x54 +#define MPU6050_RA_EXT_SENS_DATA_12 0x55 +#define MPU6050_RA_EXT_SENS_DATA_13 0x56 +#define MPU6050_RA_EXT_SENS_DATA_14 0x57 +#define MPU6050_RA_EXT_SENS_DATA_15 0x58 +#define MPU6050_RA_EXT_SENS_DATA_16 0x59 +#define MPU6050_RA_EXT_SENS_DATA_17 0x5A +#define MPU6050_RA_EXT_SENS_DATA_18 0x5B +#define MPU6050_RA_EXT_SENS_DATA_19 0x5C +#define MPU6050_RA_EXT_SENS_DATA_20 0x5D +#define MPU6050_RA_EXT_SENS_DATA_21 0x5E +#define MPU6050_RA_EXT_SENS_DATA_22 0x5F +#define MPU6050_RA_EXT_SENS_DATA_23 0x60 +#define MPU6050_RA_MOT_DETECT_STATUS 0x61 +#define MPU6050_RA_I2C_SLV0_DO 0x63 +#define MPU6050_RA_I2C_SLV1_DO 0x64 +#define MPU6050_RA_I2C_SLV2_DO 0x65 +#define MPU6050_RA_I2C_SLV3_DO 0x66 +#define MPU6050_RA_I2C_MST_DELAY_CTRL 0x67 +#define MPU6050_RA_SIGNAL_PATH_RESET 0x68 +#define MPU6050_RA_MOT_DETECT_CTRL 0x69 +#define MPU6050_RA_USER_CTRL 0x6A +#define MPU6050_RA_PWR_MGMT_1 0x6B +#define MPU6050_RA_PWR_MGMT_2 0x6C +#define MPU6050_RA_BANK_SEL 0x6D +#define MPU6050_RA_MEM_START_ADDR 0x6E +#define MPU6050_RA_MEM_R_W 0x6F +#define MPU6050_RA_DMP_CFG_1 0x70 +#define MPU6050_RA_DMP_CFG_2 0x71 +#define MPU6050_RA_FIFO_COUNTH 0x72 +#define MPU6050_RA_FIFO_COUNTL 0x73 +#define MPU6050_RA_FIFO_R_W 0x74 +#define MPU6050_RA_WHO_AM_I 0x75 + +#define MPU6050_TC_PWR_MODE_BIT 7 +#define MPU6050_TC_OFFSET_BIT 6 +#define MPU6050_TC_OFFSET_LENGTH 6 +#define MPU6050_TC_OTP_BNK_VLD_BIT 0 + +#define MPU6050_VDDIO_LEVEL_VLOGIC 0 +#define MPU6050_VDDIO_LEVEL_VDD 1 + +#define MPU6050_CFG_EXT_SYNC_SET_BIT 5 +#define MPU6050_CFG_EXT_SYNC_SET_LENGTH 3 +#define MPU6050_CFG_DLPF_CFG_BIT 2 +#define MPU6050_CFG_DLPF_CFG_LENGTH 3 + +#define MPU6050_EXT_SYNC_DISABLED 0x0 +#define MPU6050_EXT_SYNC_TEMP_OUT_L 0x1 +#define MPU6050_EXT_SYNC_GYRO_XOUT_L 0x2 +#define MPU6050_EXT_SYNC_GYRO_YOUT_L 0x3 +#define MPU6050_EXT_SYNC_GYRO_ZOUT_L 0x4 +#define MPU6050_EXT_SYNC_ACCEL_XOUT_L 0x5 +#define MPU6050_EXT_SYNC_ACCEL_YOUT_L 0x6 +#define MPU6050_EXT_SYNC_ACCEL_ZOUT_L 0x7 + +#define MPU6050_DLPF_BW_256 0x00 +#define MPU6050_DLPF_BW_188 0x01 +#define MPU6050_DLPF_BW_98 0x02 +#define MPU6050_DLPF_BW_42 0x03 +#define MPU6050_DLPF_BW_20 0x04 +#define MPU6050_DLPF_BW_10 0x05 +#define MPU6050_DLPF_BW_5 0x06 + +#define MPU6050_GCONFIG_FS_SEL_BIT 4 +#define MPU6050_GCONFIG_FS_SEL_LENGTH 2 + +#define MPU6050_GYRO_FS_250 0x00 +#define MPU6050_GYRO_FS_500 0x01 +#define MPU6050_GYRO_FS_1000 0x02 +#define MPU6050_GYRO_FS_2000 0x03 + +#define MPU6050_ACONFIG_XA_ST_BIT 7 +#define MPU6050_ACONFIG_YA_ST_BIT 6 +#define MPU6050_ACONFIG_ZA_ST_BIT 5 +#define MPU6050_ACONFIG_AFS_SEL_BIT 4 +#define MPU6050_ACONFIG_AFS_SEL_LENGTH 2 +#define MPU6050_ACONFIG_ACCEL_HPF_BIT 2 +#define MPU6050_ACONFIG_ACCEL_HPF_LENGTH 3 + +#define MPU6050_ACCEL_FS_2 0x00 +#define MPU6050_ACCEL_FS_4 0x01 +#define MPU6050_ACCEL_FS_8 0x02 +#define MPU6050_ACCEL_FS_16 0x03 + +#define MPU6050_DHPF_RESET 0x00 +#define MPU6050_DHPF_5 0x01 +#define MPU6050_DHPF_2P5 0x02 +#define MPU6050_DHPF_1P25 0x03 +#define MPU6050_DHPF_0P63 0x04 +#define MPU6050_DHPF_HOLD 0x07 + +#define MPU6050_TEMP_FIFO_EN_BIT 7 +#define MPU6050_XG_FIFO_EN_BIT 6 +#define MPU6050_YG_FIFO_EN_BIT 5 +#define MPU6050_ZG_FIFO_EN_BIT 4 +#define MPU6050_ACCEL_FIFO_EN_BIT 3 +#define MPU6050_SLV2_FIFO_EN_BIT 2 +#define MPU6050_SLV1_FIFO_EN_BIT 1 +#define MPU6050_SLV0_FIFO_EN_BIT 0 + +#define MPU6050_MULT_MST_EN_BIT 7 +#define MPU6050_WAIT_FOR_ES_BIT 6 +#define MPU6050_SLV_3_FIFO_EN_BIT 5 +#define MPU6050_I2C_MST_P_NSR_BIT 4 +#define MPU6050_I2C_MST_CLK_BIT 3 +#define MPU6050_I2C_MST_CLK_LENGTH 4 + +#define MPU6050_CLOCK_DIV_348 0x0 +#define MPU6050_CLOCK_DIV_333 0x1 +#define MPU6050_CLOCK_DIV_320 0x2 +#define MPU6050_CLOCK_DIV_308 0x3 +#define MPU6050_CLOCK_DIV_296 0x4 +#define MPU6050_CLOCK_DIV_286 0x5 +#define MPU6050_CLOCK_DIV_276 0x6 +#define MPU6050_CLOCK_DIV_267 0x7 +#define MPU6050_CLOCK_DIV_258 0x8 +#define MPU6050_CLOCK_DIV_500 0x9 +#define MPU6050_CLOCK_DIV_471 0xA +#define MPU6050_CLOCK_DIV_444 0xB +#define MPU6050_CLOCK_DIV_421 0xC +#define MPU6050_CLOCK_DIV_400 0xD +#define MPU6050_CLOCK_DIV_381 0xE +#define MPU6050_CLOCK_DIV_364 0xF + +#define MPU6050_I2C_SLV_RW_BIT 7 +#define MPU6050_I2C_SLV_ADDR_BIT 6 +#define MPU6050_I2C_SLV_ADDR_LENGTH 7 +#define MPU6050_I2C_SLV_EN_BIT 7 +#define MPU6050_I2C_SLV_BYTE_SW_BIT 6 +#define MPU6050_I2C_SLV_REG_DIS_BIT 5 +#define MPU6050_I2C_SLV_GRP_BIT 4 +#define MPU6050_I2C_SLV_LEN_BIT 3 +#define MPU6050_I2C_SLV_LEN_LENGTH 4 + +#define MPU6050_I2C_SLV4_RW_BIT 7 +#define MPU6050_I2C_SLV4_ADDR_BIT 6 +#define MPU6050_I2C_SLV4_ADDR_LENGTH 7 +#define MPU6050_I2C_SLV4_EN_BIT 7 +#define MPU6050_I2C_SLV4_INT_EN_BIT 6 +#define MPU6050_I2C_SLV4_REG_DIS_BIT 5 +#define MPU6050_I2C_SLV4_MST_DLY_BIT 4 +#define MPU6050_I2C_SLV4_MST_DLY_LENGTH 5 + +#define MPU6050_MST_PASS_THROUGH_BIT 7 +#define MPU6050_MST_I2C_SLV4_DONE_BIT 6 +#define MPU6050_MST_I2C_LOST_ARB_BIT 5 +#define MPU6050_MST_I2C_SLV4_NACK_BIT 4 +#define MPU6050_MST_I2C_SLV3_NACK_BIT 3 +#define MPU6050_MST_I2C_SLV2_NACK_BIT 2 +#define MPU6050_MST_I2C_SLV1_NACK_BIT 1 +#define MPU6050_MST_I2C_SLV0_NACK_BIT 0 + +#define MPU6050_INTCFG_INT_LEVEL_BIT 7 +#define MPU6050_INTCFG_INT_OPEN_BIT 6 +#define MPU6050_INTCFG_LATCH_INT_EN_BIT 5 +#define MPU6050_INTCFG_INT_RD_CLEAR_BIT 4 +#define MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT 3 +#define MPU6050_INTCFG_FSYNC_INT_EN_BIT 2 +#define MPU6050_INTCFG_I2C_BYPASS_EN_BIT 1 +#define MPU6050_INTCFG_CLKOUT_EN_BIT 0 + +#define MPU6050_INTMODE_ACTIVEHIGH 0x00 +#define MPU6050_INTMODE_ACTIVELOW 0x01 + +#define MPU6050_INTDRV_PUSHPULL 0x00 +#define MPU6050_INTDRV_OPENDRAIN 0x01 + +#define MPU6050_INTLATCH_50USPULSE 0x00 +#define MPU6050_INTLATCH_WAITCLEAR 0x01 + +#define MPU6050_INTCLEAR_STATUSREAD 0x00 +#define MPU6050_INTCLEAR_ANYREAD 0x01 + +#define MPU6050_INTERRUPT_FF_BIT 7 +#define MPU6050_INTERRUPT_MOT_BIT 6 +#define MPU6050_INTERRUPT_ZMOT_BIT 5 +#define MPU6050_INTERRUPT_FIFO_OFLOW_BIT 4 +#define MPU6050_INTERRUPT_I2C_MST_INT_BIT 3 +#define MPU6050_INTERRUPT_PLL_RDY_INT_BIT 2 +#define MPU6050_INTERRUPT_DMP_INT_BIT 1 +#define MPU6050_INTERRUPT_DATA_RDY_BIT 0 + +// TODO: figure out what these actually do +// UMPL source code is not very obivous +#define MPU6050_DMPINT_5_BIT 5 +#define MPU6050_DMPINT_4_BIT 4 +#define MPU6050_DMPINT_3_BIT 3 +#define MPU6050_DMPINT_2_BIT 2 +#define MPU6050_DMPINT_1_BIT 1 +#define MPU6050_DMPINT_0_BIT 0 + +#define MPU6050_MOTION_MOT_XNEG_BIT 7 +#define MPU6050_MOTION_MOT_XPOS_BIT 6 +#define MPU6050_MOTION_MOT_YNEG_BIT 5 +#define MPU6050_MOTION_MOT_YPOS_BIT 4 +#define MPU6050_MOTION_MOT_ZNEG_BIT 3 +#define MPU6050_MOTION_MOT_ZPOS_BIT 2 +#define MPU6050_MOTION_MOT_ZRMOT_BIT 0 + +#define MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT 7 +#define MPU6050_DELAYCTRL_I2C_SLV4_DLY_EN_BIT 4 +#define MPU6050_DELAYCTRL_I2C_SLV3_DLY_EN_BIT 3 +#define MPU6050_DELAYCTRL_I2C_SLV2_DLY_EN_BIT 2 +#define MPU6050_DELAYCTRL_I2C_SLV1_DLY_EN_BIT 1 +#define MPU6050_DELAYCTRL_I2C_SLV0_DLY_EN_BIT 0 + +#define MPU6050_PATHRESET_GYRO_RESET_BIT 2 +#define MPU6050_PATHRESET_ACCEL_RESET_BIT 1 +#define MPU6050_PATHRESET_TEMP_RESET_BIT 0 + +#define MPU6050_DETECT_ACCEL_ON_DELAY_BIT 5 +#define MPU6050_DETECT_ACCEL_ON_DELAY_LENGTH 2 +#define MPU6050_DETECT_FF_COUNT_BIT 3 +#define MPU6050_DETECT_FF_COUNT_LENGTH 2 +#define MPU6050_DETECT_MOT_COUNT_BIT 1 +#define MPU6050_DETECT_MOT_COUNT_LENGTH 2 + +#define MPU6050_DETECT_DECREMENT_RESET 0x0 +#define MPU6050_DETECT_DECREMENT_1 0x1 +#define MPU6050_DETECT_DECREMENT_2 0x2 +#define MPU6050_DETECT_DECREMENT_4 0x3 + +#define MPU6050_USERCTRL_DMP_EN_BIT 7 +#define MPU6050_USERCTRL_FIFO_EN_BIT 6 +#define MPU6050_USERCTRL_I2C_MST_EN_BIT 5 +#define MPU6050_USERCTRL_I2C_IF_DIS_BIT 4 +#define MPU6050_USERCTRL_DMP_RESET_BIT 3 +#define MPU6050_USERCTRL_FIFO_RESET_BIT 2 +#define MPU6050_USERCTRL_I2C_MST_RESET_BIT 1 +#define MPU6050_USERCTRL_SIG_COND_RESET_BIT 0 + +#define MPU6050_PWR1_DEVICE_RESET_BIT 7 +#define MPU6050_PWR1_SLEEP_BIT 6 +#define MPU6050_PWR1_CYCLE_BIT 5 +#define MPU6050_PWR1_TEMP_DIS_BIT 3 +#define MPU6050_PWR1_CLKSEL_BIT 2 +#define MPU6050_PWR1_CLKSEL_LENGTH 3 + +#define MPU6050_CLOCK_INTERNAL 0x00 +#define MPU6050_CLOCK_PLL_XGYRO 0x01 +#define MPU6050_CLOCK_PLL_YGYRO 0x02 +#define MPU6050_CLOCK_PLL_ZGYRO 0x03 +#define MPU6050_CLOCK_PLL_EXT32K 0x04 +#define MPU6050_CLOCK_PLL_EXT19M 0x05 +#define MPU6050_CLOCK_KEEP_RESET 0x07 + +#define MPU6050_PWR2_LP_WAKE_CTRL_BIT 7 +#define MPU6050_PWR2_LP_WAKE_CTRL_LENGTH 2 +#define MPU6050_PWR2_STBY_XA_BIT 5 +#define MPU6050_PWR2_STBY_YA_BIT 4 +#define MPU6050_PWR2_STBY_ZA_BIT 3 +#define MPU6050_PWR2_STBY_XG_BIT 2 +#define MPU6050_PWR2_STBY_YG_BIT 1 +#define MPU6050_PWR2_STBY_ZG_BIT 0 + +#define MPU6050_WAKE_FREQ_1P25 0x0 +#define MPU6050_WAKE_FREQ_2P5 0x1 +#define MPU6050_WAKE_FREQ_5 0x2 +#define MPU6050_WAKE_FREQ_10 0x3 + +#define MPU6050_BANKSEL_PRFTCH_EN_BIT 6 +#define MPU6050_BANKSEL_CFG_USER_BANK_BIT 5 +#define MPU6050_BANKSEL_MEM_SEL_BIT 4 +#define MPU6050_BANKSEL_MEM_SEL_LENGTH 5 + +#define MPU6050_WHO_AM_I_BIT 6 +#define MPU6050_WHO_AM_I_LENGTH 6 + +#define MPU6050_DMP_MEMORY_BANKS 8 +#define MPU6050_DMP_MEMORY_BANK_SIZE 256 +#define MPU6050_DMP_MEMORY_CHUNK_SIZE 16 \ No newline at end of file