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MMA8452.h@17:6e4232c421c0, 2014-03-05 (annotated)
- Committer:
- ashleymills
- Date:
- Wed Mar 05 17:01:00 2014 +0000
- Revision:
- 17:6e4232c421c0
- Parent:
- 16:d6dde2318edc
- Child:
- 18:27d839e6dc0e
Cleaned up debug handling
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
ashleymills | 15:7620a11149b8 | 1 | #pragma once |
ashleymills | 15:7620a11149b8 | 2 | |
ashleymills | 14:0602b45ca70f | 3 | // Authors: Ashley Mills, Nicholas Herriot |
nherriot | 0:bcf2aa85d7f9 | 4 | /* Copyright (c) 2013 Vodafone, MIT License |
nherriot | 0:bcf2aa85d7f9 | 5 | * |
nherriot | 0:bcf2aa85d7f9 | 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy of this software |
nherriot | 0:bcf2aa85d7f9 | 7 | * and associated documentation files (the "Software"), to deal in the Software without restriction, |
nherriot | 0:bcf2aa85d7f9 | 8 | * including without limitation the rights to use, copy, modify, merge, publish, distribute, |
nherriot | 0:bcf2aa85d7f9 | 9 | * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is |
nherriot | 0:bcf2aa85d7f9 | 10 | * furnished to do so, subject to the following conditions: |
nherriot | 0:bcf2aa85d7f9 | 11 | * |
nherriot | 0:bcf2aa85d7f9 | 12 | * The above copyright notice and this permission notice shall be included in all copies or |
nherriot | 0:bcf2aa85d7f9 | 13 | * substantial portions of the Software. |
nherriot | 0:bcf2aa85d7f9 | 14 | * |
nherriot | 0:bcf2aa85d7f9 | 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING |
nherriot | 0:bcf2aa85d7f9 | 16 | * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
nherriot | 0:bcf2aa85d7f9 | 17 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, |
nherriot | 0:bcf2aa85d7f9 | 18 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
nherriot | 0:bcf2aa85d7f9 | 19 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
nherriot | 0:bcf2aa85d7f9 | 20 | */ |
nherriot | 0:bcf2aa85d7f9 | 21 | |
nherriot | 0:bcf2aa85d7f9 | 22 | // the SparkFun breakout board defaults to 1, set to 0 if SA0 jumper on the bottom of the board is set |
nherriot | 0:bcf2aa85d7f9 | 23 | // see the Table 10. I2C Device Address Sequence in Freescale MMA8452Q pdf |
nherriot | 0:bcf2aa85d7f9 | 24 | |
ashleymills | 15:7620a11149b8 | 25 | #include "mbed.h" |
nherriot | 0:bcf2aa85d7f9 | 26 | |
nherriot | 0:bcf2aa85d7f9 | 27 | // More info on MCU Master address can be found on section 5.10.1 of http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MMA8452Q |
nherriot | 0:bcf2aa85d7f9 | 28 | #define SA0 1 |
nherriot | 0:bcf2aa85d7f9 | 29 | #if SA0 |
ashleymills | 11:dfd1e0afcb7b | 30 | #define MMA8452_ADDRESS 0x3A // 0x1D<<1 // SA0 is high, 0x1C if low - |
nherriot | 0:bcf2aa85d7f9 | 31 | #else |
ashleymills | 11:dfd1e0afcb7b | 32 | #define MMA8452_ADDRESS 0x38 // 0x1C<<1 |
nherriot | 0:bcf2aa85d7f9 | 33 | #endif |
nherriot | 0:bcf2aa85d7f9 | 34 | |
nherriot | 0:bcf2aa85d7f9 | 35 | // Register descriptions found in section 6 of pdf |
ashleymills | 12:172540ff6b8b | 36 | #define MMA8452_STATUS 0x00 // Type 'read' : Status of the data registers |
ashleymills | 12:172540ff6b8b | 37 | #define MMA8452_OUT_X_MSB 0x01 // Type 'read' : x axis - MSB of 2 byte sample |
ashleymills | 12:172540ff6b8b | 38 | #define MMA8452_OUT_X_LSB 0x02 // Type 'read' : x axis - LSB of 2 byte sample |
ashleymills | 12:172540ff6b8b | 39 | #define MMA8452_OUT_Y_MSB 0x03 // Type 'read' : y axis - MSB of 2 byte sample |
ashleymills | 12:172540ff6b8b | 40 | #define MMA8452_OUT_Y_LSB 0x04 // Type 'read' : y axis - LSB of 2 byte sample |
ashleymills | 12:172540ff6b8b | 41 | #define MMA8452_OUT_Z_MSB 0x05 // Type 'read' : z axis - MSB of 2 byte sample |
ashleymills | 12:172540ff6b8b | 42 | #define MMA8452_OUT_Z_LSB 0x06 // Type 'read' : z axis - LSB of 2 byte sample |
nherriot | 0:bcf2aa85d7f9 | 43 | |
ashleymills | 12:172540ff6b8b | 44 | // register definitions |
ashleymills | 12:172540ff6b8b | 45 | #define MMA8452_XYZ_DATA_CFG 0x0E |
ashleymills | 12:172540ff6b8b | 46 | |
ashleymills | 12:172540ff6b8b | 47 | #define MMA8452_SYSMOD 0x0B // Type 'read' : This tells you if device is active, sleep or standy 0x00=STANDBY 0x01=WAKE 0x02=SLEEP |
ashleymills | 12:172540ff6b8b | 48 | #define MMA8452_WHO_AM_I 0x0D // Type 'read' : This should return the device id of 0x2A |
nherriot | 0:bcf2aa85d7f9 | 49 | |
ashleymills | 12:172540ff6b8b | 50 | #define MMA8452_PL_STATUS 0x10 // Type 'read' : This shows portrait landscape mode orientation |
ashleymills | 12:172540ff6b8b | 51 | #define MMA8452_PL_CFG 0x11 // Type 'read/write' : This allows portrait landscape configuration |
ashleymills | 12:172540ff6b8b | 52 | #define MMA8452_PL_COUNT 0x12 // Type 'read' : This is the portraint landscape debounce counter |
ashleymills | 12:172540ff6b8b | 53 | #define MMA8452_PL_BF_ZCOMP 0x13 // Type 'read' : |
ashleymills | 12:172540ff6b8b | 54 | #define MMA8452_PL_THS_REG 0x14 // Type 'read' : |
nherriot | 0:bcf2aa85d7f9 | 55 | |
ashleymills | 12:172540ff6b8b | 56 | #define MMA8452_FF_MT_CFG 0X15 // Type 'read/write' : Freefaul motion functional block configuration |
ashleymills | 12:172540ff6b8b | 57 | #define MMA8452_FF_MT_SRC 0X16 // Type 'read' : Freefaul motion event source register |
ashleymills | 12:172540ff6b8b | 58 | #define MMA8452_FF_MT_THS 0X17 // Type 'read' : Freefaul motion threshold register |
ashleymills | 12:172540ff6b8b | 59 | #define MMA8452_FF_COUNT 0X18 // Type 'read' : Freefaul motion debouce counter |
nherriot | 0:bcf2aa85d7f9 | 60 | |
ashleymills | 12:172540ff6b8b | 61 | #define MMA8452_ASLP_COUNT 0x29 // Type 'read/write' : Counter settings for auto sleep |
ashleymills | 12:172540ff6b8b | 62 | #define MMA8452_CTRL_REG_1 0x2A // Type 'read/write' : |
ashleymills | 12:172540ff6b8b | 63 | #define MMA8452_CTRL_REG_2 0x2B // Type 'read/write' : |
ashleymills | 12:172540ff6b8b | 64 | #define MMA8452_CTRL_REG_3 0x2C // Type 'read/write' : |
ashleymills | 12:172540ff6b8b | 65 | #define MMA8452_CTRL_REG_4 0x2D // Type 'read/write' : |
ashleymills | 12:172540ff6b8b | 66 | #define MMA8452_CTRL_REG_5 0x2E // Type 'read/write' : |
nherriot | 0:bcf2aa85d7f9 | 67 | |
nherriot | 3:ffb0b1650ca2 | 68 | // Defined in table 13 of the Freescale PDF |
ashleymills | 12:172540ff6b8b | 69 | /// xxx these all need to have better names |
nherriot | 3:ffb0b1650ca2 | 70 | #define STANDBY 0x00 // State value returned after a SYSMOD request, it can be in state STANDBY, WAKE or SLEEP |
nherriot | 3:ffb0b1650ca2 | 71 | #define WAKE 0x01 // State value returned after a SYSMOD request, it can be in state STANDBY, WAKE or SLEEP |
nherriot | 3:ffb0b1650ca2 | 72 | #define SLEEP 0x02 // State value returned after a SYSMOD request, it can be in state STANDBY, WAKE or SLEEP |
nherriot | 3:ffb0b1650ca2 | 73 | #define ACTIVE 0x01 // Stage value returned and set in Control Register 1, it can be STANDBY=00, or ACTIVE=01 |
nherriot | 0:bcf2aa85d7f9 | 74 | |
nherriot | 0:bcf2aa85d7f9 | 75 | #define TILT_STATUS 0x03 // Tilt Status (Read only) |
nherriot | 0:bcf2aa85d7f9 | 76 | #define SRST_STATUS 0x04 // Sample Rate Status Register (Read only) |
nherriot | 0:bcf2aa85d7f9 | 77 | #define SPCNT_STATUS 0x05 // Sleep Count Register (Read/Write) |
nherriot | 0:bcf2aa85d7f9 | 78 | #define INTSU_STATUS 0x06 // Interrupt Setup Register |
nherriot | 0:bcf2aa85d7f9 | 79 | #define MODE_STATUS 0x07 // Mode Register (Read/Write) |
nherriot | 0:bcf2aa85d7f9 | 80 | #define SR_STATUS 0x08 // Auto-Wake and Active Mode Portrait/Landscape Samples per Seconds Register (Read/Write) |
nherriot | 0:bcf2aa85d7f9 | 81 | #define PDET_STATUS 0x09 // Tap/Pulse Detection Register (Read/Write) |
nherriot | 0:bcf2aa85d7f9 | 82 | #define PD_STATUS 0xA // Tap/Pulse Debounce Count Register (Read/Write) |
nherriot | 0:bcf2aa85d7f9 | 83 | |
ashleymills | 12:172540ff6b8b | 84 | // masks for enabling/disabling standby |
ashleymills | 11:dfd1e0afcb7b | 85 | #define MMA8452_ACTIVE_MASK 0x01 |
ashleymills | 11:dfd1e0afcb7b | 86 | #define MMA8452_STANDBY_MASK 0xFE |
ashleymills | 11:dfd1e0afcb7b | 87 | |
ashleymills | 12:172540ff6b8b | 88 | // mask for dynamic range reading and writing |
ashleymills | 11:dfd1e0afcb7b | 89 | #define MMA8452_DYNAMIC_RANGE_MASK 0xFC |
ashleymills | 11:dfd1e0afcb7b | 90 | |
ashleymills | 12:172540ff6b8b | 91 | // mask and shift for data rate reading and writing |
ashleymills | 11:dfd1e0afcb7b | 92 | #define MMA8452_DATA_RATE_MASK 0xC7 |
ashleymills | 11:dfd1e0afcb7b | 93 | #define MMA8452_DATA_RATE_MASK_SHIFT 0x03 |
ashleymills | 11:dfd1e0afcb7b | 94 | |
ashleymills | 12:172540ff6b8b | 95 | // mask and shift for general reading and writing |
ashleymills | 11:dfd1e0afcb7b | 96 | #define MMA8452_WRITE_MASK 0xFE |
ashleymills | 11:dfd1e0afcb7b | 97 | #define MMA8452_READ_MASK 0x01 |
ashleymills | 11:dfd1e0afcb7b | 98 | |
ashleymills | 12:172540ff6b8b | 99 | // mask and shift for bit depth reading and writing |
ashleymills | 11:dfd1e0afcb7b | 100 | #define MMA8452_BIT_DEPTH_MASK 0xFD |
ashleymills | 11:dfd1e0afcb7b | 101 | #define MMA8452_BIT_DEPTH_MASK_SHIFT 0x01 |
ashleymills | 12:172540ff6b8b | 102 | |
ashleymills | 12:172540ff6b8b | 103 | // status masks and shifts |
ashleymills | 12:172540ff6b8b | 104 | #define MMA8452_STATUS_ZYXDR_MASK 0x08 |
ashleymills | 16:d6dde2318edc | 105 | #define MMA8452_STATUS_ZDR_MASK 0x04 |
ashleymills | 16:d6dde2318edc | 106 | #define MMA8452_STATUS_YDR_MASK 0x02 |
ashleymills | 16:d6dde2318edc | 107 | #define MMA8452_STATUS_XDR_MASK 0x01 |
ashleymills | 11:dfd1e0afcb7b | 108 | |
ashleymills | 10:ca9ba7ad4e94 | 109 | class MMA8452 |
nherriot | 0:bcf2aa85d7f9 | 110 | { |
nherriot | 0:bcf2aa85d7f9 | 111 | public: |
ashleymills | 10:ca9ba7ad4e94 | 112 | |
ashleymills | 11:dfd1e0afcb7b | 113 | enum DynamicRange { |
ashleymills | 11:dfd1e0afcb7b | 114 | DYNAMIC_RANGE_2G=0x00, |
ashleymills | 11:dfd1e0afcb7b | 115 | DYNAMIC_RANGE_4G, |
ashleymills | 11:dfd1e0afcb7b | 116 | DYNAMIC_RANGE_8G, |
ashleymills | 11:dfd1e0afcb7b | 117 | DYNAMIC_RANGE_UNKNOWN |
ashleymills | 10:ca9ba7ad4e94 | 118 | }; |
nherriot | 0:bcf2aa85d7f9 | 119 | |
ashleymills | 10:ca9ba7ad4e94 | 120 | enum BitDepth { |
ashleymills | 11:dfd1e0afcb7b | 121 | BIT_DEPTH_12=0x00, |
ashleymills | 12:172540ff6b8b | 122 | BIT_DEPTH_8, // 1 sets fast read mode, hence the inversion |
ashleymills | 12:172540ff6b8b | 123 | BIT_DEPTH_UNKNOWN |
ashleymills | 10:ca9ba7ad4e94 | 124 | }; |
ashleymills | 11:dfd1e0afcb7b | 125 | |
ashleymills | 11:dfd1e0afcb7b | 126 | enum DataRateHz { |
ashleymills | 11:dfd1e0afcb7b | 127 | RATE_800=0x00, |
ashleymills | 11:dfd1e0afcb7b | 128 | RATE_400, |
ashleymills | 11:dfd1e0afcb7b | 129 | RATE_200, |
ashleymills | 11:dfd1e0afcb7b | 130 | RATE_100, |
ashleymills | 11:dfd1e0afcb7b | 131 | RATE_50, |
ashleymills | 11:dfd1e0afcb7b | 132 | RATE_12_5, |
ashleymills | 11:dfd1e0afcb7b | 133 | RATE_6_25, |
ashleymills | 11:dfd1e0afcb7b | 134 | RATE_1_563, |
ashleymills | 11:dfd1e0afcb7b | 135 | RATE_UNKNOWN |
ashleymills | 11:dfd1e0afcb7b | 136 | }; |
ashleymills | 11:dfd1e0afcb7b | 137 | |
nherriot | 0:bcf2aa85d7f9 | 138 | |
ashleymills | 15:7620a11149b8 | 139 | /** |
ashleymills | 15:7620a11149b8 | 140 | * Create an accelerometer object connected to the specified I2C pins. |
nherriot | 0:bcf2aa85d7f9 | 141 | * |
nherriot | 0:bcf2aa85d7f9 | 142 | * @param sda I2C data port |
ashleymills | 15:7620a11149b8 | 143 | * @param scl I2C clock port |
ashleymills | 15:7620a11149b8 | 144 | * @param frequency |
nherriot | 0:bcf2aa85d7f9 | 145 | * |
nherriot | 0:bcf2aa85d7f9 | 146 | */ |
ashleymills | 10:ca9ba7ad4e94 | 147 | MMA8452(PinName sda, PinName scl, int frequency); |
nherriot | 0:bcf2aa85d7f9 | 148 | |
ashleymills | 15:7620a11149b8 | 149 | /// Destructor |
ashleymills | 10:ca9ba7ad4e94 | 150 | ~MMA8452(); |
nherriot | 3:ffb0b1650ca2 | 151 | |
ashleymills | 15:7620a11149b8 | 152 | /** |
ashleymills | 15:7620a11149b8 | 153 | * Puts the MMA8452 in active mode. |
ashleymills | 15:7620a11149b8 | 154 | * @return 0 on success, 1 on failure. |
ashleymills | 15:7620a11149b8 | 155 | */ |
nherriot | 0:bcf2aa85d7f9 | 156 | int activate(); |
nherriot | 3:ffb0b1650ca2 | 157 | |
ashleymills | 15:7620a11149b8 | 158 | /** |
ashleymills | 15:7620a11149b8 | 159 | * Puts the MMA8452 in standby. |
ashleymills | 15:7620a11149b8 | 160 | * @return 0 on success, 1 on failure. |
ashleymills | 15:7620a11149b8 | 161 | */ |
ashleymills | 15:7620a11149b8 | 162 | int standby(); |
nherriot | 0:bcf2aa85d7f9 | 163 | |
nherriot | 0:bcf2aa85d7f9 | 164 | /** Initialization of device MMA8452 (required) |
nherriot | 0:bcf2aa85d7f9 | 165 | */ |
nherriot | 0:bcf2aa85d7f9 | 166 | void init(); |
nherriot | 0:bcf2aa85d7f9 | 167 | |
ashleymills | 15:7620a11149b8 | 168 | /** |
ashleymills | 15:7620a11149b8 | 169 | * Read the device ID from the accelerometer (should be 0x2a) |
nherriot | 1:ef026bf28798 | 170 | * |
ashleymills | 15:7620a11149b8 | 171 | * @param pointer to store the ID |
ashleymills | 15:7620a11149b8 | 172 | * @return 0 on success, 1 on failure. |
nherriot | 1:ef026bf28798 | 173 | */ |
ashleymills | 11:dfd1e0afcb7b | 174 | int getDeviceID(char* dst); |
nherriot | 0:bcf2aa85d7f9 | 175 | |
ashleymills | 12:172540ff6b8b | 176 | int getStatus(char* dst); |
nherriot | 1:ef026bf28798 | 177 | |
ashleymills | 12:172540ff6b8b | 178 | /** |
ashleymills | 12:172540ff6b8b | 179 | * Read the x,y, and z registers of the MMA8452. |
nherriot | 1:ef026bf28798 | 180 | * |
ashleymills | 12:172540ff6b8b | 181 | * @param dst The destination buffer. Note that this needs to be 3 bytes for |
ashleymills | 12:172540ff6b8b | 182 | * BIT_DEPTH_8 and 6 bytes for BIT_DEPTH_12. It is upto the caller to ensure this. |
ashleymills | 12:172540ff6b8b | 183 | * @return 0 for success, and 1 for failure |
nherriot | 1:ef026bf28798 | 184 | */ |
ashleymills | 15:7620a11149b8 | 185 | int readXYZRaw(char *dst); |
ashleymills | 15:7620a11149b8 | 186 | |
ashleymills | 15:7620a11149b8 | 187 | /** |
ashleymills | 15:7620a11149b8 | 188 | * Read the x,y, and z counts of the MMA7452. |
ashleymills | 15:7620a11149b8 | 189 | */ |
ashleymills | 13:4bd8b4cd479d | 190 | int readXYZCounts(int *x, int *y, int *z); |
ashleymills | 13:4bd8b4cd479d | 191 | int readXYZGravity(double *x, double *y, double *z); |
ashleymills | 12:172540ff6b8b | 192 | |
ashleymills | 13:4bd8b4cd479d | 193 | int isXReady(); |
ashleymills | 13:4bd8b4cd479d | 194 | int isYReady(); |
ashleymills | 13:4bd8b4cd479d | 195 | int isZReady(); |
ashleymills | 12:172540ff6b8b | 196 | int isXYZReady(); |
nherriot | 0:bcf2aa85d7f9 | 197 | |
ashleymills | 15:7620a11149b8 | 198 | /** |
ashleymills | 15:7620a11149b8 | 199 | * Read from specified MMA8452 register. |
ashleymills | 12:172540ff6b8b | 200 | * |
ashleymills | 12:172540ff6b8b | 201 | * @param addr The internal registeraddress of the MMA8452 |
ashleymills | 12:172540ff6b8b | 202 | * @return The value of the register |
ashleymills | 12:172540ff6b8b | 203 | */ |
ashleymills | 11:dfd1e0afcb7b | 204 | int readRegister(char addr, char *dst); |
ashleymills | 11:dfd1e0afcb7b | 205 | |
ashleymills | 11:dfd1e0afcb7b | 206 | int readRegister(char addr, char *dst, int nbytes); |
nherriot | 0:bcf2aa85d7f9 | 207 | |
ashleymills | 12:172540ff6b8b | 208 | /** |
ashleymills | 12:172540ff6b8b | 209 | * Write to the specified MMA8452 register. |
nherriot | 0:bcf2aa85d7f9 | 210 | * |
ashleymills | 12:172540ff6b8b | 211 | * @param addr The internal register address |
ashleymills | 12:172540ff6b8b | 212 | * @param data Data to write |
nherriot | 0:bcf2aa85d7f9 | 213 | */ |
ashleymills | 11:dfd1e0afcb7b | 214 | int writeRegister(char addr, char data); |
ashleymills | 12:172540ff6b8b | 215 | |
ashleymills | 12:172540ff6b8b | 216 | /** |
ashleymills | 12:172540ff6b8b | 217 | * Write a data buffer to the specified MMA8452 register. |
ashleymills | 12:172540ff6b8b | 218 | * |
ashleymills | 12:172540ff6b8b | 219 | * @param addr The internal register address |
ashleymills | 12:172540ff6b8b | 220 | * @param data Data buffer to write |
ashleymills | 12:172540ff6b8b | 221 | * @param nbytes The length of the data buffer to write |
ashleymills | 12:172540ff6b8b | 222 | */ |
ashleymills | 11:dfd1e0afcb7b | 223 | int writeRegister(char addr, char *data, int nbytes); |
ashleymills | 11:dfd1e0afcb7b | 224 | |
ashleymills | 11:dfd1e0afcb7b | 225 | int logicalANDRegister(char addr, char mask); |
ashleymills | 11:dfd1e0afcb7b | 226 | int logicalORRegister(char addr, char mask); |
ashleymills | 11:dfd1e0afcb7b | 227 | int logicalXORRegister(char addr, char mask); |
nherriot | 0:bcf2aa85d7f9 | 228 | |
ashleymills | 11:dfd1e0afcb7b | 229 | int setDynamicRange(DynamicRange range, int toggleActivation=1); |
ashleymills | 11:dfd1e0afcb7b | 230 | int setBitDepth(BitDepth depth, int toggleActivation=1); |
ashleymills | 11:dfd1e0afcb7b | 231 | int setDataRate(DataRateHz dataRate, int toggleActivation=1); |
ashleymills | 15:7620a11149b8 | 232 | |
ashleymills | 11:dfd1e0afcb7b | 233 | DynamicRange getDynamicRange(); |
ashleymills | 11:dfd1e0afcb7b | 234 | DataRateHz getDataRate(); |
ashleymills | 12:172540ff6b8b | 235 | BitDepth getBitDepth(); |
ashleymills | 11:dfd1e0afcb7b | 236 | |
ashleymills | 17:6e4232c421c0 | 237 | #ifdef MMA8452_DEBUG |
ashleymills | 11:dfd1e0afcb7b | 238 | void debugRegister(char reg); |
ashleymills | 17:6e4232c421c0 | 239 | #endif |
nherriot | 0:bcf2aa85d7f9 | 240 | |
nherriot | 0:bcf2aa85d7f9 | 241 | private: |
ashleymills | 10:ca9ba7ad4e94 | 242 | int readRaw(char src, char *dst, int len); |
ashleymills | 11:dfd1e0afcb7b | 243 | int maskAndApplyRegister(char reg, char mask, char value, int toggleActivation); |
ashleymills | 13:4bd8b4cd479d | 244 | |
ashleymills | 13:4bd8b4cd479d | 245 | int twelveBitToSigned(char *buf); |
ashleymills | 13:4bd8b4cd479d | 246 | int eightBitToSigned(char *buf); |
ashleymills | 13:4bd8b4cd479d | 247 | double convertCountToGravity(int count, int countsPerG); |
ashleymills | 16:d6dde2318edc | 248 | char getMaskedRegister(int reg, char mask); |
ashleymills | 8:89272163f395 | 249 | |
ashleymills | 11:dfd1e0afcb7b | 250 | I2C _i2c; |
ashleymills | 11:dfd1e0afcb7b | 251 | int _frequency; |
ashleymills | 6:f6bde04bf8be | 252 | int _readAddress; |
ashleymills | 6:f6bde04bf8be | 253 | int _writeAddress; |
ashleymills | 12:172540ff6b8b | 254 | |
ashleymills | 12:172540ff6b8b | 255 | BitDepth _bitDepth; |
ashleymills | 13:4bd8b4cd479d | 256 | DynamicRange _dynamicRange; |
nherriot | 0:bcf2aa85d7f9 | 257 | |
ashleymills | 15:7620a11149b8 | 258 | }; |