mbed-os

Fork of mbed-os by erkin yucel

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

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elessair 0:f269e3021894 1 /**
elessair 0:f269e3021894 2 ******************************************************************************
elessair 0:f269e3021894 3 * @file ticker.h
elessair 0:f269e3021894 4 * @brief Microcontroller uSec ticker
elessair 0:f269e3021894 5 * @internal
elessair 0:f269e3021894 6 * @author ON Semiconductor.
elessair 0:f269e3021894 7 * $Rev:
elessair 0:f269e3021894 8 * $Date:
elessair 0:f269e3021894 9 ******************************************************************************
elessair 0:f269e3021894 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
elessair 0:f269e3021894 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
elessair 0:f269e3021894 12 * under limited terms and conditions. The terms and conditions pertaining to the software
elessair 0:f269e3021894 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
elessair 0:f269e3021894 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
elessair 0:f269e3021894 15 * if applicable the software license agreement. Do not use this software and/or
elessair 0:f269e3021894 16 * documentation unless you have carefully read and you agree to the limited terms and
elessair 0:f269e3021894 17 * conditions. By using this software and/or documentation, you agree to the limited
elessair 0:f269e3021894 18 * terms and conditions.
elessair 0:f269e3021894 19 *
elessair 0:f269e3021894 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
elessair 0:f269e3021894 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
elessair 0:f269e3021894 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
elessair 0:f269e3021894 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
elessair 0:f269e3021894 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
elessair 0:f269e3021894 25 * @endinternal
elessair 0:f269e3021894 26 *
elessair 0:f269e3021894 27 *
elessair 0:f269e3021894 28 */
elessair 0:f269e3021894 29
elessair 0:f269e3021894 30 #ifndef TICKER_H_
elessair 0:f269e3021894 31 #define TICKER_H_
elessair 0:f269e3021894 32
elessair 0:f269e3021894 33 #include "types.h"
elessair 0:f269e3021894 34
elessair 0:f269e3021894 35 /** Core frequency definitions. /
elessair 0:f269e3021894 36 *
elessair 0:f269e3021894 37 * These definitions should be adjusted to setup Orion core frequencies.
elessair 0:f269e3021894 38 */
elessair 0:f269e3021894 39 #define CPU_CLOCK_ROOT_HZ ( ( unsigned long ) 32000000) /**< <b> Orion 32MHz root frequency </b> */
elessair 0:f269e3021894 40 #define CPU_CLOCK_DIV_32M ( 1 ) /**< <b> Divider to set up core frequency at 32MHz </b> */
elessair 0:f269e3021894 41 #define CPU_CLOCK_DIV_16M ( 2 ) /**< <b> Divider to set up core frequency at 16MHz </b> */
elessair 0:f269e3021894 42 #define CPU_CLOCK_DIV_8M ( 4 ) /**< <b> Divider to set up core frequency at 8MHz </b> */
elessair 0:f269e3021894 43 #define CPU_CLOCK_DIV_4M ( 8 ) /**< <b> Divider to set up core frequency at 4MHz </b> */
elessair 0:f269e3021894 44
elessair 0:f269e3021894 45 #define CPU_CLOCK_DIV CPU_CLOCK_DIV_32M /**< <b> Selected divider to be used by application code </b> */
elessair 0:f269e3021894 46
elessair 0:f269e3021894 47 #define configCPU_CLOCK_HZ ( ( unsigned long ) (CPU_CLOCK_ROOT_HZ/CPU_CLOCK_DIV) )
elessair 0:f269e3021894 48 #define configTICK_RATE_HZ ( ( unsigned long ) 1000000 ) // 1uSec ticker rate
elessair 0:f269e3021894 49
elessair 0:f269e3021894 50
elessair 0:f269e3021894 51 /* Lowest priority */
elessair 0:f269e3021894 52
elessair 0:f269e3021894 53 #define configKERNEL_INTERRUPT_PRIORITY ( 0xFF )
elessair 0:f269e3021894 54 #define configMAX_SYSCALL_INTERRUPT_PRIORITY ( 0x8F )
elessair 0:f269e3021894 55
elessair 0:f269e3021894 56 #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
elessair 0:f269e3021894 57
elessair 0:f269e3021894 58 /* Constants required to manipulate the core. Registers first... */
elessair 0:f269e3021894 59 #define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000e010 ) )
elessair 0:f269e3021894 60 #define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile unsigned long * ) 0xe000e014 ) )
elessair 0:f269e3021894 61 #define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile unsigned long * ) 0xe000e018 ) )
elessair 0:f269e3021894 62 #define portNVIC_INT_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000ed04 ) )
elessair 0:f269e3021894 63 #define portNVIC_SYSPRI2_REG ( * ( ( volatile unsigned long * ) 0xe000ed20 ) )
elessair 0:f269e3021894 64
elessair 0:f269e3021894 65 /* ...then bits in the registers. */
elessair 0:f269e3021894 66 #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
elessair 0:f269e3021894 67 #define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
elessair 0:f269e3021894 68 #define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
elessair 0:f269e3021894 69 #define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
elessair 0:f269e3021894 70
elessair 0:f269e3021894 71 /* Orion has 4 interrupt priority bits
elessair 0:f269e3021894 72 */
elessair 0:f269e3021894 73 #define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )
elessair 0:f269e3021894 74
elessair 0:f269e3021894 75 /* API definitions */
elessair 0:f269e3021894 76 void fSysTickInit(void);
elessair 0:f269e3021894 77
elessair 0:f269e3021894 78 void fSysTickHandler(void);
elessair 0:f269e3021894 79
elessair 0:f269e3021894 80 uint32_t fSysTickRead(void);
elessair 0:f269e3021894 81
elessair 0:f269e3021894 82 void fSysTickEnableInterrupt (void);
elessair 0:f269e3021894 83
elessair 0:f269e3021894 84 void fSysTickDisableInterrupt (void);
elessair 0:f269e3021894 85 #endif // TICKER_H_