Lee Kai Xuan / mbed-os

mbed-os

Fork of mbed-os by erkin yucel

targets/TARGET_NXP/TARGET_LPC81X/i2c_api.c@1:3deb71413561, 2017-07-20 (annotated)

Committer:
xuaner
Date:
Thu Jul 20 14:26:57 2017 +0000
Revision:
1:3deb71413561
Parent:
0:f269e3021894 
mbed_os

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2013 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 #include "i2c_api.h"
elessair 0:f269e3021894 17 #include "cmsis.h"
elessair 0:f269e3021894 18 #include "pinmap.h"
elessair 0:f269e3021894 19
elessair 0:f269e3021894 20 #if DEVICE_I2C
elessair 0:f269e3021894 21
elessair 0:f269e3021894 22 static const SWM_Map SWM_I2C_SDA[] = {
elessair 0:f269e3021894 23 {7, 24},
elessair 0:f269e3021894 24 };
elessair 0:f269e3021894 25
elessair 0:f269e3021894 26 static const SWM_Map SWM_I2C_SCL[] = {
elessair 0:f269e3021894 27 {8, 0},
elessair 0:f269e3021894 28 };
elessair 0:f269e3021894 29
elessair 0:f269e3021894 30 static uint8_t repeated_start = 0;
elessair 0:f269e3021894 31
elessair 0:f269e3021894 32 #define I2C_DAT(x) (x->i2c->MSTDAT)
elessair 0:f269e3021894 33 #define I2C_STAT(x) ((x->i2c->STAT >> 1) & (0x07))
elessair 0:f269e3021894 34
elessair 0:f269e3021894 35 static inline int i2c_status(i2c_t *obj) {
elessair 0:f269e3021894 36 return I2C_STAT(obj);
elessair 0:f269e3021894 37 }
elessair 0:f269e3021894 38
elessair 0:f269e3021894 39 // Wait until the Serial Interrupt (SI) is set
elessair 0:f269e3021894 40 static int i2c_wait_SI(i2c_t *obj) {
elessair 0:f269e3021894 41 int timeout = 0;
elessair 0:f269e3021894 42 while (!(obj->i2c->STAT & (1 << 0))) {
elessair 0:f269e3021894 43 timeout++;
elessair 0:f269e3021894 44 if (timeout > 100000) return -1;
elessair 0:f269e3021894 45 }
elessair 0:f269e3021894 46 return 0;
elessair 0:f269e3021894 47 }
elessair 0:f269e3021894 48
elessair 0:f269e3021894 49 static inline void i2c_interface_enable(i2c_t *obj) {
elessair 0:f269e3021894 50 obj->i2c->CFG |= (1 << 0);
elessair 0:f269e3021894 51 }
elessair 0:f269e3021894 52
elessair 0:f269e3021894 53 static inline void i2c_power_enable(i2c_t *obj) {
elessair 0:f269e3021894 54 LPC_SYSCON->SYSAHBCLKCTRL |= (1<<5);
elessair 0:f269e3021894 55 LPC_SYSCON->PRESETCTRL &= ~(0x1<<6);
elessair 0:f269e3021894 56 LPC_SYSCON->PRESETCTRL |= (0x1<<6);
elessair 0:f269e3021894 57 }
elessair 0:f269e3021894 58
elessair 0:f269e3021894 59 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
elessair 0:f269e3021894 60 obj->i2c = (LPC_I2C_TypeDef *)LPC_I2C;
elessair 0:f269e3021894 61
elessair 0:f269e3021894 62 const SWM_Map *swm;
elessair 0:f269e3021894 63 uint32_t regVal;
elessair 0:f269e3021894 64
elessair 0:f269e3021894 65 swm = &SWM_I2C_SDA[0];
elessair 0:f269e3021894 66 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
elessair 0:f269e3021894 67 LPC_SWM->PINASSIGN[swm->n] = regVal | (sda << swm->offset);
elessair 0:f269e3021894 68
elessair 0:f269e3021894 69 swm = &SWM_I2C_SCL[0];
elessair 0:f269e3021894 70 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
elessair 0:f269e3021894 71 LPC_SWM->PINASSIGN[swm->n] = regVal | (scl << swm->offset);
elessair 0:f269e3021894 72
elessair 0:f269e3021894 73 // enable power
elessair 0:f269e3021894 74 i2c_power_enable(obj);
elessair 0:f269e3021894 75 // set default frequency at 100k
elessair 0:f269e3021894 76 i2c_frequency(obj, 100000);
elessair 0:f269e3021894 77 i2c_interface_enable(obj);
elessair 0:f269e3021894 78 }
elessair 0:f269e3021894 79
elessair 0:f269e3021894 80 //Actually Wrong. Spec says: First store Address in DAT before setting STA !
elessair 0:f269e3021894 81 //Undefined state when using single byte I2C operations and too much delay
elessair 0:f269e3021894 82 //between i2c_start and do_i2c_write(Address).
elessair 0:f269e3021894 83 //Also note that lpc812 will immediately continue reading a byte when Address b0 == 1
elessair 0:f269e3021894 84 inline int i2c_start(i2c_t *obj) {
elessair 0:f269e3021894 85 int status = 0;
elessair 0:f269e3021894 86 if (repeated_start) {
elessair 0:f269e3021894 87 obj->i2c->MSTCTL = (1 << 1) | (1 << 0);
elessair 0:f269e3021894 88 repeated_start = 0;
elessair 0:f269e3021894 89 } else {
elessair 0:f269e3021894 90 obj->i2c->MSTCTL = (1 << 1);
elessair 0:f269e3021894 91 }
elessair 0:f269e3021894 92 return status;
elessair 0:f269e3021894 93 }
elessair 0:f269e3021894 94
elessair 0:f269e3021894 95 //Generate Stop condition and wait until bus is Idle
elessair 0:f269e3021894 96 //Will also send NAK for previous RD
elessair 0:f269e3021894 97 inline int i2c_stop(i2c_t *obj) {
elessair 0:f269e3021894 98 int timeout = 0;
elessair 0:f269e3021894 99
elessair 0:f269e3021894 100 obj->i2c->MSTCTL = (1 << 2) | (1 << 0); // STP bit and Continue bit. Sends NAK to complete previous RD
elessair 0:f269e3021894 101
elessair 0:f269e3021894 102 //Spin until Ready (b0 == 1)and Status is Idle (b3..b1 == 000)
elessair 0:f269e3021894 103 while ((obj->i2c->STAT & ((7 << 1) | (1 << 0))) != ((0 << 1) | (1 << 0))) {
elessair 0:f269e3021894 104 timeout ++;
elessair 0:f269e3021894 105 if (timeout > 100000) return 1;
elessair 0:f269e3021894 106 }
elessair 0:f269e3021894 107
elessair 0:f269e3021894 108 return 0;
elessair 0:f269e3021894 109 }
elessair 0:f269e3021894 110
elessair 0:f269e3021894 111 static inline int i2c_do_write(i2c_t *obj, int value, uint8_t addr) {
elessair 0:f269e3021894 112 // write the data
elessair 0:f269e3021894 113 I2C_DAT(obj) = value;
elessair 0:f269e3021894 114
elessair 0:f269e3021894 115 if (!addr)
elessair 0:f269e3021894 116 obj->i2c->MSTCTL = (1 << 0);
elessair 0:f269e3021894 117
elessair 0:f269e3021894 118 // wait and return status
elessair 0:f269e3021894 119 i2c_wait_SI(obj);
elessair 0:f269e3021894 120 return i2c_status(obj);
elessair 0:f269e3021894 121 }
elessair 0:f269e3021894 122
elessair 0:f269e3021894 123 static inline int i2c_do_read(i2c_t *obj, int last) {
elessair 0:f269e3021894 124 // wait for it to arrive
elessair 0:f269e3021894 125 i2c_wait_SI(obj);
elessair 0:f269e3021894 126 if (!last)
elessair 0:f269e3021894 127 obj->i2c->MSTCTL = (1 << 0);
elessair 0:f269e3021894 128
elessair 0:f269e3021894 129 // return the data
elessair 0:f269e3021894 130 return (I2C_DAT(obj) & 0xFF);
elessair 0:f269e3021894 131 }
elessair 0:f269e3021894 132
elessair 0:f269e3021894 133 void i2c_frequency(i2c_t *obj, int hz) {
elessair 0:f269e3021894 134 // No peripheral clock divider on the M0
elessair 0:f269e3021894 135 uint32_t PCLK = SystemCoreClock;
elessair 0:f269e3021894 136
elessair 0:f269e3021894 137 uint32_t clkdiv = PCLK / (hz * 4) - 1;
elessair 0:f269e3021894 138
elessair 0:f269e3021894 139 obj->i2c->DIV = clkdiv;
elessair 0:f269e3021894 140 obj->i2c->MSTTIME = 0;
elessair 0:f269e3021894 141 }
elessair 0:f269e3021894 142
elessair 0:f269e3021894 143 // The I2C does a read or a write as a whole operation
elessair 0:f269e3021894 144 // There are two types of error conditions it can encounter
elessair 0:f269e3021894 145 // 1) it can not obtain the bus
elessair 0:f269e3021894 146 // 2) it gets error responses at part of the transmission
elessair 0:f269e3021894 147 //
elessair 0:f269e3021894 148 // We tackle them as follows:
elessair 0:f269e3021894 149 // 1) we retry until we get the bus. we could have a "timeout" if we can not get it
elessair 0:f269e3021894 150 // which basically turns it in to a 2)
elessair 0:f269e3021894 151 // 2) on error, we use the standard error mechanisms to report/debug
elessair 0:f269e3021894 152 //
elessair 0:f269e3021894 153 // Therefore an I2C transaction should always complete. If it doesn't it is usually
elessair 0:f269e3021894 154 // because something is setup wrong (e.g. wiring), and we don't need to programatically
elessair 0:f269e3021894 155 // check for that
elessair 0:f269e3021894 156
elessair 0:f269e3021894 157 //New version WH, Tested OK for Start and Repeated Start
elessair 0:f269e3021894 158 //Old version was Wrong: Calls i2c_start without setting address, i2c_do_read continues before checking status, status check for wrong value
elessair 0:f269e3021894 159 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
elessair 0:f269e3021894 160 int count, status;
elessair 0:f269e3021894 161
elessair 0:f269e3021894 162 //Store the address+RD and then generate STA
elessair 0:f269e3021894 163 I2C_DAT(obj) = address | 0x01;
elessair 0:f269e3021894 164 i2c_start(obj);
elessair 0:f269e3021894 165
elessair 0:f269e3021894 166 // Wait for completion of STA and Sending of SlaveAddress+RD and first Read byte
elessair 0:f269e3021894 167 i2c_wait_SI(obj);
elessair 0:f269e3021894 168 status = i2c_status(obj);
elessair 0:f269e3021894 169 if (status == 0x03) { // NAK on SlaveAddress
elessair 0:f269e3021894 170 i2c_stop(obj);
elessair 0:f269e3021894 171 return I2C_ERROR_NO_SLAVE;
elessair 0:f269e3021894 172 }
elessair 0:f269e3021894 173
elessair 0:f269e3021894 174 // Read in all except last byte
elessair 0:f269e3021894 175 for (count = 0; count < (length-1); count++) {
elessair 0:f269e3021894 176
elessair 0:f269e3021894 177 // Wait for it to arrive, note that first byte read after address+RD is already waiting
elessair 0:f269e3021894 178 i2c_wait_SI(obj);
elessair 0:f269e3021894 179 status = i2c_status(obj);
elessair 0:f269e3021894 180 if (status != 0x01) { // RX RDY
elessair 0:f269e3021894 181 i2c_stop(obj);
elessair 0:f269e3021894 182 return count;
elessair 0:f269e3021894 183 }
elessair 0:f269e3021894 184 data[count] = I2C_DAT(obj) & 0xFF; // Store read byte
elessair 0:f269e3021894 185
elessair 0:f269e3021894 186 obj->i2c->MSTCTL = (1 << 0); // Send ACK and Continue to read
elessair 0:f269e3021894 187 }
elessair 0:f269e3021894 188
elessair 0:f269e3021894 189 // Read final byte
elessair 0:f269e3021894 190 // Wait for it to arrive
elessair 0:f269e3021894 191 i2c_wait_SI(obj);
elessair 0:f269e3021894 192
elessair 0:f269e3021894 193 status = i2c_status(obj);
elessair 0:f269e3021894 194 if (status != 0x01) { // RX RDY
elessair 0:f269e3021894 195 i2c_stop(obj);
elessair 0:f269e3021894 196 return count;
elessair 0:f269e3021894 197 }
elessair 0:f269e3021894 198 data[count] = I2C_DAT(obj) & 0xFF; // Store final read byte
elessair 0:f269e3021894 199
elessair 0:f269e3021894 200 // If not repeated start, send stop.
elessair 0:f269e3021894 201 if (stop) {
elessair 0:f269e3021894 202 i2c_stop(obj); // Also sends NAK for last read byte
elessair 0:f269e3021894 203 } else {
elessair 0:f269e3021894 204 repeated_start = 1;
elessair 0:f269e3021894 205 }
elessair 0:f269e3021894 206
elessair 0:f269e3021894 207 return length;
elessair 0:f269e3021894 208 }
elessair 0:f269e3021894 209
elessair 0:f269e3021894 210
elessair 0:f269e3021894 211
elessair 0:f269e3021894 212 //New version WH, Tested OK for Start and Repeated Start
elessair 0:f269e3021894 213 //Old version was Wrong: Calls i2c_start without setting address first
elessair 0:f269e3021894 214 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
elessair 0:f269e3021894 215 int i, status;
elessair 0:f269e3021894 216
elessair 0:f269e3021894 217 //Store the address+/WR and then generate STA
elessair 0:f269e3021894 218 I2C_DAT(obj) = address & 0xFE;
elessair 0:f269e3021894 219 i2c_start(obj);
elessair 0:f269e3021894 220
elessair 0:f269e3021894 221 // Wait for completion of STA and Sending of SlaveAddress+/WR
elessair 0:f269e3021894 222 i2c_wait_SI(obj);
elessair 0:f269e3021894 223 status = i2c_status(obj);
elessair 0:f269e3021894 224 if (status == 0x03) { // NAK SlaveAddress
elessair 0:f269e3021894 225 i2c_stop(obj);
elessair 0:f269e3021894 226 return I2C_ERROR_NO_SLAVE;
elessair 0:f269e3021894 227 }
elessair 0:f269e3021894 228
elessair 0:f269e3021894 229 //Write all bytes
elessair 0:f269e3021894 230 for (i=0; i<length; i++) {
elessair 0:f269e3021894 231 status = i2c_do_write(obj, data[i], 0);
elessair 0:f269e3021894 232 if (status != 0x02) { // TX RDY. Handles a Slave NAK on datawrite
elessair 0:f269e3021894 233 i2c_stop(obj);
elessair 0:f269e3021894 234 return i;
elessair 0:f269e3021894 235 }
elessair 0:f269e3021894 236 }
elessair 0:f269e3021894 237
elessair 0:f269e3021894 238 // If not repeated start, send stop.
elessair 0:f269e3021894 239 if (stop) {
elessair 0:f269e3021894 240 i2c_stop(obj);
elessair 0:f269e3021894 241 } else {
elessair 0:f269e3021894 242 repeated_start = 1;
elessair 0:f269e3021894 243 }
elessair 0:f269e3021894 244
elessair 0:f269e3021894 245 return length;
elessair 0:f269e3021894 246 }
elessair 0:f269e3021894 247
elessair 0:f269e3021894 248
elessair 0:f269e3021894 249
elessair 0:f269e3021894 250 void i2c_reset(i2c_t *obj) {
elessair 0:f269e3021894 251 i2c_stop(obj);
elessair 0:f269e3021894 252 }
elessair 0:f269e3021894 253
elessair 0:f269e3021894 254 int i2c_byte_read(i2c_t *obj, int last) {
elessair 0:f269e3021894 255 return (i2c_do_read(obj, last) & 0xFF);
elessair 0:f269e3021894 256 }
elessair 0:f269e3021894 257
elessair 0:f269e3021894 258 int i2c_byte_write(i2c_t *obj, int data) {
elessair 0:f269e3021894 259 int ack;
elessair 0:f269e3021894 260 int status = i2c_do_write(obj, (data & 0xFF), 0);
elessair 0:f269e3021894 261
elessair 0:f269e3021894 262 switch(status) {
elessair 0:f269e3021894 263 case 2:
elessair 0:f269e3021894 264 ack = 1;
elessair 0:f269e3021894 265 break;
elessair 0:f269e3021894 266 default:
elessair 0:f269e3021894 267 ack = 0;
elessair 0:f269e3021894 268 break;
elessair 0:f269e3021894 269 }
elessair 0:f269e3021894 270
elessair 0:f269e3021894 271 return ack;
elessair 0:f269e3021894 272 }
elessair 0:f269e3021894 273
elessair 0:f269e3021894 274 #if DEVICE_I2CSLAVE
elessair 0:f269e3021894 275
elessair 0:f269e3021894 276 #define I2C_SLVDAT(x) (x->i2c->SLVDAT)
elessair 0:f269e3021894 277 #define I2C_SLVSTAT(x) ((x->i2c->STAT >> 9) & (0x03))
elessair 0:f269e3021894 278 #define I2C_SLVSI(x) ((x->i2c->STAT >> 8) & (0x01))
elessair 0:f269e3021894 279 //#define I2C_SLVCNT(x) (x->i2c->SLVCTL = (1 << 0))
elessair 0:f269e3021894 280 //#define I2C_SLVNAK(x) (x->i2c->SLVCTL = (1 << 1))
elessair 0:f269e3021894 281
elessair 0:f269e3021894 282 #if(0)
elessair 0:f269e3021894 283 // Wait until the Slave Serial Interrupt (SI) is set
elessair 0:f269e3021894 284 // Timeout when it takes too long.
elessair 0:f269e3021894 285 static int i2c_wait_slave_SI(i2c_t *obj) {
elessair 0:f269e3021894 286 int timeout = 0;
elessair 0:f269e3021894 287 while (!(obj->i2c->STAT & (1 << 8))) {
elessair 0:f269e3021894 288 timeout++;
elessair 0:f269e3021894 289 if (timeout > 100000) return -1;
elessair 0:f269e3021894 290 }
elessair 0:f269e3021894 291 return 0;
elessair 0:f269e3021894 292 }
elessair 0:f269e3021894 293 #endif
elessair 0:f269e3021894 294
elessair 0:f269e3021894 295 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
elessair 0:f269e3021894 296
elessair 0:f269e3021894 297 if (enable_slave) {
elessair 0:f269e3021894 298 // obj->i2c->CFG &= ~(1 << 0); //Disable Master mode
elessair 0:f269e3021894 299 obj->i2c->CFG |= (1 << 1); //Enable Slave mode
elessair 0:f269e3021894 300 }
elessair 0:f269e3021894 301 else {
elessair 0:f269e3021894 302 // obj->i2c->CFG |= (1 << 0); //Enable Master mode
elessair 0:f269e3021894 303 obj->i2c->CFG &= ~(1 << 1); //Disable Slave mode
elessair 0:f269e3021894 304 }
elessair 0:f269e3021894 305 }
elessair 0:f269e3021894 306
elessair 0:f269e3021894 307 // Wait for next I2C event and find out what is going on
elessair 0:f269e3021894 308 //
elessair 0:f269e3021894 309 int i2c_slave_receive(i2c_t *obj) {
elessair 0:f269e3021894 310 int addr;
elessair 0:f269e3021894 311
elessair 0:f269e3021894 312 // Check if there is any data pending
elessair 0:f269e3021894 313 if (! I2C_SLVSI(obj)) {
elessair 0:f269e3021894 314 return 0; //NoData
elessair 0:f269e3021894 315 };
elessair 0:f269e3021894 316
elessair 0:f269e3021894 317 // Check State
elessair 0:f269e3021894 318 switch(I2C_SLVSTAT(obj)) {
elessair 0:f269e3021894 319 case 0x0: // Slave address plus R/W received
elessair 0:f269e3021894 320 // At least one of the four slave addresses has been matched by hardware.
elessair 0:f269e3021894 321 // You can figure out which address by checking Slave address match Index in STAT register.
elessair 0:f269e3021894 322
elessair 0:f269e3021894 323 // Get the received address
elessair 0:f269e3021894 324 addr = I2C_SLVDAT(obj) & 0xFF;
elessair 0:f269e3021894 325 // Send ACK on address and Continue
elessair 0:f269e3021894 326 obj->i2c->SLVCTL = (1 << 0);
elessair 0:f269e3021894 327
elessair 0:f269e3021894 328 if (addr == 0x00) {
elessair 0:f269e3021894 329 return 2; //WriteGeneral
elessair 0:f269e3021894 330 }
elessair 0:f269e3021894 331 //check the RW bit
elessair 0:f269e3021894 332 if ((addr & 0x01) == 0x01) {
elessair 0:f269e3021894 333 return 1; //ReadAddressed
elessair 0:f269e3021894 334 }
elessair 0:f269e3021894 335 else {
elessair 0:f269e3021894 336 return 3; //WriteAddressed
elessair 0:f269e3021894 337 }
elessair 0:f269e3021894 338 //break;
elessair 0:f269e3021894 339
elessair 0:f269e3021894 340 case 0x1: // Slave receive. Received data is available (Slave Receiver mode).
elessair 0:f269e3021894 341 // Oops, should never get here...
elessair 0:f269e3021894 342 obj->i2c->SLVCTL = (1 << 1); // Send NACK on received data, try to recover...
elessair 0:f269e3021894 343 return 0; //NoData
elessair 0:f269e3021894 344
elessair 0:f269e3021894 345 case 0x2: // Slave transmit. Data can be transmitted (Slave Transmitter mode).
elessair 0:f269e3021894 346 // Oops, should never get here...
elessair 0:f269e3021894 347 I2C_SLVDAT(obj) = 0xFF; // Send dummy data for transmission
elessair 0:f269e3021894 348 obj->i2c->SLVCTL = (1 << 0); // Continue and try to recover...
elessair 0:f269e3021894 349 return 0; //NoData
elessair 0:f269e3021894 350
elessair 0:f269e3021894 351 case 0x3: // Reserved.
elessair 0:f269e3021894 352 default: // Oops, should never get here...
elessair 0:f269e3021894 353 obj->i2c->SLVCTL = (1 << 0); // Continue and try to recover...
elessair 0:f269e3021894 354 return 0; //NoData
elessair 0:f269e3021894 355 //break;
elessair 0:f269e3021894 356 } //switch status
elessair 0:f269e3021894 357 }
elessair 0:f269e3021894 358
elessair 0:f269e3021894 359 // The dedicated I2C Slave byte read and byte write functions need to be called
elessair 0:f269e3021894 360 // from 'common' mbed I2CSlave API for devices that have separate Master and
elessair 0:f269e3021894 361 // Slave engines such as the lpc812 and lpc1549.
elessair 0:f269e3021894 362
elessair 0:f269e3021894 363 //Called when Slave is addressed for Write, Slave will receive Data in polling mode
elessair 0:f269e3021894 364 //Parameter last=1 means received byte will be NACKed.
elessair 0:f269e3021894 365 int i2c_slave_byte_read(i2c_t *obj, int last) {
elessair 0:f269e3021894 366 int data;
elessair 0:f269e3021894 367
elessair 0:f269e3021894 368 // Wait for data
elessair 0:f269e3021894 369 while (!I2C_SLVSI(obj)); // Wait forever
elessair 0:f269e3021894 370 //if (i2c_wait_slave_SI(obj) != 0) {return -2;} // Wait with timeout
elessair 0:f269e3021894 371
elessair 0:f269e3021894 372 // Dont bother to check State, were not returning it anyhow..
elessair 0:f269e3021894 373 //if (I2C_SLVSTAT(obj)) == 0x01) {
elessair 0:f269e3021894 374 // Slave receive. Received data is available (Slave Receiver mode).
elessair 0:f269e3021894 375 //};
elessair 0:f269e3021894 376
elessair 0:f269e3021894 377 data = I2C_SLVDAT(obj) & 0xFF; // Get and store the received data
elessair 0:f269e3021894 378 if (last) {
elessair 0:f269e3021894 379 obj->i2c->SLVCTL = (1 << 1); // Send NACK on received data and Continue
elessair 0:f269e3021894 380 }
elessair 0:f269e3021894 381 else {
elessair 0:f269e3021894 382 obj->i2c->SLVCTL = (1 << 0); // Send ACK on data and Continue to read
elessair 0:f269e3021894 383 }
elessair 0:f269e3021894 384
elessair 0:f269e3021894 385 return data;
elessair 0:f269e3021894 386 }
elessair 0:f269e3021894 387
elessair 0:f269e3021894 388
elessair 0:f269e3021894 389 //Called when Slave is addressed for Read, Slave will send Data in polling mode
elessair 0:f269e3021894 390 //
elessair 0:f269e3021894 391 int i2c_slave_byte_write(i2c_t *obj, int data) {
elessair 0:f269e3021894 392
elessair 0:f269e3021894 393 // Wait until Ready
elessair 0:f269e3021894 394 while (!I2C_SLVSI(obj)); // Wait forever
elessair 0:f269e3021894 395 // if (i2c_wait_slave_SI(obj) != 0) {return -2;} // Wait with timeout
elessair 0:f269e3021894 396
elessair 0:f269e3021894 397 // Check State
elessair 0:f269e3021894 398 switch(I2C_SLVSTAT(obj)) {
elessair 0:f269e3021894 399 case 0x0: // Slave address plus R/W received
elessair 0:f269e3021894 400 // At least one of the four slave addresses has been matched by hardware.
elessair 0:f269e3021894 401 // You can figure out which address by checking Slave address match Index in STAT register.
elessair 0:f269e3021894 402 // I2C Restart occurred
elessair 0:f269e3021894 403 return -1;
elessair 0:f269e3021894 404 //break;
elessair 0:f269e3021894 405 case 0x1: // Slave receive. Received data is available (Slave Receiver mode).
elessair 0:f269e3021894 406 // Should not get here...
elessair 0:f269e3021894 407 return -2;
elessair 0:f269e3021894 408 //break;
elessair 0:f269e3021894 409 case 0x2: // Slave transmit. Data can be transmitted (Slave Transmitter mode).
elessair 0:f269e3021894 410 I2C_SLVDAT(obj) = data & 0xFF; // Store the data for transmission
elessair 0:f269e3021894 411 obj->i2c->SLVCTL = (1 << 0); // Continue to send
elessair 0:f269e3021894 412
elessair 0:f269e3021894 413 return 1;
elessair 0:f269e3021894 414 //break;
elessair 0:f269e3021894 415 case 0x3: // Reserved.
elessair 0:f269e3021894 416 default:
elessair 0:f269e3021894 417 // Should not get here...
elessair 0:f269e3021894 418 return -3;
elessair 0:f269e3021894 419 //break;
elessair 0:f269e3021894 420 } // switch status
elessair 0:f269e3021894 421 }
elessair 0:f269e3021894 422
elessair 0:f269e3021894 423
elessair 0:f269e3021894 424 //Called when Slave is addressed for Write, Slave will receive Data in polling mode
elessair 0:f269e3021894 425 //Parameter length (>=1) is the maximum allowable number of bytes. All bytes will be ACKed.
elessair 0:f269e3021894 426 int i2c_slave_read(i2c_t *obj, char *data, int length) {
elessair 0:f269e3021894 427 int count=0;
elessair 0:f269e3021894 428
elessair 0:f269e3021894 429 // Read and ACK all expected bytes
elessair 0:f269e3021894 430 while (count < length) {
elessair 0:f269e3021894 431 // Wait for data
elessair 0:f269e3021894 432 while (!I2C_SLVSI(obj)); // Wait forever
elessair 0:f269e3021894 433 // if (i2c_wait_slave_SI(obj) != 0) {return -2;} // Wait with timeout
elessair 0:f269e3021894 434
elessair 0:f269e3021894 435 // Check State
elessair 0:f269e3021894 436 switch(I2C_SLVSTAT(obj)) {
elessair 0:f269e3021894 437 case 0x0: // Slave address plus R/W received
elessair 0:f269e3021894 438 // At least one of the four slave addresses has been matched by hardware.
elessair 0:f269e3021894 439 // You can figure out which address by checking Slave address match Index in STAT register.
elessair 0:f269e3021894 440 // I2C Restart occurred
elessair 0:f269e3021894 441 return -1;
elessair 0:f269e3021894 442 //break;
elessair 0:f269e3021894 443
elessair 0:f269e3021894 444 case 0x1: // Slave receive. Received data is available (Slave Receiver mode).
elessair 0:f269e3021894 445 data[count] = I2C_SLVDAT(obj) & 0xFF; // Get and store the received data
elessair 0:f269e3021894 446 obj->i2c->SLVCTL = (1 << 0); // Send ACK on data and Continue to read
elessair 0:f269e3021894 447 break;
elessair 0:f269e3021894 448
elessair 0:f269e3021894 449 case 0x2: // Slave transmit. Data can be transmitted (Slave Transmitter mode).
elessair 0:f269e3021894 450 case 0x3: // Reserved.
elessair 0:f269e3021894 451 default: // Should never get here...
elessair 0:f269e3021894 452 return -2;
elessair 0:f269e3021894 453 //break;
elessair 0:f269e3021894 454 } // switch status
elessair 0:f269e3021894 455
elessair 0:f269e3021894 456 count++;
elessair 0:f269e3021894 457 } // for all bytes
elessair 0:f269e3021894 458
elessair 0:f269e3021894 459 return count; // Received the expected number of bytes
elessair 0:f269e3021894 460 }
elessair 0:f269e3021894 461
elessair 0:f269e3021894 462
elessair 0:f269e3021894 463 //Called when Slave is addressed for Read, Slave will send Data in polling mode
elessair 0:f269e3021894 464 //Parameter length (>=1) is the maximum number of bytes. Exit when Slave byte is NACKed.
elessair 0:f269e3021894 465 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
elessair 0:f269e3021894 466 int count;
elessair 0:f269e3021894 467
elessair 0:f269e3021894 468 // Send and all bytes or Exit on NAK
elessair 0:f269e3021894 469 for (count=0; count < length; count++) {
elessair 0:f269e3021894 470 // Wait until Ready for data
elessair 0:f269e3021894 471 while (!I2C_SLVSI(obj)); // Wait forever
elessair 0:f269e3021894 472 // if (i2c_wait_slave_SI(obj) != 0) {return -2;} // Wait with timeout
elessair 0:f269e3021894 473
elessair 0:f269e3021894 474 // Check State
elessair 0:f269e3021894 475 switch(I2C_SLVSTAT(obj)) {
elessair 0:f269e3021894 476 case 0x0: // Slave address plus R/W received
elessair 0:f269e3021894 477 // At least one of the four slave addresses has been matched by hardware.
elessair 0:f269e3021894 478 // You can figure out which address by checking Slave address match Index in STAT register.
elessair 0:f269e3021894 479 // I2C Restart occurred
elessair 0:f269e3021894 480 return -1;
elessair 0:f269e3021894 481 //break;
elessair 0:f269e3021894 482 case 0x1: // Slave receive. Received data is available (Slave Receiver mode).
elessair 0:f269e3021894 483 // Should not get here...
elessair 0:f269e3021894 484 return -2;
elessair 0:f269e3021894 485 //break;
elessair 0:f269e3021894 486 case 0x2: // Slave transmit. Data can be transmitted (Slave Transmitter mode).
elessair 0:f269e3021894 487 I2C_SLVDAT(obj) = data[count] & 0xFF; // Store the data for transmission
elessair 0:f269e3021894 488 obj->i2c->SLVCTL = (1 << 0); // Continue to send
elessair 0:f269e3021894 489 break;
elessair 0:f269e3021894 490 case 0x3: // Reserved.
elessair 0:f269e3021894 491 default:
elessair 0:f269e3021894 492 // Should not get here...
elessair 0:f269e3021894 493 return -3;
elessair 0:f269e3021894 494 //break;
elessair 0:f269e3021894 495 } // switch status
elessair 0:f269e3021894 496 } // for all bytes
elessair 0:f269e3021894 497
elessair 0:f269e3021894 498 return length; // Transmitted the max number of bytes
elessair 0:f269e3021894 499 }
elessair 0:f269e3021894 500
elessair 0:f269e3021894 501
elessair 0:f269e3021894 502 // Set the four slave addresses.
elessair 0:f269e3021894 503 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
elessair 0:f269e3021894 504 obj->i2c->SLVADR0 = (address & 0xFE); // Store address in address 0 register
elessair 0:f269e3021894 505 obj->i2c->SLVADR1 = (0x00 & 0xFE); // Store general call write address in address 1 register
elessair 0:f269e3021894 506 obj->i2c->SLVADR2 = (0x01); // Disable address 2 register
elessair 0:f269e3021894 507 obj->i2c->SLVADR3 = (0x01); // Disable address 3 register
elessair 0:f269e3021894 508 obj->i2c->SLVQUAL0 = (mask & 0xFE); // Qualifier mask for address 0 register. Any maskbit that is 1 will always be a match
elessair 0:f269e3021894 509 }
elessair 0:f269e3021894 510
elessair 0:f269e3021894 511 #endif
elessair 0:f269e3021894 512
elessair 0:f269e3021894 513 #endif