mbed-os

Fork of mbed-os by erkin yucel

Committer:
xuaner
Date:
Thu Jul 20 14:26:57 2017 +0000
Revision:
1:3deb71413561
Parent:
0:f269e3021894
mbed_os

Who changed what in which revision?

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elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2013 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 #include "mbed_assert.h"
elessair 0:f269e3021894 17 #include "analogin_api.h"
elessair 0:f269e3021894 18 #include "cmsis.h"
elessair 0:f269e3021894 19 #include "pinmap.h"
elessair 0:f269e3021894 20
elessair 0:f269e3021894 21 #define ANALOGIN_MEDIAN_FILTER 1
elessair 0:f269e3021894 22
elessair 0:f269e3021894 23 #define ADC_10BIT_RANGE 0x3FF
elessair 0:f269e3021894 24 #define ADC_12BIT_RANGE 0xFFF
elessair 0:f269e3021894 25
elessair 0:f269e3021894 26 #define ADC_RANGE ADC_12BIT_RANGE
elessair 0:f269e3021894 27
elessair 0:f269e3021894 28 static const PinMap PinMap_ADC[] = {
elessair 0:f269e3021894 29 {P0_8 , ADC0_0, 0},
elessair 0:f269e3021894 30 {P0_7 , ADC0_1, 0},
elessair 0:f269e3021894 31 {P0_6 , ADC0_2, 0},
elessair 0:f269e3021894 32 {P0_5 , ADC0_3, 0},
elessair 0:f269e3021894 33 {P0_4 , ADC0_4, 0},
elessair 0:f269e3021894 34 {P0_3 , ADC0_5, 0},
elessair 0:f269e3021894 35 {P0_2 , ADC0_6, 0},
elessair 0:f269e3021894 36 {P0_1 , ADC0_7, 0},
elessair 0:f269e3021894 37 {P1_0 , ADC0_8, 0},
elessair 0:f269e3021894 38 {P0_31, ADC0_9, 0},
elessair 0:f269e3021894 39 {P0_0 , ADC0_10,0},
elessair 0:f269e3021894 40 {P0_30, ADC0_11,0},
elessair 0:f269e3021894 41 {P1_1 , ADC1_0, 0},
elessair 0:f269e3021894 42 {P0_9 , ADC1_1, 0},
elessair 0:f269e3021894 43 {P0_10, ADC1_2, 0},
elessair 0:f269e3021894 44 {P0_11, ADC1_3, 0},
elessair 0:f269e3021894 45 {P1_2 , ADC1_4, 0},
elessair 0:f269e3021894 46 {P1_3 , ADC1_5, 0},
elessair 0:f269e3021894 47 {P0_13, ADC1_6, 0},
elessair 0:f269e3021894 48 {P0_14, ADC1_7, 0},
elessair 0:f269e3021894 49 {P0_15, ADC1_8, 0},
elessair 0:f269e3021894 50 {P0_16, ADC1_9, 0},
elessair 0:f269e3021894 51 {P1_4 , ADC1_10,0},
elessair 0:f269e3021894 52 {P1_5 , ADC1_11,0},
elessair 0:f269e3021894 53 };
elessair 0:f269e3021894 54
elessair 0:f269e3021894 55 void analogin_init(analogin_t *obj, PinName pin) {
elessair 0:f269e3021894 56 obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
elessair 0:f269e3021894 57 MBED_ASSERT(obj->adc != (ADCName)NC);
elessair 0:f269e3021894 58
elessair 0:f269e3021894 59 uint32_t port = (pin >> 5);
elessair 0:f269e3021894 60 // enable clock for GPIOx
elessair 0:f269e3021894 61 LPC_SYSCON->SYSAHBCLKCTRL0 |= (1UL << (14 + port));
elessair 0:f269e3021894 62 // pin enable
elessair 0:f269e3021894 63 LPC_SWM->PINENABLE0 &= ~(1UL << obj->adc);
elessair 0:f269e3021894 64 // configure GPIO as input
elessair 0:f269e3021894 65 LPC_GPIO_PORT->DIR[port] &= ~(1UL << (pin & 0x1F));
elessair 0:f269e3021894 66
elessair 0:f269e3021894 67 // power up ADC
elessair 0:f269e3021894 68 if (obj->adc < ADC1_0)
elessair 0:f269e3021894 69 {
elessair 0:f269e3021894 70 // ADC0
elessair 0:f269e3021894 71 LPC_SYSCON->PDRUNCFG &= ~(1 << 10);
elessair 0:f269e3021894 72 LPC_SYSCON->SYSAHBCLKCTRL0 |= (1 << 27);
elessair 0:f269e3021894 73 }
elessair 0:f269e3021894 74 else {
elessair 0:f269e3021894 75 // ADC1
elessair 0:f269e3021894 76 LPC_SYSCON->PDRUNCFG &= ~(1 << 11);
elessair 0:f269e3021894 77 LPC_SYSCON->SYSAHBCLKCTRL0 |= (1 << 28);
elessair 0:f269e3021894 78 }
elessair 0:f269e3021894 79
elessair 0:f269e3021894 80 __IO LPC_ADC0_Type *adc_reg = (obj->adc < ADC1_0) ? (__IO LPC_ADC0_Type*)(LPC_ADC0) : (__IO LPC_ADC0_Type*)(LPC_ADC1);
elessair 0:f269e3021894 81
elessair 0:f269e3021894 82 // determine the system clock divider for a 500kHz ADC clock during calibration
elessair 0:f269e3021894 83 uint32_t clkdiv = (SystemCoreClock / 500000) - 1;
elessair 0:f269e3021894 84
elessair 0:f269e3021894 85 // perform a self-calibration
elessair 0:f269e3021894 86 adc_reg->CTRL = (1UL << 30) | (clkdiv & 0xFF);
elessair 0:f269e3021894 87 while ((adc_reg->CTRL & (1UL << 30)) != 0);
elessair 0:f269e3021894 88
elessair 0:f269e3021894 89 // Sampling clock: SystemClock divided by 1
elessair 0:f269e3021894 90 adc_reg->CTRL = 0;
elessair 0:f269e3021894 91 }
elessair 0:f269e3021894 92
elessair 0:f269e3021894 93 static inline uint32_t adc_read(analogin_t *obj) {
elessair 0:f269e3021894 94 uint32_t channels;
elessair 0:f269e3021894 95
elessair 0:f269e3021894 96 __IO LPC_ADC0_Type *adc_reg = (obj->adc < ADC1_0) ? (__IO LPC_ADC0_Type*)(LPC_ADC0) : (__IO LPC_ADC0_Type*)(LPC_ADC1);
elessair 0:f269e3021894 97
elessair 0:f269e3021894 98 if (obj->adc >= ADC1_0)
elessair 0:f269e3021894 99 channels = ((obj->adc - ADC1_0) & 0x1F);
elessair 0:f269e3021894 100 else
elessair 0:f269e3021894 101 channels = (obj->adc & 0x1F);
elessair 0:f269e3021894 102
elessair 0:f269e3021894 103 // select channel
elessair 0:f269e3021894 104 adc_reg->SEQA_CTRL &= ~(0xFFF);
elessair 0:f269e3021894 105 adc_reg->SEQA_CTRL |= (1UL << channels);
elessair 0:f269e3021894 106
elessair 0:f269e3021894 107 // start conversion and sequence enable
elessair 0:f269e3021894 108 adc_reg->SEQA_CTRL |= ((1UL << 26) | (1UL << 31));
elessair 0:f269e3021894 109
elessair 0:f269e3021894 110 // Repeatedly get the sample data until DONE bit
elessair 0:f269e3021894 111 volatile uint32_t data;
elessair 0:f269e3021894 112 do {
elessair 0:f269e3021894 113 data = adc_reg->SEQA_GDAT;
elessair 0:f269e3021894 114 } while ((data & (1UL << 31)) == 0);
elessair 0:f269e3021894 115
elessair 0:f269e3021894 116 // Stop conversion
elessair 0:f269e3021894 117 adc_reg->SEQA_CTRL &= ~(1UL << 31);
elessair 0:f269e3021894 118
elessair 0:f269e3021894 119 return ((data >> 4) & ADC_RANGE);
elessair 0:f269e3021894 120 }
elessair 0:f269e3021894 121
elessair 0:f269e3021894 122 static inline void order(uint32_t *a, uint32_t *b) {
elessair 0:f269e3021894 123 if (*a > *b) {
elessair 0:f269e3021894 124 uint32_t t = *a;
elessair 0:f269e3021894 125 *a = *b;
elessair 0:f269e3021894 126 *b = t;
elessair 0:f269e3021894 127 }
elessair 0:f269e3021894 128 }
elessair 0:f269e3021894 129
elessair 0:f269e3021894 130 static inline uint32_t adc_read_u32(analogin_t *obj) {
elessair 0:f269e3021894 131 uint32_t value;
elessair 0:f269e3021894 132 #if ANALOGIN_MEDIAN_FILTER
elessair 0:f269e3021894 133 uint32_t v1 = adc_read(obj);
elessair 0:f269e3021894 134 uint32_t v2 = adc_read(obj);
elessair 0:f269e3021894 135 uint32_t v3 = adc_read(obj);
elessair 0:f269e3021894 136 order(&v1, &v2);
elessair 0:f269e3021894 137 order(&v2, &v3);
elessair 0:f269e3021894 138 order(&v1, &v2);
elessair 0:f269e3021894 139 value = v2;
elessair 0:f269e3021894 140 #else
elessair 0:f269e3021894 141 value = adc_read(obj);
elessair 0:f269e3021894 142 #endif
elessair 0:f269e3021894 143 return value;
elessair 0:f269e3021894 144 }
elessair 0:f269e3021894 145
elessair 0:f269e3021894 146 uint16_t analogin_read_u16(analogin_t *obj) {
elessair 0:f269e3021894 147 uint32_t value = adc_read_u32(obj);
elessair 0:f269e3021894 148 return (value << 4) | ((value >> 8) & 0x000F); // 12 bit
elessair 0:f269e3021894 149 }
elessair 0:f269e3021894 150
elessair 0:f269e3021894 151 float analogin_read(analogin_t *obj) {
elessair 0:f269e3021894 152 uint32_t value = adc_read_u32(obj);
elessair 0:f269e3021894 153 return (float)value * (1.0f / (float)ADC_RANGE);
elessair 0:f269e3021894 154 }