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targets/TARGET_ONSEMI/TARGET_NCS36510/uart_16c550.h@0:f269e3021894, 2016-10-23 (annotated)
- Committer:
- elessair
- Date:
- Sun Oct 23 15:10:02 2016 +0000
- Revision:
- 0:f269e3021894
Initial commit
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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elessair | 0:f269e3021894 | 1 | /** |
elessair | 0:f269e3021894 | 2 | ****************************************************************************** |
elessair | 0:f269e3021894 | 3 | * @file uart_16c550.h |
elessair | 0:f269e3021894 | 4 | * @brief Definitions and API for the 16c550 driver. |
elessair | 0:f269e3021894 | 5 | * @internal |
elessair | 0:f269e3021894 | 6 | * @author ON Semiconductor |
elessair | 0:f269e3021894 | 7 | * $Rev: 2607 $ |
elessair | 0:f269e3021894 | 8 | * $Date: 2013-12-06 18:02:43 +0530 (Fri, 06 Dec 2013) $ |
elessair | 0:f269e3021894 | 9 | ****************************************************************************** |
elessair | 0:f269e3021894 | 10 | * Copyright 2016 Semiconductor Components Industries LLC (d/b/a ON Semiconductor). |
elessair | 0:f269e3021894 | 11 | * All rights reserved. This software and/or documentation is licensed by ON Semiconductor |
elessair | 0:f269e3021894 | 12 | * under limited terms and conditions. The terms and conditions pertaining to the software |
elessair | 0:f269e3021894 | 13 | * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf |
elessair | 0:f269e3021894 | 14 | * (ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software) and |
elessair | 0:f269e3021894 | 15 | * if applicable the software license agreement. Do not use this software and/or |
elessair | 0:f269e3021894 | 16 | * documentation unless you have carefully read and you agree to the limited terms and |
elessair | 0:f269e3021894 | 17 | * conditions. By using this software and/or documentation, you agree to the limited |
elessair | 0:f269e3021894 | 18 | * terms and conditions. |
elessair | 0:f269e3021894 | 19 | * |
elessair | 0:f269e3021894 | 20 | * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
elessair | 0:f269e3021894 | 21 | * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
elessair | 0:f269e3021894 | 22 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
elessair | 0:f269e3021894 | 23 | * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, |
elessair | 0:f269e3021894 | 24 | * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
elessair | 0:f269e3021894 | 25 | * @endinternal |
elessair | 0:f269e3021894 | 26 | * |
elessair | 0:f269e3021894 | 27 | * @ingroup uart_16c550 |
elessair | 0:f269e3021894 | 28 | * |
elessair | 0:f269e3021894 | 29 | * @details |
elessair | 0:f269e3021894 | 30 | * The driver for the 16c550 UART is a character driver (see char_driver.h). |
elessair | 0:f269e3021894 | 31 | * The driver can be accessed via the uart_16c550_driver variable. |
elessair | 0:f269e3021894 | 32 | * |
elessair | 0:f269e3021894 | 33 | * This file defines the options structure to be passed to the driver when |
elessair | 0:f269e3021894 | 34 | * opening a device. The structure depends on the generic uart_options_t |
elessair | 0:f269e3021894 | 35 | * options structure for any UART implementation (see uart.h). |
elessair | 0:f269e3021894 | 36 | * |
elessair | 0:f269e3021894 | 37 | * Any application that uses this driver must define an interrupt handler |
elessair | 0:f269e3021894 | 38 | * for the 16C550 interrupt and call the fUart16C550Handler() function from |
elessair | 0:f269e3021894 | 39 | * that ISR. |
elessair | 0:f269e3021894 | 40 | */ |
elessair | 0:f269e3021894 | 41 | |
elessair | 0:f269e3021894 | 42 | #ifndef UART_16C550_H_ |
elessair | 0:f269e3021894 | 43 | #define UART_16C550_H_ |
elessair | 0:f269e3021894 | 44 | |
elessair | 0:f269e3021894 | 45 | #include "architecture.h" |
elessair | 0:f269e3021894 | 46 | #include "uart.h" |
elessair | 0:f269e3021894 | 47 | #include "uart_16c550_map.h" |
elessair | 0:f269e3021894 | 48 | #include "memory_map.h" |
elessair | 0:f269e3021894 | 49 | #include "crossbar.h" |
elessair | 0:f269e3021894 | 50 | #include "types.h" |
elessair | 0:f269e3021894 | 51 | #include "clock.h" |
elessair | 0:f269e3021894 | 52 | #include "pad.h" |
elessair | 0:f269e3021894 | 53 | #include "serial_api.h" |
elessair | 0:f269e3021894 | 54 | |
elessair | 0:f269e3021894 | 55 | /** A set of options to be passed when opening a 16C550 UART device. */ |
elessair | 0:f269e3021894 | 56 | typedef struct uart_16c550_options { |
elessair | 0:f269e3021894 | 57 | uart_options_t uartOptions; /**< The generic UART options. */ |
elessair | 0:f269e3021894 | 58 | Uart16C550Reg_pt membase; /**< The memory base for the device's registers. */ |
elessair | 0:f269e3021894 | 59 | uint8_t irq; /**< The IRQ number of the IRQ associated to the device. */ |
elessair | 0:f269e3021894 | 60 | } uart_16c550_options_t, *uart_16c550_options_pt; |
elessair | 0:f269e3021894 | 61 | |
elessair | 0:f269e3021894 | 62 | #define UART_NUM 2 |
elessair | 0:f269e3021894 | 63 | |
elessair | 0:f269e3021894 | 64 | #define CTS_ASSERT 1 |
elessair | 0:f269e3021894 | 65 | #define CTS_UNASSERT 0 |
elessair | 0:f269e3021894 | 66 | #define RTS_ASSERT 1 |
elessair | 0:f269e3021894 | 67 | #define RTS_UNASSERT 0 |
elessair | 0:f269e3021894 | 68 | |
elessair | 0:f269e3021894 | 69 | #define UART_ERROR_INSUFFICIENT_SPACE ((uint8_t)0xF0) |
elessair | 0:f269e3021894 | 70 | #define UART_ERROR_TOO_BIG ((uint8_t)0xF1) |
elessair | 0:f269e3021894 | 71 | |
elessair | 0:f269e3021894 | 72 | /** The depth of the hardware FIFOs. */ |
elessair | 0:f269e3021894 | 73 | #define UART_HW_FIFO_DEPTH 16 |
elessair | 0:f269e3021894 | 74 | |
elessair | 0:f269e3021894 | 75 | /** The length of the receive buffer in software. */ |
elessair | 0:f269e3021894 | 76 | #define UART_RX_BUFFER_LENGTH (1<<8) |
elessair | 0:f269e3021894 | 77 | #define UART_TX_BUFFER_LENGTH (1<<8) |
elessair | 0:f269e3021894 | 78 | |
elessair | 0:f269e3021894 | 79 | #define STATUS_INVALID_PARAMETER 0x1 |
elessair | 0:f269e3021894 | 80 | #define STATUS_SUCCESS 0x1 |
elessair | 0:f269e3021894 | 81 | |
elessair | 0:f269e3021894 | 82 | #define UART_LCR_DATALEN_BIT_POS 0 |
elessair | 0:f269e3021894 | 83 | #define UART_LCR_STPBIT_BIT_POS 2 |
elessair | 0:f269e3021894 | 84 | #define UART_LCR_PARITY_BIT_POS 3 |
elessair | 0:f269e3021894 | 85 | |
elessair | 0:f269e3021894 | 86 | #define UART_FCS_RX_FIFO_RST_BIT_POS 1 |
elessair | 0:f269e3021894 | 87 | #define UART_FCS_TX_FIFO_RST_BIT_POS 2 |
elessair | 0:f269e3021894 | 88 | |
elessair | 0:f269e3021894 | 89 | #define UART_RX_IRQ 0x0 |
elessair | 0:f269e3021894 | 90 | #define UART_TX_IRQ 0x1 |
elessair | 0:f269e3021894 | 91 | |
elessair | 0:f269e3021894 | 92 | #define UART_RX_BUFFER_LEN_MAX 16 |
elessair | 0:f269e3021894 | 93 | |
elessair | 0:f269e3021894 | 94 | #define UART_LSR_TX_EMPTY_MASK 0x40 |
elessair | 0:f269e3021894 | 95 | #define UART_LSR_RX_DATA_READY_MASK 0x01 |
elessair | 0:f269e3021894 | 96 | |
elessair | 0:f269e3021894 | 97 | #define UART_IER_TX_EMPTY_MASK 0x02 |
elessair | 0:f269e3021894 | 98 | #define UART_IER_RX_DATA_READY_MASK 0x01 |
elessair | 0:f269e3021894 | 99 | |
elessair | 0:f269e3021894 | 100 | #define UART_DEFAULT_BAUD 9600 |
elessair | 0:f269e3021894 | 101 | |
elessair | 0:f269e3021894 | 102 | /** Interrupt handler for 16C550 UART devices; to be called from an actual ISR. |
elessair | 0:f269e3021894 | 103 | * @param membase The memory base for the device that corresponds to the IRQ. |
elessair | 0:f269e3021894 | 104 | */ |
elessair | 0:f269e3021894 | 105 | void fUart16C550Handler(Uart16C550Reg_pt membase); |
elessair | 0:f269e3021894 | 106 | |
elessair | 0:f269e3021894 | 107 | /** An externally accessible instance of the UART driver implementation. */ |
elessair | 0:f269e3021894 | 108 | //extern char_driver_t uart_16c550_driver; |
elessair | 0:f269e3021894 | 109 | typedef void (*fUartCallBack)(void); |
elessair | 0:f269e3021894 | 110 | //void serial_init(serial_t *obj, PinName tx, PinName rx); |
elessair | 0:f269e3021894 | 111 | //extern void fSerialInit(Uart16C550Reg_pt UartRegBase, flow_control_t FlowControl); |
elessair | 0:f269e3021894 | 112 | extern void fSerialFree(void); |
elessair | 0:f269e3021894 | 113 | extern void fSerialBaud(Uart16C550Reg_pt UartRegBase, uint32_t BaudRate); |
elessair | 0:f269e3021894 | 114 | extern void fSerialFormat(Uart16C550Reg_pt UartRegBase, uint8_t DataLen, uint8_t Parity, uint8_t StopBit); |
elessair | 0:f269e3021894 | 115 | extern void fSerialIrqSet(Uart16C550Reg_pt UartRegBase, fUartCallBack PtrUartCallBack, uint8_t IrqType, boolean Enable); |
elessair | 0:f269e3021894 | 116 | extern uint8_t fSerialGetc(Uart16C550Reg_pt UartRegBase); |
elessair | 0:f269e3021894 | 117 | extern void fSerialPutc(Uart16C550Reg_pt UartRegBase, uint8_t c); |
elessair | 0:f269e3021894 | 118 | extern boolean fSerialReadable(Uart16C550Reg_pt UartRegBase); |
elessair | 0:f269e3021894 | 119 | extern boolean fSerialWritable(Uart16C550Reg_pt UartRegBase); |
elessair | 0:f269e3021894 | 120 | extern void fSerialClear(Uart16C550Reg_pt UartRegBase); |
elessair | 0:f269e3021894 | 121 | extern void fSerialBreakSet(Uart16C550Reg_pt UartRegBase); |
elessair | 0:f269e3021894 | 122 | extern void fSerialBreakClear(Uart16C550Reg_pt UartRegBase); |
elessair | 0:f269e3021894 | 123 | extern void fSerialPinoutTx(uint8_t PinNo); |
elessair | 0:f269e3021894 | 124 | |
elessair | 0:f269e3021894 | 125 | extern void Uart1_Irq(void); |
elessair | 0:f269e3021894 | 126 | extern void Uart2_Irq(void); |
elessair | 0:f269e3021894 | 127 | |
elessair | 0:f269e3021894 | 128 | #endif /* UART_16C550_H_ */ |