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mbed-os

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targets/TARGET_ONSEMI/TARGET_NCS36510/trim_map.h@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

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elessair 0:f269e3021894 1 /**
elessair 0:f269e3021894 2 ******************************************************************************
elessair 0:f269e3021894 3 * @file trim_map.h
elessair 0:f269e3021894 4 * @brief trim register map
elessair 0:f269e3021894 5 * @internal
elessair 0:f269e3021894 6 * @author ON Semiconductor
elessair 0:f269e3021894 7 * $Rev: 3727 $
elessair 0:f269e3021894 8 * $Date: 2015-09-14 14:38:34 +0530 (Mon, 14 Sep 2015) $
elessair 0:f269e3021894 9 ******************************************************************************
elessair 0:f269e3021894 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
elessair 0:f269e3021894 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
elessair 0:f269e3021894 12 * under limited terms and conditions. The terms and conditions pertaining to the software
elessair 0:f269e3021894 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
elessair 0:f269e3021894 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
elessair 0:f269e3021894 15 * if applicable the software license agreement. Do not use this software and/or
elessair 0:f269e3021894 16 * documentation unless you have carefully read and you agree to the limited terms and
elessair 0:f269e3021894 17 * conditions. By using this software and/or documentation, you agree to the limited
elessair 0:f269e3021894 18 * terms and conditions.
elessair 0:f269e3021894 19 *
elessair 0:f269e3021894 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
elessair 0:f269e3021894 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
elessair 0:f269e3021894 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
elessair 0:f269e3021894 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
elessair 0:f269e3021894 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
elessair 0:f269e3021894 25 * @endinternal
elessair 0:f269e3021894 26 *
elessair 0:f269e3021894 27 * @ingroup trim
elessair 0:f269e3021894 28 *
elessair 0:f269e3021894 29 * @details
elessair 0:f269e3021894 30 * <p>
elessair 0:f269e3021894 31 * Rf and Analog control hw module register map
elessair 0:f269e3021894 32 * </p>
elessair 0:f269e3021894 33 */
elessair 0:f269e3021894 34
elessair 0:f269e3021894 35 #ifndef TRIM_MAP_H_
elessair 0:f269e3021894 36 #define TRIM_MAP_H_
elessair 0:f269e3021894 37
elessair 0:f269e3021894 38 /*************************************************************************************************
elessair 0:f269e3021894 39 * *
elessair 0:f269e3021894 40 * Header files *
elessair 0:f269e3021894 41 * *
elessair 0:f269e3021894 42 *************************************************************************************************/
elessair 0:f269e3021894 43
elessair 0:f269e3021894 44 #include "architecture.h"
elessair 0:f269e3021894 45
elessair 0:f269e3021894 46 /**************************************************************************************************
elessair 0:f269e3021894 47 * *
elessair 0:f269e3021894 48 * Type definitions *
elessair 0:f269e3021894 49 * *
elessair 0:f269e3021894 50 **************************************************************************************************/
elessair 0:f269e3021894 51
elessair 0:f269e3021894 52 /** trim register map */
elessair 0:f269e3021894 53 typedef struct { /**< REV B REV D */
elessair 0:f269e3021894 54 __I uint32_t PAD0; /**< 0x1FA0 0x1FA0 */
elessair 0:f269e3021894 55 __I uint32_t APP_RESERVED0; /**< 0x1FA4 0x1FA4 */
elessair 0:f269e3021894 56 __I uint32_t APP_RESERVED1; /**< 0x1FA8 0x1FA8 */
elessair 0:f269e3021894 57 #ifdef REVB
elessair 0:f269e3021894 58 __I uint32_t TX_POWER; /**< 0x1FAC */
elessair 0:f269e3021894 59 #endif
elessair 0:f269e3021894 60 __I uint32_t TRIM_32K_EXT; /**< 0x1FB0 0x1FAC */
elessair 0:f269e3021894 61 __I uint32_t TRIM_32M_EXT; /**< 0x1FB4 0x1FB0 */
elessair 0:f269e3021894 62 #ifdef REVD
elessair 0:f269e3021894 63 __I uint32_t FVVDH_COMP_TH; /**< 0x1FB4 */
elessair 0:f269e3021894 64 #endif
elessair 0:f269e3021894 65 union {
elessair 0:f269e3021894 66 struct { /* Common to REV B & REV D */
elessair 0:f269e3021894 67 __I uint32_t CHANNEL11:4;
elessair 0:f269e3021894 68 __I uint32_t CHANNEL12:4;
elessair 0:f269e3021894 69 __I uint32_t CHANNEL13:4;
elessair 0:f269e3021894 70 __I uint32_t CHANNEL14:4;
elessair 0:f269e3021894 71 __I uint32_t CHANNEL15:4;
elessair 0:f269e3021894 72 __I uint32_t CHANNEL16:4;
elessair 0:f269e3021894 73 __I uint32_t CHANNEL17:4;
elessair 0:f269e3021894 74 __I uint32_t CHANNEL18:4;
elessair 0:f269e3021894 75 } BITS;
elessair 0:f269e3021894 76 __I uint32_t WORD;
elessair 0:f269e3021894 77 } TX_VCO_LUT1; /**< 0x1FB8 */
elessair 0:f269e3021894 78 union {
elessair 0:f269e3021894 79 struct {
elessair 0:f269e3021894 80 __I uint32_t CHANNEL19:4;
elessair 0:f269e3021894 81 __I uint32_t CHANNEL20:4;
elessair 0:f269e3021894 82 __I uint32_t CHANNEL21:4;
elessair 0:f269e3021894 83 __I uint32_t CHANNEL22:4;
elessair 0:f269e3021894 84 __I uint32_t CHANNEL23:4;
elessair 0:f269e3021894 85 __I uint32_t CHANNEL24:4;
elessair 0:f269e3021894 86 __I uint32_t CHANNEL25:4;
elessair 0:f269e3021894 87 __I uint32_t CHANNEL26:4;
elessair 0:f269e3021894 88 } BITS;
elessair 0:f269e3021894 89 __I uint32_t WORD;
elessair 0:f269e3021894 90 } TX_VCO_LUT2; /**< 0x1FBC */
elessair 0:f269e3021894 91 union {
elessair 0:f269e3021894 92 struct {
elessair 0:f269e3021894 93 __I uint32_t CHANNEL11:4;
elessair 0:f269e3021894 94 __I uint32_t CHANNEL12:4;
elessair 0:f269e3021894 95 __I uint32_t CHANNEL13:4;
elessair 0:f269e3021894 96 __I uint32_t CHANNEL14:4;
elessair 0:f269e3021894 97 __I uint32_t CHANNEL15:4;
elessair 0:f269e3021894 98 __I uint32_t CHANNEL16:4;
elessair 0:f269e3021894 99 __I uint32_t CHANNEL17:4;
elessair 0:f269e3021894 100 __I uint32_t CHANNEL18:4;
elessair 0:f269e3021894 101 } BITS;
elessair 0:f269e3021894 102 __I uint32_t WORD;
elessair 0:f269e3021894 103 } RX_VCO_LUT1; /**< 0x1FC0 */
elessair 0:f269e3021894 104 union {
elessair 0:f269e3021894 105 struct {
elessair 0:f269e3021894 106 __I uint32_t CHANNEL19:4;
elessair 0:f269e3021894 107 __I uint32_t CHANNEL20:4;
elessair 0:f269e3021894 108 __I uint32_t CHANNEL21:4;
elessair 0:f269e3021894 109 __I uint32_t CHANNEL22:4;
elessair 0:f269e3021894 110 __I uint32_t CHANNEL23:4;
elessair 0:f269e3021894 111 __I uint32_t CHANNEL24:4;
elessair 0:f269e3021894 112 __I uint32_t CHANNEL25:4;
elessair 0:f269e3021894 113 __I uint32_t CHANNEL26:4;
elessair 0:f269e3021894 114 } BITS;
elessair 0:f269e3021894 115 __I uint32_t WORD;
elessair 0:f269e3021894 116 } RX_VCO_LUT2; /**< 0x1FC4 */
elessair 0:f269e3021894 117 __I uint32_t ON_RESERVED0; /**< 0x1FC8 */
elessair 0:f269e3021894 118 __I uint32_t ON_RESERVED1; /**< 0x1FCC */
elessair 0:f269e3021894 119 __I uint32_t ADC_OFFSET_TRIM; /**< 0x1FD0 */
elessair 0:f269e3021894 120 __I uint32_t TX_PRE_CHIPS; /**< 0x1FD4 */
elessair 0:f269e3021894 121 __I uint32_t TX_CHAIN_TRIM; /**< 0x1FD8 */
elessair 0:f269e3021894 122 __I uint32_t PLL_VCO_TAP_LOCATION; /**< 0x1FDC */
elessair 0:f269e3021894 123 __I uint32_t PLL_TRIM; /**< 0x1FE0 */
elessair 0:f269e3021894 124 __I uint32_t RSSI_OFFSET; /**< 0x1FE4 */
elessair 0:f269e3021894 125 __I uint32_t RX_CHAIN_TRIM; /**< 0x1FE8 */
elessair 0:f269e3021894 126 __I uint32_t PMU_TRIM; /**< 0x1FEC */
elessair 0:f269e3021894 127 __I uint32_t WR_SEED_RD_RAND; /**< 0x1FF0 */
elessair 0:f269e3021894 128 __I uint32_t WAFER_LOCATION; /**< 0x1FF4 */
elessair 0:f269e3021894 129 __I uint32_t LOT_NUMBER; /**< 0x1FF8 */
elessair 0:f269e3021894 130 __I uint32_t REVISION_CODE; /**< 0x1FFC */
elessair 0:f269e3021894 131 } TrimReg_t, *TrimReg_pt;
elessair 0:f269e3021894 132
elessair 0:f269e3021894 133 #endif /* TRIM_MAP_H_ */