Lee Kai Xuan / mbed-os

mbed-os

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targets/TARGET_ONSEMI/TARGET_NCS36510/reset_map.h@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

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elessair 0:f269e3021894 1 /**
elessair 0:f269e3021894 2 ******************************************************************************
elessair 0:f269e3021894 3 * @file reset_map.h
elessair 0:f269e3021894 4 * @brief Reset hw module register map
elessair 0:f269e3021894 5 * @internal
elessair 0:f269e3021894 6 * @author ON Semiconductor
elessair 0:f269e3021894 7 * $Rev: 2848 $
elessair 0:f269e3021894 8 * $Date: 2014-04-01 22:48:18 +0530 (Tue, 01 Apr 2014) $
elessair 0:f269e3021894 9 ******************************************************************************
elessair 0:f269e3021894 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
elessair 0:f269e3021894 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
elessair 0:f269e3021894 12 * under limited terms and conditions. The terms and conditions pertaining to the software
elessair 0:f269e3021894 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
elessair 0:f269e3021894 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
elessair 0:f269e3021894 15 * if applicable the software license agreement. Do not use this software and/or
elessair 0:f269e3021894 16 * documentation unless you have carefully read and you agree to the limited terms and
elessair 0:f269e3021894 17 * conditions. By using this software and/or documentation, you agree to the limited
elessair 0:f269e3021894 18 * terms and conditions.
elessair 0:f269e3021894 19 *
elessair 0:f269e3021894 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
elessair 0:f269e3021894 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
elessair 0:f269e3021894 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
elessair 0:f269e3021894 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
elessair 0:f269e3021894 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
elessair 0:f269e3021894 25 * @endinternal
elessair 0:f269e3021894 26 *
elessair 0:f269e3021894 27 * @ingroup reset
elessair 0:f269e3021894 28 *
elessair 0:f269e3021894 29 * @details
elessair 0:f269e3021894 30 */
elessair 0:f269e3021894 31
elessair 0:f269e3021894 32 #ifndef RESET_MAP_H_
elessair 0:f269e3021894 33 #define RESET_MAP_H_
elessair 0:f269e3021894 34
elessair 0:f269e3021894 35 /*************************************************************************************************
elessair 0:f269e3021894 36 * *
elessair 0:f269e3021894 37 * Header files *
elessair 0:f269e3021894 38 * *
elessair 0:f269e3021894 39 *************************************************************************************************/
elessair 0:f269e3021894 40
elessair 0:f269e3021894 41 #include "architecture.h"
elessair 0:f269e3021894 42
elessair 0:f269e3021894 43 /**************************************************************************************************
elessair 0:f269e3021894 44 * *
elessair 0:f269e3021894 45 * Type definitions *
elessair 0:f269e3021894 46 * *
elessair 0:f269e3021894 47 **************************************************************************************************/
elessair 0:f269e3021894 48
elessair 0:f269e3021894 49 /** Reset status and clear register.
elessair 0:f269e3021894 50 * Also contains HW revision ID.
elessair 0:f269e3021894 51 */
elessair 0:f269e3021894 52 typedef struct {
elessair 0:f269e3021894 53 union {
elessair 0:f269e3021894 54 struct {
elessair 0:f269e3021894 55 __I uint32_t LOCKUP:1; /**< 1:Core did lock up */
elessair 0:f269e3021894 56 __I uint32_t WDOGRES:1; /**< 1:Watchdog reset occurred */
elessair 0:f269e3021894 57 __I uint32_t EXTRESET:1; /**< 1:External reset occurred */
elessair 0:f269e3021894 58 __I uint32_t SYSRESETREQ:1; /**< 1:System reset occurred */
elessair 0:f269e3021894 59 __I uint32_t POR:1; /**< 1:POR reset occurred */
elessair 0:f269e3021894 60 } BITS;
elessair 0:f269e3021894 61 __I uint32_t WORD;
elessair 0:f269e3021894 62 } SOURCE;
elessair 0:f269e3021894 63 __O uint32_t CLEARSOURCE; /**< writing any value to this register will clear the reset source register */
elessair 0:f269e3021894 64 __I uint32_t HWREVID; /**< Hardware ID, 0x80215400 */
elessair 0:f269e3021894 65 __IO uint32_t CONTROL; /**< External Reset & Watchdog behavior: 0 – External Reset & Watchdog will reset debug logic 1 – External Reset & Watchdog will not reset debug logic */
elessair 0:f269e3021894 66
elessair 0:f269e3021894 67 } ResetReg_t, *ResetReg_pt;
elessair 0:f269e3021894 68
elessair 0:f269e3021894 69 #endif /* RESET_MAP_H_ */