Lee Kai Xuan / mbed-os

mbed-os

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targets/TARGET_NUVOTON/TARGET_NUC472/us_ticker.c@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2015-2016 Nuvoton
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16
elessair 0:f269e3021894 17 #include "us_ticker_api.h"
elessair 0:f269e3021894 18 #include "sleep_api.h"
elessair 0:f269e3021894 19 #include "mbed_assert.h"
elessair 0:f269e3021894 20 #include "nu_modutil.h"
elessair 0:f269e3021894 21 #include "nu_miscutil.h"
elessair 0:f269e3021894 22 #include "critical.h"
elessair 0:f269e3021894 23
elessair 0:f269e3021894 24 // us_ticker tick = us = timestamp
elessair 0:f269e3021894 25 #define US_PER_TICK 1
elessair 0:f269e3021894 26 #define US_PER_SEC (1000 * 1000)
elessair 0:f269e3021894 27
elessair 0:f269e3021894 28 #define TMR0HIRES_CLK_PER_SEC (1000 * 1000)
elessair 0:f269e3021894 29 #define TMR1HIRES_CLK_PER_SEC (1000 * 1000)
elessair 0:f269e3021894 30 #define TMR1LORES_CLK_PER_SEC (__LIRC)
elessair 0:f269e3021894 31
elessair 0:f269e3021894 32 #define US_PER_TMR0HIRES_CLK (US_PER_SEC / TMR0HIRES_CLK_PER_SEC)
elessair 0:f269e3021894 33 #define US_PER_TMR1HIRES_CLK (US_PER_SEC / TMR1HIRES_CLK_PER_SEC)
elessair 0:f269e3021894 34 #define US_PER_TMR1LORES_CLK (US_PER_SEC / TMR1LORES_CLK_PER_SEC)
elessair 0:f269e3021894 35
elessair 0:f269e3021894 36 #define US_PER_TMR0HIRES_INT (1000 * 1000 * 10)
elessair 0:f269e3021894 37 #define TMR0HIRES_CLK_PER_TMR0HIRES_INT ((uint32_t) ((uint64_t) US_PER_TMR0HIRES_INT * TMR0HIRES_CLK_PER_SEC / US_PER_SEC))
elessair 0:f269e3021894 38
elessair 0:f269e3021894 39
elessair 0:f269e3021894 40 // Determine to use lo-res/hi-res timer according to CD period
elessair 0:f269e3021894 41 #define US_TMR_SEP_CD 1000
elessair 0:f269e3021894 42
elessair 0:f269e3021894 43 static void tmr0_vec(void);
elessair 0:f269e3021894 44 static void tmr1_vec(void);
elessair 0:f269e3021894 45 static void us_ticker_arm_cd(void);
elessair 0:f269e3021894 46
elessair 0:f269e3021894 47 static int us_ticker_inited = 0;
elessair 0:f269e3021894 48 static volatile uint32_t counter_major = 0;
elessair 0:f269e3021894 49 static volatile uint32_t pd_comp_us = 0; // Power-down compenstaion for normal counter
elessair 0:f269e3021894 50 static volatile uint32_t cd_major_minor_us = 0;
elessair 0:f269e3021894 51 static volatile uint32_t cd_minor_us = 0;
elessair 0:f269e3021894 52 static volatile int cd_hires_tmr_armed = 0; // Flag of armed or not of hi-res timer for CD counter
elessair 0:f269e3021894 53
elessair 0:f269e3021894 54 // NOTE: PCLK is set up in mbed_sdk_init(), invocation of which must be before C++ global object constructor. See init_api.c for details.
elessair 0:f269e3021894 55 // NOTE: Choose clock source of timer:
elessair 0:f269e3021894 56 // 1. HIRC: Be the most accurate but might cause unknown HardFault.
elessair 0:f269e3021894 57 // 2. HXT: Less accurate and cannot pass mbed-drivers test.
elessair 0:f269e3021894 58 // 3. PCLK(HXT): Less accurate but can pass mbed-drivers test.
elessair 0:f269e3021894 59 // NOTE: TIMER_0 for normal counter, TIMER_1 for countdown.
elessair 0:f269e3021894 60 static const struct nu_modinit_s timer0hires_modinit = {TIMER_0, TMR0_MODULE, CLK_CLKSEL1_TMR0SEL_PCLK, 0, TMR0_RST, TMR0_IRQn, (void *) tmr0_vec};
elessair 0:f269e3021894 61 static const struct nu_modinit_s timer1lores_modinit = {TIMER_1, TMR1_MODULE, CLK_CLKSEL1_TMR1SEL_LIRC, 0, TMR1_RST, TMR1_IRQn, (void *) tmr1_vec};
elessair 0:f269e3021894 62 static const struct nu_modinit_s timer1hires_modinit = {TIMER_1, TMR1_MODULE, CLK_CLKSEL1_TMR1SEL_PCLK, 0, TMR1_RST, TMR1_IRQn, (void *) tmr1_vec};
elessair 0:f269e3021894 63
elessair 0:f269e3021894 64 #define TMR_CMP_MIN 2
elessair 0:f269e3021894 65 #define TMR_CMP_MAX 0xFFFFFFu
elessair 0:f269e3021894 66
elessair 0:f269e3021894 67 void us_ticker_init(void)
elessair 0:f269e3021894 68 {
elessair 0:f269e3021894 69 if (us_ticker_inited) {
elessair 0:f269e3021894 70 return;
elessair 0:f269e3021894 71 }
elessair 0:f269e3021894 72
elessair 0:f269e3021894 73 counter_major = 0;
elessair 0:f269e3021894 74 pd_comp_us = 0;
elessair 0:f269e3021894 75 cd_major_minor_us = 0;
elessair 0:f269e3021894 76 cd_minor_us = 0;
elessair 0:f269e3021894 77 cd_hires_tmr_armed = 0;
elessair 0:f269e3021894 78 us_ticker_inited = 1;
elessair 0:f269e3021894 79
elessair 0:f269e3021894 80 // Reset IP
elessair 0:f269e3021894 81 SYS_ResetModule(timer0hires_modinit.rsetidx);
elessair 0:f269e3021894 82 SYS_ResetModule(timer1lores_modinit.rsetidx);
elessair 0:f269e3021894 83
elessair 0:f269e3021894 84 // Select IP clock source
elessair 0:f269e3021894 85 CLK_SetModuleClock(timer0hires_modinit.clkidx, timer0hires_modinit.clksrc, timer0hires_modinit.clkdiv);
elessair 0:f269e3021894 86 CLK_SetModuleClock(timer1lores_modinit.clkidx, timer1lores_modinit.clksrc, timer1lores_modinit.clkdiv);
elessair 0:f269e3021894 87 // Enable IP clock
elessair 0:f269e3021894 88 CLK_EnableModuleClock(timer0hires_modinit.clkidx);
elessair 0:f269e3021894 89 CLK_EnableModuleClock(timer1lores_modinit.clkidx);
elessair 0:f269e3021894 90
elessair 0:f269e3021894 91 // Timer for normal counter
elessair 0:f269e3021894 92 uint32_t clk_timer0 = TIMER_GetModuleClock((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname));
elessair 0:f269e3021894 93 uint32_t prescale_timer0 = clk_timer0 / TMR0HIRES_CLK_PER_SEC - 1;
elessair 0:f269e3021894 94 MBED_ASSERT((prescale_timer0 != (uint32_t) -1) && prescale_timer0 <= 127);
elessair 0:f269e3021894 95 MBED_ASSERT((clk_timer0 % TMR0HIRES_CLK_PER_SEC) == 0);
elessair 0:f269e3021894 96 uint32_t cmp_timer0 = TMR0HIRES_CLK_PER_TMR0HIRES_INT;
elessair 0:f269e3021894 97 MBED_ASSERT(cmp_timer0 >= TMR_CMP_MIN && cmp_timer0 <= TMR_CMP_MAX);
elessair 0:f269e3021894 98 ((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname))->CTL = TIMER_PERIODIC_MODE | prescale_timer0 | TIMER_CTL_CNTDATEN_Msk;
elessair 0:f269e3021894 99 ((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname))->CMP = cmp_timer0;
elessair 0:f269e3021894 100
elessair 0:f269e3021894 101 NVIC_SetVector(timer0hires_modinit.irq_n, (uint32_t) timer0hires_modinit.var);
elessair 0:f269e3021894 102 NVIC_SetVector(timer1lores_modinit.irq_n, (uint32_t) timer1lores_modinit.var);
elessair 0:f269e3021894 103
elessair 0:f269e3021894 104 NVIC_EnableIRQ(timer0hires_modinit.irq_n);
elessair 0:f269e3021894 105 NVIC_EnableIRQ(timer1lores_modinit.irq_n);
elessair 0:f269e3021894 106
elessair 0:f269e3021894 107 TIMER_EnableInt((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname));
elessair 0:f269e3021894 108 TIMER_Start((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname));
elessair 0:f269e3021894 109 }
elessair 0:f269e3021894 110
elessair 0:f269e3021894 111 uint32_t us_ticker_read()
elessair 0:f269e3021894 112 {
elessair 0:f269e3021894 113 if (! us_ticker_inited) {
elessair 0:f269e3021894 114 us_ticker_init();
elessair 0:f269e3021894 115 }
elessair 0:f269e3021894 116
elessair 0:f269e3021894 117 TIMER_T * timer0_base = (TIMER_T *) NU_MODBASE(timer0hires_modinit.modname);
elessair 0:f269e3021894 118
elessair 0:f269e3021894 119 do {
elessair 0:f269e3021894 120 uint32_t major_minor_us;
elessair 0:f269e3021894 121 uint32_t minor_us;
elessair 0:f269e3021894 122
elessair 0:f269e3021894 123 // NOTE: As TIMER_CNT = TIMER_CMP and counter_major has increased by one, TIMER_CNT doesn't change to 0 for one tick time.
elessair 0:f269e3021894 124 // NOTE: As TIMER_CNT = TIMER_CMP or TIMER_CNT = 0, counter_major (ISR) may not sync with TIMER_CNT. So skip and fetch stable one at the cost of 1 clock delay on this read.
elessair 0:f269e3021894 125 do {
elessair 0:f269e3021894 126 core_util_critical_section_enter();
elessair 0:f269e3021894 127
elessair 0:f269e3021894 128 // NOTE: Order of reading minor_us/carry here is significant.
elessair 0:f269e3021894 129 minor_us = TIMER_GetCounter(timer0_base) * US_PER_TMR0HIRES_CLK;
elessair 0:f269e3021894 130 uint32_t carry = (timer0_base->INTSTS & TIMER_INTSTS_TIF_Msk) ? 1 : 0;
elessair 0:f269e3021894 131 // When TIMER_CNT approaches TIMER_CMP and will wrap soon, we may get carry but TIMER_CNT not wrapped. Hanlde carefully carry == 1 && TIMER_CNT is near TIMER_CMP.
elessair 0:f269e3021894 132 if (carry && minor_us > (US_PER_TMR0HIRES_INT / 2)) {
elessair 0:f269e3021894 133 major_minor_us = (counter_major + 1) * US_PER_TMR0HIRES_INT;
elessair 0:f269e3021894 134 }
elessair 0:f269e3021894 135 else {
elessair 0:f269e3021894 136 major_minor_us = (counter_major + carry) * US_PER_TMR0HIRES_INT + minor_us;
elessair 0:f269e3021894 137 }
elessair 0:f269e3021894 138
elessair 0:f269e3021894 139 core_util_critical_section_exit();
elessair 0:f269e3021894 140 }
elessair 0:f269e3021894 141 while (minor_us == 0 || minor_us == US_PER_TMR0HIRES_INT);
elessair 0:f269e3021894 142
elessair 0:f269e3021894 143 // Add power-down compensation
elessair 0:f269e3021894 144 return (major_minor_us + pd_comp_us) / US_PER_TICK;
elessair 0:f269e3021894 145 }
elessair 0:f269e3021894 146 while (0);
elessair 0:f269e3021894 147 }
elessair 0:f269e3021894 148
elessair 0:f269e3021894 149 void us_ticker_disable_interrupt(void)
elessair 0:f269e3021894 150 {
elessair 0:f269e3021894 151 TIMER_DisableInt((TIMER_T *) NU_MODBASE(timer1lores_modinit.modname));
elessair 0:f269e3021894 152 }
elessair 0:f269e3021894 153
elessair 0:f269e3021894 154 void us_ticker_clear_interrupt(void)
elessair 0:f269e3021894 155 {
elessair 0:f269e3021894 156 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(timer1lores_modinit.modname));
elessair 0:f269e3021894 157 }
elessair 0:f269e3021894 158
elessair 0:f269e3021894 159 void us_ticker_set_interrupt(timestamp_t timestamp)
elessair 0:f269e3021894 160 {
elessair 0:f269e3021894 161 TIMER_Stop((TIMER_T *) NU_MODBASE(timer1lores_modinit.modname));
elessair 0:f269e3021894 162 cd_hires_tmr_armed = 0;
elessair 0:f269e3021894 163
elessair 0:f269e3021894 164 int delta = (int) (timestamp - us_ticker_read());
elessair 0:f269e3021894 165 if (delta > 0) {
elessair 0:f269e3021894 166 cd_major_minor_us = delta * US_PER_TICK;
elessair 0:f269e3021894 167 us_ticker_arm_cd();
elessair 0:f269e3021894 168 }
elessair 0:f269e3021894 169 else {
elessair 0:f269e3021894 170 cd_major_minor_us = cd_minor_us = 0;
elessair 0:f269e3021894 171 /**
elessair 0:f269e3021894 172 * This event was in the past. Set the interrupt as pending, but don't process it here.
elessair 0:f269e3021894 173 * This prevents a recurive loop under heavy load which can lead to a stack overflow.
elessair 0:f269e3021894 174 */
elessair 0:f269e3021894 175 NVIC_SetPendingIRQ(timer1lores_modinit.irq_n);
elessair 0:f269e3021894 176 }
elessair 0:f269e3021894 177 }
elessair 0:f269e3021894 178
elessair 0:f269e3021894 179 void us_ticker_prepare_sleep(struct sleep_s *obj)
elessair 0:f269e3021894 180 {
elessair 0:f269e3021894 181 // Reject power-down if hi-res timer (HIRC/HXT) is now armed for CD counter.
elessair 0:f269e3021894 182 if (obj->powerdown) {
elessair 0:f269e3021894 183 obj->powerdown = ! cd_hires_tmr_armed;
elessair 0:f269e3021894 184 }
elessair 0:f269e3021894 185
elessair 0:f269e3021894 186 core_util_critical_section_enter();
elessair 0:f269e3021894 187
elessair 0:f269e3021894 188 if (obj->powerdown) {
elessair 0:f269e3021894 189 // NOTE: On entering power-down mode, HIRC/HXT will be disabled in normal mode, but not in ICE mode. This may cause confusion in development.
elessair 0:f269e3021894 190 // To not be inconsistent due to above, always disable clock source of normal counter, and then re-enable it and make compensation on wakeup from power-down.
elessair 0:f269e3021894 191 CLK_DisableModuleClock(timer0hires_modinit.clkidx);
elessair 0:f269e3021894 192 }
elessair 0:f269e3021894 193
elessair 0:f269e3021894 194 core_util_critical_section_exit();
elessair 0:f269e3021894 195 }
elessair 0:f269e3021894 196
elessair 0:f269e3021894 197 void us_ticker_wakeup_from_sleep(struct sleep_s *obj)
elessair 0:f269e3021894 198 {
elessair 0:f269e3021894 199 core_util_critical_section_enter();
elessair 0:f269e3021894 200
elessair 0:f269e3021894 201 if (obj->powerdown) {
elessair 0:f269e3021894 202 // Calculate power-down compensation
elessair 0:f269e3021894 203 pd_comp_us += obj->period_us;
elessair 0:f269e3021894 204
elessair 0:f269e3021894 205 CLK_EnableModuleClock(timer0hires_modinit.clkidx);
elessair 0:f269e3021894 206 }
elessair 0:f269e3021894 207
elessair 0:f269e3021894 208 core_util_critical_section_exit();
elessair 0:f269e3021894 209 }
elessair 0:f269e3021894 210
elessair 0:f269e3021894 211 static void tmr0_vec(void)
elessair 0:f269e3021894 212 {
elessair 0:f269e3021894 213 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname));
elessair 0:f269e3021894 214 counter_major ++;
elessair 0:f269e3021894 215 }
elessair 0:f269e3021894 216
elessair 0:f269e3021894 217 static void tmr1_vec(void)
elessair 0:f269e3021894 218 {
elessair 0:f269e3021894 219 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(timer1lores_modinit.modname));
elessair 0:f269e3021894 220 cd_major_minor_us = (cd_major_minor_us > cd_minor_us) ? (cd_major_minor_us - cd_minor_us) : 0;
elessair 0:f269e3021894 221 cd_hires_tmr_armed = 0;
elessair 0:f269e3021894 222 if (cd_major_minor_us == 0) {
elessair 0:f269e3021894 223 // NOTE: us_ticker_set_interrupt() may get called in us_ticker_irq_handler();
elessair 0:f269e3021894 224 us_ticker_irq_handler();
elessair 0:f269e3021894 225 }
elessair 0:f269e3021894 226 else {
elessair 0:f269e3021894 227 us_ticker_arm_cd();
elessair 0:f269e3021894 228 }
elessair 0:f269e3021894 229 }
elessair 0:f269e3021894 230
elessair 0:f269e3021894 231 static void us_ticker_arm_cd(void)
elessair 0:f269e3021894 232 {
elessair 0:f269e3021894 233 TIMER_T * timer1_base = (TIMER_T *) NU_MODBASE(timer1lores_modinit.modname);
elessair 0:f269e3021894 234 uint32_t tmr1_clk_per_sec;
elessair 0:f269e3021894 235 uint32_t us_per_tmr1_clk;
elessair 0:f269e3021894 236
elessair 0:f269e3021894 237 /**
elessair 0:f269e3021894 238 * Reserve US_TMR_SEP_CD-plus alarm period for hi-res timer
elessair 0:f269e3021894 239 * 1. period >= US_TMR_SEP_CD * 2. Divide into two rounds:
elessair 0:f269e3021894 240 * US_TMR_SEP_CD * n (lo-res timer)
elessair 0:f269e3021894 241 * US_TMR_SEP_CD + period % US_TMR_SEP_CD (hi-res timer)
elessair 0:f269e3021894 242 * 2. period < US_TMR_SEP_CD * 2. Just one round:
elessair 0:f269e3021894 243 * period (hi-res timer)
elessair 0:f269e3021894 244 */
elessair 0:f269e3021894 245 if (cd_major_minor_us >= US_TMR_SEP_CD * 2) {
elessair 0:f269e3021894 246 cd_minor_us = cd_major_minor_us - cd_major_minor_us % US_TMR_SEP_CD - US_TMR_SEP_CD;
elessair 0:f269e3021894 247
elessair 0:f269e3021894 248 CLK_SetModuleClock(timer1lores_modinit.clkidx, timer1lores_modinit.clksrc, timer1lores_modinit.clkdiv);
elessair 0:f269e3021894 249 tmr1_clk_per_sec = TMR1LORES_CLK_PER_SEC;
elessair 0:f269e3021894 250 us_per_tmr1_clk = US_PER_TMR1LORES_CLK;
elessair 0:f269e3021894 251
elessair 0:f269e3021894 252 cd_hires_tmr_armed = 0;
elessair 0:f269e3021894 253 }
elessair 0:f269e3021894 254 else {
elessair 0:f269e3021894 255 cd_minor_us = cd_major_minor_us;
elessair 0:f269e3021894 256
elessair 0:f269e3021894 257 CLK_SetModuleClock(timer1hires_modinit.clkidx, timer1hires_modinit.clksrc, timer1hires_modinit.clkdiv);
elessair 0:f269e3021894 258 tmr1_clk_per_sec = TMR1HIRES_CLK_PER_SEC;
elessair 0:f269e3021894 259 us_per_tmr1_clk = US_PER_TMR1HIRES_CLK;
elessair 0:f269e3021894 260
elessair 0:f269e3021894 261 cd_hires_tmr_armed = 1;
elessair 0:f269e3021894 262 }
elessair 0:f269e3021894 263
elessair 0:f269e3021894 264 // Reset 8-bit PSC counter, 24-bit up counter value and CNTEN bit
elessair 0:f269e3021894 265 timer1_base->CTL |= TIMER_CTL_RSTCNT_Msk;
elessair 0:f269e3021894 266 // One-shot mode, Clock = 1 MHz
elessair 0:f269e3021894 267 uint32_t clk_timer1 = TIMER_GetModuleClock((TIMER_T *) NU_MODBASE(timer1lores_modinit.modname));
elessair 0:f269e3021894 268 uint32_t prescale_timer1 = clk_timer1 / tmr1_clk_per_sec - 1;
elessair 0:f269e3021894 269 MBED_ASSERT((prescale_timer1 != (uint32_t) -1) && prescale_timer1 <= 127);
elessair 0:f269e3021894 270 MBED_ASSERT((clk_timer1 % tmr1_clk_per_sec) == 0);
elessair 0:f269e3021894 271 timer1_base->CTL &= ~(TIMER_CTL_OPMODE_Msk | TIMER_CTL_PSC_Msk | TIMER_CTL_CNTDATEN_Msk);
elessair 0:f269e3021894 272 timer1_base->CTL |= TIMER_ONESHOT_MODE | prescale_timer1 | TIMER_CTL_CNTDATEN_Msk;
elessair 0:f269e3021894 273
elessair 0:f269e3021894 274 uint32_t cmp_timer1 = cd_minor_us / us_per_tmr1_clk;
elessair 0:f269e3021894 275 cmp_timer1 = NU_CLAMP(cmp_timer1, TMR_CMP_MIN, TMR_CMP_MAX);
elessair 0:f269e3021894 276 timer1_base->CMP = cmp_timer1;
elessair 0:f269e3021894 277
elessair 0:f269e3021894 278 TIMER_EnableInt(timer1_base);
elessair 0:f269e3021894 279 TIMER_Start(timer1_base);
elessair 0:f269e3021894 280 }