Lee Kai Xuan / mbed-os

mbed-os

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targets/TARGET_Maxim/TARGET_MAX32600/serial_api.c@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elessair 0:f269e3021894 1 /*******************************************************************************
elessair 0:f269e3021894 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Permission is hereby granted, free of charge, to any person obtaining a
elessair 0:f269e3021894 5 * copy of this software and associated documentation files (the "Software"),
elessair 0:f269e3021894 6 * to deal in the Software without restriction, including without limitation
elessair 0:f269e3021894 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
elessair 0:f269e3021894 8 * and/or sell copies of the Software, and to permit persons to whom the
elessair 0:f269e3021894 9 * Software is furnished to do so, subject to the following conditions:
elessair 0:f269e3021894 10 *
elessair 0:f269e3021894 11 * The above copyright notice and this permission notice shall be included
elessair 0:f269e3021894 12 * in all copies or substantial portions of the Software.
elessair 0:f269e3021894 13 *
elessair 0:f269e3021894 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
elessair 0:f269e3021894 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
elessair 0:f269e3021894 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
elessair 0:f269e3021894 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
elessair 0:f269e3021894 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
elessair 0:f269e3021894 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
elessair 0:f269e3021894 20 * OTHER DEALINGS IN THE SOFTWARE.
elessair 0:f269e3021894 21 *
elessair 0:f269e3021894 22 * Except as contained in this notice, the name of Maxim Integrated
elessair 0:f269e3021894 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
elessair 0:f269e3021894 24 * Products, Inc. Branding Policy.
elessair 0:f269e3021894 25 *
elessair 0:f269e3021894 26 * The mere transfer of this software does not imply any licenses
elessair 0:f269e3021894 27 * of trade secrets, proprietary technology, copyrights, patents,
elessair 0:f269e3021894 28 * trademarks, maskwork rights, or any other form of intellectual
elessair 0:f269e3021894 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
elessair 0:f269e3021894 30 * ownership rights.
elessair 0:f269e3021894 31 *******************************************************************************
elessair 0:f269e3021894 32 */
elessair 0:f269e3021894 33
elessair 0:f269e3021894 34 #include <string.h>
elessair 0:f269e3021894 35 #include "mbed_assert.h"
elessair 0:f269e3021894 36 #include "cmsis.h"
elessair 0:f269e3021894 37 #include "serial_api.h"
elessair 0:f269e3021894 38 #include "gpio_api.h"
elessair 0:f269e3021894 39 #include "uart_regs.h"
elessair 0:f269e3021894 40 #include "ioman_regs.h"
elessair 0:f269e3021894 41 #include "PeripheralPins.h"
elessair 0:f269e3021894 42
elessair 0:f269e3021894 43 #define UART_NUM 2
elessair 0:f269e3021894 44 #define DEFAULT_BAUD 9600
elessair 0:f269e3021894 45 #define DEFAULT_STOP 1
elessair 0:f269e3021894 46 #define DEFAULT_PARITY ParityNone
elessair 0:f269e3021894 47
elessair 0:f269e3021894 48 #define UART_ERRORS (MXC_F_UART_INTFL_RX_FRAME_ERROR | \
elessair 0:f269e3021894 49 MXC_F_UART_INTFL_RX_PARITY_ERROR | \
elessair 0:f269e3021894 50 MXC_F_UART_INTFL_RX_OVERRUN)
elessair 0:f269e3021894 51
elessair 0:f269e3021894 52 // Variables for managing the stdio UART
elessair 0:f269e3021894 53 int stdio_uart_inited;
elessair 0:f269e3021894 54 serial_t stdio_uart;
elessair 0:f269e3021894 55
elessair 0:f269e3021894 56 // Variables for interrupt driven
elessair 0:f269e3021894 57 static uart_irq_handler irq_handler;
elessair 0:f269e3021894 58 static uint32_t serial_irq_ids[UART_NUM];
elessair 0:f269e3021894 59
elessair 0:f269e3021894 60 //******************************************************************************
elessair 0:f269e3021894 61 void serial_init(serial_t *obj, PinName tx, PinName rx)
elessair 0:f269e3021894 62 {
elessair 0:f269e3021894 63 // Determine which uart is associated with each pin
elessair 0:f269e3021894 64 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
elessair 0:f269e3021894 65 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
elessair 0:f269e3021894 66 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
elessair 0:f269e3021894 67
elessair 0:f269e3021894 68 // Make sure that both pins are pointing to the same uart
elessair 0:f269e3021894 69 MBED_ASSERT(uart != (UARTName)NC);
elessair 0:f269e3021894 70
elessair 0:f269e3021894 71 // Set the obj pointer to the proper uart
elessair 0:f269e3021894 72 obj->uart = (mxc_uart_regs_t*)uart;
elessair 0:f269e3021894 73
elessair 0:f269e3021894 74 // Set the uart index
elessair 0:f269e3021894 75 obj->index = MXC_UART_BASE_TO_INSTANCE(obj->uart);
elessair 0:f269e3021894 76
elessair 0:f269e3021894 77 // Configure the pins
elessair 0:f269e3021894 78 pinmap_pinout(tx, PinMap_UART_TX);
elessair 0:f269e3021894 79 pinmap_pinout(rx, PinMap_UART_RX);
elessair 0:f269e3021894 80
elessair 0:f269e3021894 81 // Flush the RX and TX FIFOs, clear the settings
elessair 0:f269e3021894 82 obj->uart->ctrl = ( MXC_F_UART_CTRL_TX_FIFO_FLUSH | MXC_F_UART_CTRL_RX_FIFO_FLUSH);
elessair 0:f269e3021894 83
elessair 0:f269e3021894 84 // Disable interrupts
elessair 0:f269e3021894 85 obj->uart->inten = 0;
elessair 0:f269e3021894 86 obj->uart->intfl = 0;
elessair 0:f269e3021894 87
elessair 0:f269e3021894 88 // Configure to default settings
elessair 0:f269e3021894 89 serial_baud(obj, DEFAULT_BAUD);
elessair 0:f269e3021894 90 serial_format(obj, 8, ParityNone, 1);
elessair 0:f269e3021894 91
elessair 0:f269e3021894 92 // Manage stdio UART
elessair 0:f269e3021894 93 if(uart == STDIO_UART) {
elessair 0:f269e3021894 94 stdio_uart_inited = 1;
elessair 0:f269e3021894 95 memcpy(&stdio_uart, obj, sizeof(serial_t));
elessair 0:f269e3021894 96 }
elessair 0:f269e3021894 97 }
elessair 0:f269e3021894 98
elessair 0:f269e3021894 99 //******************************************************************************
elessair 0:f269e3021894 100 void serial_baud(serial_t *obj, int baudrate)
elessair 0:f269e3021894 101 {
elessair 0:f269e3021894 102 uint32_t idiv = 0, ddiv = 0, div = 0;
elessair 0:f269e3021894 103
elessair 0:f269e3021894 104 // Calculate the integer and decimal portions
elessair 0:f269e3021894 105 div = SystemCoreClock / ((baudrate / 100) * 128);
elessair 0:f269e3021894 106 idiv = (div / 100);
elessair 0:f269e3021894 107 ddiv = (div - idiv * 100) * 128 / 100;
elessair 0:f269e3021894 108
elessair 0:f269e3021894 109 obj->uart->baud_int = idiv;
elessair 0:f269e3021894 110 obj->uart->baud_div_128 = ddiv;
elessair 0:f269e3021894 111
elessair 0:f269e3021894 112 // Enable the baud clock
elessair 0:f269e3021894 113 obj->uart->ctrl |= MXC_F_UART_CTRL_BAUD_CLK_EN;
elessair 0:f269e3021894 114 }
elessair 0:f269e3021894 115
elessair 0:f269e3021894 116 //******************************************************************************
elessair 0:f269e3021894 117 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
elessair 0:f269e3021894 118 {
elessair 0:f269e3021894 119
elessair 0:f269e3021894 120 // Check the validity of the inputs
elessair 0:f269e3021894 121 MBED_ASSERT((data_bits > 4) && (data_bits < 9));
elessair 0:f269e3021894 122 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) ||
elessair 0:f269e3021894 123 (parity == ParityEven) || (parity == ParityForced1) ||
elessair 0:f269e3021894 124 (parity == ParityForced0));
elessair 0:f269e3021894 125 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
elessair 0:f269e3021894 126
elessair 0:f269e3021894 127 // Adjust the stop and data bits
elessair 0:f269e3021894 128 stop_bits -= 1;
elessair 0:f269e3021894 129 data_bits -= 5;
elessair 0:f269e3021894 130
elessair 0:f269e3021894 131 // Adjust the parity setting
elessair 0:f269e3021894 132 int paren = 0, mode = 0;
elessair 0:f269e3021894 133 switch (parity) {
elessair 0:f269e3021894 134 case ParityNone:
elessair 0:f269e3021894 135 paren = 0;
elessair 0:f269e3021894 136 mode = 0;
elessair 0:f269e3021894 137 break;
elessair 0:f269e3021894 138 case ParityOdd :
elessair 0:f269e3021894 139 paren = 1;
elessair 0:f269e3021894 140 mode = 0;
elessair 0:f269e3021894 141 break;
elessair 0:f269e3021894 142 case ParityEven:
elessair 0:f269e3021894 143 paren = 1;
elessair 0:f269e3021894 144 mode = 1;
elessair 0:f269e3021894 145 break;
elessair 0:f269e3021894 146 case ParityForced1:
elessair 0:f269e3021894 147 // Hardware does not support forced parity
elessair 0:f269e3021894 148 MBED_ASSERT(0);
elessair 0:f269e3021894 149 break;
elessair 0:f269e3021894 150 case ParityForced0:
elessair 0:f269e3021894 151 // Hardware does not support forced parity
elessair 0:f269e3021894 152 MBED_ASSERT(0);
elessair 0:f269e3021894 153 break;
elessair 0:f269e3021894 154 default:
elessair 0:f269e3021894 155 paren = 1;
elessair 0:f269e3021894 156 mode = 0;
elessair 0:f269e3021894 157 break;
elessair 0:f269e3021894 158 }
elessair 0:f269e3021894 159
elessair 0:f269e3021894 160 obj->uart->ctrl |= ((data_bits << MXC_F_UART_CTRL_CHAR_LENGTH_POS) |
elessair 0:f269e3021894 161 (stop_bits << MXC_F_UART_CTRL_STOP_BIT_MODE_POS) |
elessair 0:f269e3021894 162 (paren << MXC_F_UART_CTRL_PARITY_ENABLE_POS) |
elessair 0:f269e3021894 163 (mode << MXC_F_UART_CTRL_PARITY_MODE_POS));
elessair 0:f269e3021894 164 }
elessair 0:f269e3021894 165
elessair 0:f269e3021894 166 //******************************************************************************
elessair 0:f269e3021894 167 void uart_handler(mxc_uart_regs_t* uart, int id)
elessair 0:f269e3021894 168 {
elessair 0:f269e3021894 169 // Check for errors or RX Threshold
elessair 0:f269e3021894 170 if(uart->intfl & (MXC_F_UART_INTFL_RX_OVER_THRESHOLD | UART_ERRORS)) {
elessair 0:f269e3021894 171 irq_handler(serial_irq_ids[id], RxIrq);
elessair 0:f269e3021894 172 uart->intfl &= ~(MXC_F_UART_INTFL_RX_OVER_THRESHOLD | UART_ERRORS);
elessair 0:f269e3021894 173 }
elessair 0:f269e3021894 174
elessair 0:f269e3021894 175 // Check for TX Threshold
elessair 0:f269e3021894 176 if(uart->intfl & MXC_F_UART_INTFL_TX_ALMOST_EMPTY) {
elessair 0:f269e3021894 177 irq_handler(serial_irq_ids[id], TxIrq);
elessair 0:f269e3021894 178 uart->intfl &= ~(MXC_F_UART_INTFL_TX_ALMOST_EMPTY);
elessair 0:f269e3021894 179 }
elessair 0:f269e3021894 180 }
elessair 0:f269e3021894 181
elessair 0:f269e3021894 182 void uart0_handler(void)
elessair 0:f269e3021894 183 {
elessair 0:f269e3021894 184 uart_handler(MXC_UART0, 0);
elessair 0:f269e3021894 185 }
elessair 0:f269e3021894 186 void uart1_handler(void)
elessair 0:f269e3021894 187 {
elessair 0:f269e3021894 188 uart_handler(MXC_UART1, 1);
elessair 0:f269e3021894 189 }
elessair 0:f269e3021894 190
elessair 0:f269e3021894 191 //******************************************************************************
elessair 0:f269e3021894 192 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
elessair 0:f269e3021894 193 {
elessair 0:f269e3021894 194 irq_handler = handler;
elessair 0:f269e3021894 195 serial_irq_ids[obj->index] = id;
elessair 0:f269e3021894 196 }
elessair 0:f269e3021894 197
elessair 0:f269e3021894 198 //******************************************************************************
elessair 0:f269e3021894 199 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
elessair 0:f269e3021894 200 {
elessair 0:f269e3021894 201 if(obj->index == 0) {
elessair 0:f269e3021894 202 NVIC_SetVector(UART0_IRQn, (uint32_t)uart0_handler);
elessair 0:f269e3021894 203 NVIC_EnableIRQ(UART0_IRQn);
elessair 0:f269e3021894 204 } else {
elessair 0:f269e3021894 205 NVIC_SetVector(UART1_IRQn, (uint32_t)uart1_handler);
elessair 0:f269e3021894 206 NVIC_EnableIRQ(UART1_IRQn);
elessair 0:f269e3021894 207 }
elessair 0:f269e3021894 208
elessair 0:f269e3021894 209 if(irq == RxIrq) {
elessair 0:f269e3021894 210 // Set the RX FIFO Threshold to 1
elessair 0:f269e3021894 211 obj->uart->ctrl &= ~MXC_F_UART_CTRL_RX_THRESHOLD;
elessair 0:f269e3021894 212 obj->uart->ctrl |= 0x1;
elessair 0:f269e3021894 213 // Enable RX FIFO Threshold Interrupt
elessair 0:f269e3021894 214 if(enable) {
elessair 0:f269e3021894 215 // Clear pending interrupts
elessair 0:f269e3021894 216 obj->uart->intfl = 0;
elessair 0:f269e3021894 217 obj->uart->inten |= (MXC_F_UART_INTFL_RX_OVER_THRESHOLD |
elessair 0:f269e3021894 218 UART_ERRORS);
elessair 0:f269e3021894 219 } else {
elessair 0:f269e3021894 220 // Clear pending interrupts
elessair 0:f269e3021894 221 obj->uart->intfl = 0;
elessair 0:f269e3021894 222 obj->uart->inten &= ~(MXC_F_UART_INTFL_RX_OVER_THRESHOLD |
elessair 0:f269e3021894 223 UART_ERRORS);
elessair 0:f269e3021894 224 }
elessair 0:f269e3021894 225
elessair 0:f269e3021894 226 } else if (irq == TxIrq) {
elessair 0:f269e3021894 227 // Enable TX Almost empty Interrupt
elessair 0:f269e3021894 228 if(enable) {
elessair 0:f269e3021894 229 // Clear pending interrupts
elessair 0:f269e3021894 230 obj->uart->intfl = 0;
elessair 0:f269e3021894 231 obj->uart->inten |= MXC_F_UART_INTFL_TX_ALMOST_EMPTY;
elessair 0:f269e3021894 232 } else {
elessair 0:f269e3021894 233 // Clear pending interrupts
elessair 0:f269e3021894 234 obj->uart->intfl = 0;
elessair 0:f269e3021894 235 obj->uart->inten &= ~MXC_F_UART_INTFL_TX_ALMOST_EMPTY;
elessair 0:f269e3021894 236 }
elessair 0:f269e3021894 237
elessair 0:f269e3021894 238 } else {
elessair 0:f269e3021894 239 MBED_ASSERT(0);
elessair 0:f269e3021894 240 }
elessair 0:f269e3021894 241 }
elessair 0:f269e3021894 242
elessair 0:f269e3021894 243
elessair 0:f269e3021894 244 //******************************************************************************
elessair 0:f269e3021894 245 int serial_getc(serial_t *obj)
elessair 0:f269e3021894 246 {
elessair 0:f269e3021894 247 int c;
elessair 0:f269e3021894 248
elessair 0:f269e3021894 249 // Wait for data to be available
elessair 0:f269e3021894 250 while(obj->uart->status & MXC_F_UART_STATUS_RX_FIFO_EMPTY) {}
elessair 0:f269e3021894 251 c = obj->uart->tx_rx_fifo & 0xFF;
elessair 0:f269e3021894 252
elessair 0:f269e3021894 253 return c;
elessair 0:f269e3021894 254 }
elessair 0:f269e3021894 255
elessair 0:f269e3021894 256 //******************************************************************************
elessair 0:f269e3021894 257 void serial_putc(serial_t *obj, int c)
elessair 0:f269e3021894 258 {
elessair 0:f269e3021894 259 // Wait for TXFIFO to not be full
elessair 0:f269e3021894 260 while(obj->uart->status & MXC_F_UART_STATUS_TX_FIFO_FULL) {}
elessair 0:f269e3021894 261 obj->uart->tx_rx_fifo = c;
elessair 0:f269e3021894 262 }
elessair 0:f269e3021894 263
elessair 0:f269e3021894 264 //******************************************************************************
elessair 0:f269e3021894 265 int serial_readable(serial_t *obj)
elessair 0:f269e3021894 266 {
elessair 0:f269e3021894 267 return (!(obj->uart->status & MXC_F_UART_STATUS_RX_FIFO_EMPTY));
elessair 0:f269e3021894 268 }
elessair 0:f269e3021894 269
elessair 0:f269e3021894 270 //******************************************************************************
elessair 0:f269e3021894 271 int serial_writable(serial_t *obj)
elessair 0:f269e3021894 272 {
elessair 0:f269e3021894 273 return (!(obj->uart->status & MXC_F_UART_STATUS_TX_FIFO_FULL));
elessair 0:f269e3021894 274 }
elessair 0:f269e3021894 275
elessair 0:f269e3021894 276 //******************************************************************************
elessair 0:f269e3021894 277 void serial_clear(serial_t *obj)
elessair 0:f269e3021894 278 {
elessair 0:f269e3021894 279 // Clear the rx and tx fifos
elessair 0:f269e3021894 280 obj->uart->ctrl |= (MXC_F_UART_CTRL_TX_FIFO_FLUSH | MXC_F_UART_CTRL_RX_FIFO_FLUSH );
elessair 0:f269e3021894 281 }
elessair 0:f269e3021894 282
elessair 0:f269e3021894 283 //******************************************************************************
elessair 0:f269e3021894 284 void serial_break_set(serial_t *obj)
elessair 0:f269e3021894 285 {
elessair 0:f269e3021894 286 // Make sure that nothing is being sent
elessair 0:f269e3021894 287 while (!(obj->uart->status & MXC_F_UART_STATUS_TX_FIFO_EMPTY));
elessair 0:f269e3021894 288 while (obj->uart->status & MXC_F_UART_STATUS_TX_BUSY);
elessair 0:f269e3021894 289
elessair 0:f269e3021894 290 // Configure the GPIO to outpu 0
elessair 0:f269e3021894 291 gpio_t tx_gpio;
elessair 0:f269e3021894 292 switch (((UARTName)(obj->uart))) {
elessair 0:f269e3021894 293 case UART_0:
elessair 0:f269e3021894 294 gpio_init_out(&tx_gpio, UART0_TX);
elessair 0:f269e3021894 295 break;
elessair 0:f269e3021894 296 case UART_1:
elessair 0:f269e3021894 297 gpio_init_out(&tx_gpio, UART1_TX);
elessair 0:f269e3021894 298 break;
elessair 0:f269e3021894 299 default:
elessair 0:f269e3021894 300 gpio_init_out(&tx_gpio, (PinName)NC);
elessair 0:f269e3021894 301 break;
elessair 0:f269e3021894 302 }
elessair 0:f269e3021894 303
elessair 0:f269e3021894 304 gpio_write(&tx_gpio, 0);
elessair 0:f269e3021894 305
elessair 0:f269e3021894 306 // GPIO is setup now, but we need to maps gpio to the pin
elessair 0:f269e3021894 307 switch (((UARTName)(obj->uart))) {
elessair 0:f269e3021894 308 case UART_0:
elessair 0:f269e3021894 309 MXC_IOMAN->uart0_req &= ~MXC_F_IOMAN_UART_CORE_IO;
elessair 0:f269e3021894 310 MBED_ASSERT((MXC_IOMAN->uart0_ack & (MXC_F_IOMAN_UART_CORE_IO | MXC_F_IOMAN_UART_CORE_IO)) == 0);
elessair 0:f269e3021894 311 break;
elessair 0:f269e3021894 312 case UART_1:
elessair 0:f269e3021894 313 MXC_IOMAN->uart1_req &= ~MXC_F_IOMAN_UART_CORE_IO;
elessair 0:f269e3021894 314 MBED_ASSERT((MXC_IOMAN->uart1_ack & (MXC_F_IOMAN_UART_CORE_IO | MXC_F_IOMAN_UART_CORE_IO)) == 0);
elessair 0:f269e3021894 315 break;
elessair 0:f269e3021894 316 default:
elessair 0:f269e3021894 317 break;
elessair 0:f269e3021894 318 }
elessair 0:f269e3021894 319 }
elessair 0:f269e3021894 320
elessair 0:f269e3021894 321 //******************************************************************************
elessair 0:f269e3021894 322 void serial_break_clear(serial_t *obj)
elessair 0:f269e3021894 323 {
elessair 0:f269e3021894 324 // Configure the GPIO to output 1
elessair 0:f269e3021894 325 gpio_t tx_gpio;
elessair 0:f269e3021894 326 switch (((UARTName)(obj->uart))) {
elessair 0:f269e3021894 327 case UART_0:
elessair 0:f269e3021894 328 gpio_init_out(&tx_gpio, UART0_TX);
elessair 0:f269e3021894 329 break;
elessair 0:f269e3021894 330 case UART_1:
elessair 0:f269e3021894 331 gpio_init_out(&tx_gpio, UART1_TX);
elessair 0:f269e3021894 332 break;
elessair 0:f269e3021894 333 default:
elessair 0:f269e3021894 334 gpio_init_out(&tx_gpio, (PinName)NC);
elessair 0:f269e3021894 335 break;
elessair 0:f269e3021894 336 }
elessair 0:f269e3021894 337
elessair 0:f269e3021894 338 gpio_write(&tx_gpio, 1);
elessair 0:f269e3021894 339
elessair 0:f269e3021894 340 // Renable UART
elessair 0:f269e3021894 341 switch (((UARTName)(obj->uart))) {
elessair 0:f269e3021894 342 case UART_0:
elessair 0:f269e3021894 343 serial_pinout_tx(UART0_TX);
elessair 0:f269e3021894 344 break;
elessair 0:f269e3021894 345 case UART_1:
elessair 0:f269e3021894 346 serial_pinout_tx(UART1_TX);
elessair 0:f269e3021894 347 break;
elessair 0:f269e3021894 348 default:
elessair 0:f269e3021894 349 serial_pinout_tx((PinName)NC);
elessair 0:f269e3021894 350 break;
elessair 0:f269e3021894 351 }
elessair 0:f269e3021894 352 }
elessair 0:f269e3021894 353
elessair 0:f269e3021894 354 //******************************************************************************
elessair 0:f269e3021894 355 void serial_pinout_tx(PinName tx)
elessair 0:f269e3021894 356 {
elessair 0:f269e3021894 357 pinmap_pinout(tx, PinMap_UART_TX);
elessair 0:f269e3021894 358 }
elessair 0:f269e3021894 359
elessair 0:f269e3021894 360
elessair 0:f269e3021894 361 //******************************************************************************
elessair 0:f269e3021894 362 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
elessair 0:f269e3021894 363 {
elessair 0:f269e3021894 364 if(FlowControlNone == type) {
elessair 0:f269e3021894 365 // Disable hardware flow control
elessair 0:f269e3021894 366 obj->uart->ctrl &= ~(MXC_F_UART_CTRL_HW_FLOW_CTRL_EN);
elessair 0:f269e3021894 367 return;
elessair 0:f269e3021894 368 }
elessair 0:f269e3021894 369
elessair 0:f269e3021894 370 // Check to see if we can use HW flow control
elessair 0:f269e3021894 371 UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS);
elessair 0:f269e3021894 372 UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS);
elessair 0:f269e3021894 373 UARTName uart = (UARTName)pinmap_merge(uart_cts, uart_rts);
elessair 0:f269e3021894 374
elessair 0:f269e3021894 375 if((FlowControlCTS == type) || (FlowControlRTSCTS== type)) {
elessair 0:f269e3021894 376 // Make sure pin is in the PinMap
elessair 0:f269e3021894 377 MBED_ASSERT(uart_cts != (UARTName)NC);
elessair 0:f269e3021894 378
elessair 0:f269e3021894 379 // Enable the pin for CTS function
elessair 0:f269e3021894 380 pinmap_pinout(txflow, PinMap_UART_CTS);
elessair 0:f269e3021894 381 }
elessair 0:f269e3021894 382
elessair 0:f269e3021894 383 if((FlowControlRTS == type) || (FlowControlRTSCTS== type)) {
elessair 0:f269e3021894 384 // Make sure pin is in the PinMap
elessair 0:f269e3021894 385 MBED_ASSERT(uart_rts != (UARTName)NC);
elessair 0:f269e3021894 386
elessair 0:f269e3021894 387 // Enable the pin for RTS function
elessair 0:f269e3021894 388 pinmap_pinout(rxflow, PinMap_UART_RTS);
elessair 0:f269e3021894 389 }
elessair 0:f269e3021894 390
elessair 0:f269e3021894 391 if(FlowControlRTSCTS == type){
elessair 0:f269e3021894 392 // Make sure that the pins are pointing to the same UART
elessair 0:f269e3021894 393 MBED_ASSERT(uart != (UARTName)NC);
elessair 0:f269e3021894 394 }
elessair 0:f269e3021894 395
elessair 0:f269e3021894 396 // Enable hardware flow control
elessair 0:f269e3021894 397 obj->uart->ctrl |= MXC_F_UART_CTRL_HW_FLOW_CTRL_EN;
elessair 0:f269e3021894 398 }