Lee Kai Xuan / mbed-os

mbed-os

Fork of mbed-os by erkin yucel

targets/TARGET_Maxim/TARGET_MAX32600/analogin_api.c@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

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elessair 0:f269e3021894 1 /*******************************************************************************
elessair 0:f269e3021894 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Permission is hereby granted, free of charge, to any person obtaining a
elessair 0:f269e3021894 5 * copy of this software and associated documentation files (the "Software"),
elessair 0:f269e3021894 6 * to deal in the Software without restriction, including without limitation
elessair 0:f269e3021894 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
elessair 0:f269e3021894 8 * and/or sell copies of the Software, and to permit persons to whom the
elessair 0:f269e3021894 9 * Software is furnished to do so, subject to the following conditions:
elessair 0:f269e3021894 10 *
elessair 0:f269e3021894 11 * The above copyright notice and this permission notice shall be included
elessair 0:f269e3021894 12 * in all copies or substantial portions of the Software.
elessair 0:f269e3021894 13 *
elessair 0:f269e3021894 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
elessair 0:f269e3021894 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
elessair 0:f269e3021894 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
elessair 0:f269e3021894 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
elessair 0:f269e3021894 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
elessair 0:f269e3021894 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
elessair 0:f269e3021894 20 * OTHER DEALINGS IN THE SOFTWARE.
elessair 0:f269e3021894 21 *
elessair 0:f269e3021894 22 * Except as contained in this notice, the name of Maxim Integrated
elessair 0:f269e3021894 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
elessair 0:f269e3021894 24 * Products, Inc. Branding Policy.
elessair 0:f269e3021894 25 *
elessair 0:f269e3021894 26 * The mere transfer of this software does not imply any licenses
elessair 0:f269e3021894 27 * of trade secrets, proprietary technology, copyrights, patents,
elessair 0:f269e3021894 28 * trademarks, maskwork rights, or any other form of intellectual
elessair 0:f269e3021894 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
elessair 0:f269e3021894 30 * ownership rights.
elessair 0:f269e3021894 31 *******************************************************************************
elessair 0:f269e3021894 32 */
elessair 0:f269e3021894 33
elessair 0:f269e3021894 34 #include "mbed_assert.h"
elessair 0:f269e3021894 35 #include "analogin_api.h"
elessair 0:f269e3021894 36 #include "clkman_regs.h"
elessair 0:f269e3021894 37 #include "pwrman_regs.h"
elessair 0:f269e3021894 38 #include "afe_regs.h"
elessair 0:f269e3021894 39 #include "PeripheralPins.h"
elessair 0:f269e3021894 40
elessair 0:f269e3021894 41 #define PGA_TRK_CNT 0x1F
elessair 0:f269e3021894 42 #define ADC_ACT_CNT 0x1
elessair 0:f269e3021894 43 #define ADC_PGA_CNT 0x1
elessair 0:f269e3021894 44 #define ADC_ACQ_CNT 0x1
elessair 0:f269e3021894 45 #define ADC_SLP_CNT 0x1
elessair 0:f269e3021894 46
elessair 0:f269e3021894 47 //******************************************************************************
elessair 0:f269e3021894 48 void analogin_init(analogin_t *obj, PinName pin)
elessair 0:f269e3021894 49 {
elessair 0:f269e3021894 50 // Make sure pin is an analog pin we can use for ADC
elessair 0:f269e3021894 51 MBED_ASSERT((ADCName)pinmap_peripheral(pin, PinMap_ADC) != (ADCName)NC);
elessair 0:f269e3021894 52
elessair 0:f269e3021894 53 // Set the object pointer
elessair 0:f269e3021894 54 obj->adc = MXC_ADC;
elessair 0:f269e3021894 55 obj->adccfg = MXC_ADCCFG;
elessair 0:f269e3021894 56 obj->adc_fifo = MXC_ADC_FIFO;
elessair 0:f269e3021894 57 obj->adc_pin = pin;
elessair 0:f269e3021894 58
elessair 0:f269e3021894 59 // Set the ADC clock to the system clock frequency
elessair 0:f269e3021894 60 MXC_SET_FIELD(&MXC_CLKMAN->clk_ctrl, MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT,
elessair 0:f269e3021894 61 (MXC_F_CLKMAN_CLK_CTRL_ADC_GATE_N | (MXC_E_CLKMAN_ADC_SOURCE_SELECT_SYSTEM <<
elessair 0:f269e3021894 62 MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT_POS)));
elessair 0:f269e3021894 63
elessair 0:f269e3021894 64 // Enable AFE power
elessair 0:f269e3021894 65 MXC_PWRMAN->pwr_rst_ctrl |= MXC_F_PWRMAN_PWR_RST_CTRL_AFE_POWERED;
elessair 0:f269e3021894 66
elessair 0:f269e3021894 67 // Setup and hold window
elessair 0:f269e3021894 68 MXC_SET_FIELD(&obj->adc->tg_ctrl0, MXC_F_ADC_TG_CTRL0_PGA_TRK_CNT, PGA_TRK_CNT);
elessair 0:f269e3021894 69
elessair 0:f269e3021894 70 // Setup sampling count and timing
elessair 0:f269e3021894 71 MXC_SET_FIELD(&obj->adc->tg_ctrl1, (MXC_F_ADC_TG_CTRL1_PGA_ACQ_CNT |
elessair 0:f269e3021894 72 MXC_F_ADC_TG_CTRL1_ADC_ACQ_CNT | MXC_F_ADC_TG_CTRL1_ADC_SLP_CNT),
elessair 0:f269e3021894 73 ((ADC_PGA_CNT << MXC_F_ADC_TG_CTRL1_PGA_ACQ_CNT_POS) |
elessair 0:f269e3021894 74 (ADC_ACQ_CNT << MXC_F_ADC_TG_CTRL1_ADC_ACQ_CNT_POS) |
elessair 0:f269e3021894 75 (ADC_SLP_CNT << MXC_F_ADC_TG_CTRL1_ADC_SLP_CNT_POS) |
elessair 0:f269e3021894 76 (MXC_F_ADC_TG_CTRL1_ADC_BRST_CNT)));
elessair 0:f269e3021894 77 }
elessair 0:f269e3021894 78
elessair 0:f269e3021894 79 //******************************************************************************
elessair 0:f269e3021894 80 float analogin_read(analogin_t *obj)
elessair 0:f269e3021894 81 {
elessair 0:f269e3021894 82 // Convert integer to float
elessair 0:f269e3021894 83 return (((float)analogin_read_u16(obj)/(float)0xFFFF));
elessair 0:f269e3021894 84 }
elessair 0:f269e3021894 85
elessair 0:f269e3021894 86 //******************************************************************************
elessair 0:f269e3021894 87 uint16_t analogin_read_u16(analogin_t *obj)
elessair 0:f269e3021894 88 {
elessair 0:f269e3021894 89 // Set the pin to take readings from
elessair 0:f269e3021894 90 unsigned mux_pos;
elessair 0:f269e3021894 91 unsigned diff = 0;
elessair 0:f269e3021894 92 if(obj->adc_pin >> PORT_SHIFT == 0xB) {
elessair 0:f269e3021894 93 mux_pos = (obj->adc_pin & 0xF) + 8;
elessair 0:f269e3021894 94 } else {
elessair 0:f269e3021894 95 mux_pos = (obj->adc_pin & 0xF);
elessair 0:f269e3021894 96 }
elessair 0:f269e3021894 97
elessair 0:f269e3021894 98 if(obj->adc_pin >> PORT_SHIFT == 0xC) {
elessair 0:f269e3021894 99 diff = 1;
elessair 0:f269e3021894 100 mux_pos = (obj->adc_pin & 0xF) + 8;
elessair 0:f269e3021894 101 }
elessair 0:f269e3021894 102
elessair 0:f269e3021894 103 // Reset the ADC
elessair 0:f269e3021894 104 obj->adc->ctrl0 |= MXC_F_ADC_CTRL0_CPU_ADC_RST;
elessair 0:f269e3021894 105
elessair 0:f269e3021894 106 // Enable the ADC
elessair 0:f269e3021894 107 obj->adc->ctrl0 |= MXC_F_ADC_CTRL0_CPU_ADC_EN;
elessair 0:f269e3021894 108
elessair 0:f269e3021894 109 // Setup the ADC clock
elessair 0:f269e3021894 110 MXC_SET_FIELD(&obj->adc->ctrl0, (MXC_F_ADC_CTRL0_ADC_MODE | MXC_F_ADC_CTRL0_AVG_MODE |
elessair 0:f269e3021894 111 MXC_F_ADC_CTRL0_ADC_CLK_MODE | MXC_F_ADC_CTRL0_ADC_BI_POL),
elessair 0:f269e3021894 112 ((MXC_E_ADC_MODE_SMPLCNT_FULL_RATE << MXC_F_ADC_CTRL0_ADC_MODE_POS) |
elessair 0:f269e3021894 113 (MXC_E_ADC_AVG_MODE_FILTER_OUTPUT << MXC_F_ADC_CTRL0_AVG_MODE_POS) |
elessair 0:f269e3021894 114 (0x2 << MXC_F_ADC_CTRL0_ADC_CLK_MODE_POS) |
elessair 0:f269e3021894 115 MXC_F_ADC_CTRL0_ADC_CLK_EN));
elessair 0:f269e3021894 116
elessair 0:f269e3021894 117 // Setup the input multiplexor
elessair 0:f269e3021894 118 MXC_SET_FIELD(&obj->adc->pga_ctrl, (MXC_F_ADC_PGA_CTRL_MUX_CH_SEL |
elessair 0:f269e3021894 119 MXC_F_ADC_PGA_CTRL_MUX_DIFF | MXC_F_ADC_PGA_CTRL_PGA_GAIN),
elessair 0:f269e3021894 120 ((mux_pos << MXC_F_ADC_PGA_CTRL_MUX_CH_SEL_POS) |
elessair 0:f269e3021894 121 (diff << MXC_F_ADC_PGA_CTRL_MUX_DIFF_POS)));
elessair 0:f269e3021894 122
elessair 0:f269e3021894 123 // Setup voltage reference
elessair 0:f269e3021894 124 MXC_SET_FIELD(&MXC_AFE->ctrl1, MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL,
elessair 0:f269e3021894 125 (MXC_F_AFE_CTRL1_REF_ADC_POWERUP | MXC_F_AFE_CTRL1_REF_BLK_POWERUP |
elessair 0:f269e3021894 126 (MXC_E_AFE_REF_VOLT_SEL_1500 << MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL_POS)));
elessair 0:f269e3021894 127
elessair 0:f269e3021894 128 // Clear the done bit
elessair 0:f269e3021894 129 obj->adc->intr = MXC_F_ADC_INTR_DONE_IF;
elessair 0:f269e3021894 130
elessair 0:f269e3021894 131 // Take one sample
elessair 0:f269e3021894 132 obj->adc->tg_ctrl0 |= (1 << MXC_F_ADC_TG_CTRL0_ADC_SMPL_CNT_POS);
elessair 0:f269e3021894 133
elessair 0:f269e3021894 134 // Set the start bit to take the sample
elessair 0:f269e3021894 135 obj->adc->ctrl0 |= MXC_F_ADC_CTRL0_CPU_ADC_START;
elessair 0:f269e3021894 136
elessair 0:f269e3021894 137 // Wait for the conversion to complete
elessair 0:f269e3021894 138 while(!(obj->adc->intr & MXC_F_ADC_INTR_DONE_IF)) {}
elessair 0:f269e3021894 139
elessair 0:f269e3021894 140 // Get sample from the fifo
elessair 0:f269e3021894 141 uint16_t sample = (uint16_t)(obj->adc->out & 0xFFFF);
elessair 0:f269e3021894 142
elessair 0:f269e3021894 143 // Disable ADC
elessair 0:f269e3021894 144 obj->adc->ctrl0 &= ~MXC_F_ADC_CTRL0_CPU_ADC_EN;
elessair 0:f269e3021894 145
elessair 0:f269e3021894 146 return (sample - 1);
elessair 0:f269e3021894 147 }