Lee Kai Xuan / mbed-os

mbed-os

Fork of mbed-os by erkin yucel

targets/TARGET_Freescale/TARGET_K20XX/serial_api.c@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2015 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 #include "mbed_assert.h"
elessair 0:f269e3021894 17 #include "serial_api.h"
elessair 0:f269e3021894 18
elessair 0:f269e3021894 19 #include <string.h>
elessair 0:f269e3021894 20
elessair 0:f269e3021894 21 #include "cmsis.h"
elessair 0:f269e3021894 22 #include "pinmap.h"
elessair 0:f269e3021894 23 #include "clk_freqs.h"
elessair 0:f269e3021894 24 #include "PeripheralPins.h"
elessair 0:f269e3021894 25
elessair 0:f269e3021894 26 #define UART_NUM 3
elessair 0:f269e3021894 27
elessair 0:f269e3021894 28 static uint32_t serial_irq_ids[UART_NUM] = {0};
elessair 0:f269e3021894 29 static uart_irq_handler irq_handler;
elessair 0:f269e3021894 30
elessair 0:f269e3021894 31 int stdio_uart_inited = 0;
elessair 0:f269e3021894 32 serial_t stdio_uart;
elessair 0:f269e3021894 33
elessair 0:f269e3021894 34 void serial_init(serial_t *obj, PinName tx, PinName rx) {
elessair 0:f269e3021894 35 // determine the UART to use
elessair 0:f269e3021894 36 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
elessair 0:f269e3021894 37 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
elessair 0:f269e3021894 38 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
elessair 0:f269e3021894 39 MBED_ASSERT((int)uart != NC);
elessair 0:f269e3021894 40
elessair 0:f269e3021894 41 obj->uart = (UART_Type *)uart;
elessair 0:f269e3021894 42 // enable clk
elessair 0:f269e3021894 43 switch (uart) {
elessair 0:f269e3021894 44 case UART_0:
elessair 0:f269e3021894 45 mcgpllfll_frequency();
elessair 0:f269e3021894 46 SIM->SCGC4 |= SIM_SCGC4_UART0_MASK;
elessair 0:f269e3021894 47 break;
elessair 0:f269e3021894 48 case UART_1:
elessair 0:f269e3021894 49 mcgpllfll_frequency();
elessair 0:f269e3021894 50 SIM->SCGC4 |= SIM_SCGC4_UART1_MASK;
elessair 0:f269e3021894 51 break;
elessair 0:f269e3021894 52 case UART_2:
elessair 0:f269e3021894 53 SIM->SCGC4 |= SIM_SCGC4_UART2_MASK;
elessair 0:f269e3021894 54 break;
elessair 0:f269e3021894 55 }
elessair 0:f269e3021894 56 // Disable UART before changing registers
elessair 0:f269e3021894 57 obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
elessair 0:f269e3021894 58
elessair 0:f269e3021894 59 switch (uart) {
elessair 0:f269e3021894 60 case UART_0:
elessair 0:f269e3021894 61 obj->index = 0;
elessair 0:f269e3021894 62 break;
elessair 0:f269e3021894 63 case UART_1:
elessair 0:f269e3021894 64 obj->index = 1;
elessair 0:f269e3021894 65 break;
elessair 0:f269e3021894 66 case UART_2:
elessair 0:f269e3021894 67 obj->index = 2;
elessair 0:f269e3021894 68 break;
elessair 0:f269e3021894 69 }
elessair 0:f269e3021894 70
elessair 0:f269e3021894 71 // set default baud rate and format
elessair 0:f269e3021894 72 serial_baud (obj, 9600);
elessair 0:f269e3021894 73 serial_format(obj, 8, ParityNone, 1);
elessair 0:f269e3021894 74
elessair 0:f269e3021894 75 // pinout the chosen uart
elessair 0:f269e3021894 76 pinmap_pinout(tx, PinMap_UART_TX);
elessair 0:f269e3021894 77 pinmap_pinout(rx, PinMap_UART_RX);
elessair 0:f269e3021894 78
elessair 0:f269e3021894 79 // set rx/tx pins in PullUp mode
elessair 0:f269e3021894 80 if (tx != NC) {
elessair 0:f269e3021894 81 pin_mode(tx, PullUp);
elessair 0:f269e3021894 82 }
elessair 0:f269e3021894 83 if (rx != NC) {
elessair 0:f269e3021894 84 pin_mode(rx, PullUp);
elessair 0:f269e3021894 85 }
elessair 0:f269e3021894 86
elessair 0:f269e3021894 87 obj->uart->C2 |= (UART_C2_RE_MASK | UART_C2_TE_MASK);
elessair 0:f269e3021894 88
elessair 0:f269e3021894 89 if (uart == STDIO_UART) {
elessair 0:f269e3021894 90 stdio_uart_inited = 1;
elessair 0:f269e3021894 91 memcpy(&stdio_uart, obj, sizeof(serial_t));
elessair 0:f269e3021894 92 }
elessair 0:f269e3021894 93 }
elessair 0:f269e3021894 94
elessair 0:f269e3021894 95 void serial_free(serial_t *obj) {
elessair 0:f269e3021894 96 serial_irq_ids[obj->index] = 0;
elessair 0:f269e3021894 97 }
elessair 0:f269e3021894 98
elessair 0:f269e3021894 99 void serial_baud(serial_t *obj, int baudrate) {
elessair 0:f269e3021894 100 // save C2 state
elessair 0:f269e3021894 101 uint8_t c2_state = (obj->uart->C2 & (UART_C2_RE_MASK | UART_C2_TE_MASK));
elessair 0:f269e3021894 102
elessair 0:f269e3021894 103 // Disable UART before changing registers
elessair 0:f269e3021894 104 obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
elessair 0:f269e3021894 105
elessair 0:f269e3021894 106 uint32_t PCLK;
elessair 0:f269e3021894 107 if (obj->uart != UART2) {
elessair 0:f269e3021894 108 PCLK = mcgpllfll_frequency();
elessair 0:f269e3021894 109 }
elessair 0:f269e3021894 110 else {
elessair 0:f269e3021894 111 PCLK = bus_frequency();
elessair 0:f269e3021894 112 }
elessair 0:f269e3021894 113
elessair 0:f269e3021894 114 uint16_t DL = PCLK / (16 * baudrate);
elessair 0:f269e3021894 115 uint32_t BRFA = (2 * PCLK) / baudrate - 32 * DL;
elessair 0:f269e3021894 116
elessair 0:f269e3021894 117 // set BDH and BDL
elessair 0:f269e3021894 118 obj->uart->BDH = (obj->uart->BDH & ~(0x1f)) | ((DL >> 8) & 0x1f);
elessair 0:f269e3021894 119 obj->uart->BDL = (obj->uart->BDL & ~(0xff)) | ((DL >> 0) & 0xff);
elessair 0:f269e3021894 120
elessair 0:f269e3021894 121 obj->uart->C4 &= ~0x1F;
elessair 0:f269e3021894 122 obj->uart->C4 |= BRFA & 0x1F;
elessair 0:f269e3021894 123
elessair 0:f269e3021894 124 // restore C2 state
elessair 0:f269e3021894 125 obj->uart->C2 |= c2_state;
elessair 0:f269e3021894 126 }
elessair 0:f269e3021894 127
elessair 0:f269e3021894 128 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
elessair 0:f269e3021894 129 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
elessair 0:f269e3021894 130 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven));
elessair 0:f269e3021894 131 MBED_ASSERT((data_bits == 8) || (data_bits == 9));
elessair 0:f269e3021894 132
elessair 0:f269e3021894 133 // save C2 state
elessair 0:f269e3021894 134 uint32_t c2_state = (obj->uart->C2 & (UART_C2_RE_MASK | UART_C2_TE_MASK));
elessair 0:f269e3021894 135
elessair 0:f269e3021894 136 // Disable UART before changing registers
elessair 0:f269e3021894 137 obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
elessair 0:f269e3021894 138
elessair 0:f269e3021894 139 // 8 data bits = 0 ... 9 data bits = 1
elessair 0:f269e3021894 140 data_bits -= 8;
elessair 0:f269e3021894 141
elessair 0:f269e3021894 142 uint32_t parity_enable, parity_select;
elessair 0:f269e3021894 143 switch (parity) {
elessair 0:f269e3021894 144 case ParityNone:
elessair 0:f269e3021894 145 parity_enable = 0;
elessair 0:f269e3021894 146 parity_select = 0;
elessair 0:f269e3021894 147 break;
elessair 0:f269e3021894 148 case ParityOdd :
elessair 0:f269e3021894 149 parity_enable = 1;
elessair 0:f269e3021894 150 parity_select = 1;
elessair 0:f269e3021894 151 data_bits++;
elessair 0:f269e3021894 152 break;
elessair 0:f269e3021894 153 case ParityEven:
elessair 0:f269e3021894 154 parity_enable = 1;
elessair 0:f269e3021894 155 parity_select = 0;
elessair 0:f269e3021894 156 data_bits++;
elessair 0:f269e3021894 157 break;
elessair 0:f269e3021894 158 default:
elessair 0:f269e3021894 159 break;
elessair 0:f269e3021894 160 }
elessair 0:f269e3021894 161
elessair 0:f269e3021894 162 stop_bits -= 1;
elessair 0:f269e3021894 163
elessair 0:f269e3021894 164 uint32_t m10 = 0;
elessair 0:f269e3021894 165
elessair 0:f269e3021894 166 // 9 data bits + parity - only uart0 support
elessair 0:f269e3021894 167 if (data_bits == 2) {
elessair 0:f269e3021894 168 MBED_ASSERT(obj->index == 0);
elessair 0:f269e3021894 169 data_bits = 0;
elessair 0:f269e3021894 170 m10 = 1;
elessair 0:f269e3021894 171 }
elessair 0:f269e3021894 172
elessair 0:f269e3021894 173 // data bits, parity and parity mode
elessair 0:f269e3021894 174 obj->uart->C1 = ((data_bits << 4)
elessair 0:f269e3021894 175 | (parity_enable << 1)
elessair 0:f269e3021894 176 | (parity_select << 0));
elessair 0:f269e3021894 177
elessair 0:f269e3021894 178 //enable 10bit mode if needed
elessair 0:f269e3021894 179 if (obj->index == 0) {
elessair 0:f269e3021894 180 obj->uart->C4 &= ~UART_C4_M10_MASK;
elessair 0:f269e3021894 181 obj->uart->C4 |= (m10 << UART_C4_M10_SHIFT);
elessair 0:f269e3021894 182 }
elessair 0:f269e3021894 183
elessair 0:f269e3021894 184 // stop bits
elessair 0:f269e3021894 185 obj->uart->BDH &= ~UART_BDH_SBR_MASK;
elessair 0:f269e3021894 186 obj->uart->BDH |= (stop_bits << UART_BDH_SBR_SHIFT);
elessair 0:f269e3021894 187
elessair 0:f269e3021894 188 // restore C2 state
elessair 0:f269e3021894 189 obj->uart->C2 |= c2_state;
elessair 0:f269e3021894 190 }
elessair 0:f269e3021894 191
elessair 0:f269e3021894 192 /******************************************************************************
elessair 0:f269e3021894 193 * INTERRUPTS HANDLING
elessair 0:f269e3021894 194 ******************************************************************************/
elessair 0:f269e3021894 195 static inline void uart_irq(uint8_t status, uint32_t index) {
elessair 0:f269e3021894 196 if (serial_irq_ids[index] != 0) {
elessair 0:f269e3021894 197 if (status & UART_S1_TDRE_MASK)
elessair 0:f269e3021894 198 irq_handler(serial_irq_ids[index], TxIrq);
elessair 0:f269e3021894 199
elessair 0:f269e3021894 200 if (status & UART_S1_RDRF_MASK)
elessair 0:f269e3021894 201 irq_handler(serial_irq_ids[index], RxIrq);
elessair 0:f269e3021894 202 }
elessair 0:f269e3021894 203 }
elessair 0:f269e3021894 204
elessair 0:f269e3021894 205 void uart0_irq() {uart_irq(UART0->S1, 0);}
elessair 0:f269e3021894 206 void uart1_irq() {uart_irq(UART1->S1, 1);}
elessair 0:f269e3021894 207 void uart2_irq() {uart_irq(UART2->S1, 2);}
elessair 0:f269e3021894 208
elessair 0:f269e3021894 209 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
elessair 0:f269e3021894 210 irq_handler = handler;
elessair 0:f269e3021894 211 serial_irq_ids[obj->index] = id;
elessair 0:f269e3021894 212 }
elessair 0:f269e3021894 213
elessair 0:f269e3021894 214 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
elessair 0:f269e3021894 215 IRQn_Type irq_n = (IRQn_Type)0;
elessair 0:f269e3021894 216 uint32_t vector = 0;
elessair 0:f269e3021894 217 switch ((int)obj->uart) {
elessair 0:f269e3021894 218 case UART_0:
elessair 0:f269e3021894 219 irq_n=UART0_RX_TX_IRQn;
elessair 0:f269e3021894 220 vector = (uint32_t)&uart0_irq;
elessair 0:f269e3021894 221 break;
elessair 0:f269e3021894 222 case UART_1:
elessair 0:f269e3021894 223 irq_n=UART1_RX_TX_IRQn;
elessair 0:f269e3021894 224 vector = (uint32_t)&uart1_irq;
elessair 0:f269e3021894 225 break;
elessair 0:f269e3021894 226 case UART_2:
elessair 0:f269e3021894 227 irq_n=UART2_RX_TX_IRQn;
elessair 0:f269e3021894 228 vector = (uint32_t)&uart2_irq;
elessair 0:f269e3021894 229 break;
elessair 0:f269e3021894 230 }
elessair 0:f269e3021894 231
elessair 0:f269e3021894 232 if (enable) {
elessair 0:f269e3021894 233 switch (irq) {
elessair 0:f269e3021894 234 case RxIrq:
elessair 0:f269e3021894 235 obj->uart->C2 |= (UART_C2_RIE_MASK);
elessair 0:f269e3021894 236 break;
elessair 0:f269e3021894 237 case TxIrq:
elessair 0:f269e3021894 238 obj->uart->C2 |= (UART_C2_TIE_MASK);
elessair 0:f269e3021894 239 break;
elessair 0:f269e3021894 240 }
elessair 0:f269e3021894 241 NVIC_SetVector(irq_n, vector);
elessair 0:f269e3021894 242 NVIC_EnableIRQ(irq_n);
elessair 0:f269e3021894 243
elessair 0:f269e3021894 244 } else { // disable
elessair 0:f269e3021894 245 int all_disabled = 0;
elessair 0:f269e3021894 246 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
elessair 0:f269e3021894 247 switch (irq) {
elessair 0:f269e3021894 248 case RxIrq:
elessair 0:f269e3021894 249 obj->uart->C2 &= ~(UART_C2_RIE_MASK);
elessair 0:f269e3021894 250 break;
elessair 0:f269e3021894 251 case TxIrq:
elessair 0:f269e3021894 252 obj->uart->C2 &= ~(UART_C2_TIE_MASK);
elessair 0:f269e3021894 253 break;
elessair 0:f269e3021894 254 }
elessair 0:f269e3021894 255 switch (other_irq) {
elessair 0:f269e3021894 256 case RxIrq:
elessair 0:f269e3021894 257 all_disabled = (obj->uart->C2 & (UART_C2_RIE_MASK)) == 0;
elessair 0:f269e3021894 258 break;
elessair 0:f269e3021894 259 case TxIrq:
elessair 0:f269e3021894 260 all_disabled = (obj->uart->C2 & (UART_C2_TIE_MASK)) == 0;
elessair 0:f269e3021894 261 break;
elessair 0:f269e3021894 262 }
elessair 0:f269e3021894 263 if (all_disabled)
elessair 0:f269e3021894 264 NVIC_DisableIRQ(irq_n);
elessair 0:f269e3021894 265 }
elessair 0:f269e3021894 266 }
elessair 0:f269e3021894 267
elessair 0:f269e3021894 268 int serial_getc(serial_t *obj) {
elessair 0:f269e3021894 269 while (!serial_readable(obj));
elessair 0:f269e3021894 270 return obj->uart->D;
elessair 0:f269e3021894 271 }
elessair 0:f269e3021894 272
elessair 0:f269e3021894 273 void serial_putc(serial_t *obj, int c) {
elessair 0:f269e3021894 274 while (!serial_writable(obj));
elessair 0:f269e3021894 275 obj->uart->D = c;
elessair 0:f269e3021894 276 }
elessair 0:f269e3021894 277
elessair 0:f269e3021894 278 int serial_readable(serial_t *obj) {
elessair 0:f269e3021894 279
elessair 0:f269e3021894 280 return (obj->uart->S1 & UART_S1_RDRF_MASK);
elessair 0:f269e3021894 281 }
elessair 0:f269e3021894 282
elessair 0:f269e3021894 283 int serial_writable(serial_t *obj) {
elessair 0:f269e3021894 284
elessair 0:f269e3021894 285 return (obj->uart->S1 & UART_S1_TDRE_MASK);
elessair 0:f269e3021894 286 }
elessair 0:f269e3021894 287
elessair 0:f269e3021894 288 void serial_clear(serial_t *obj) {
elessair 0:f269e3021894 289 }
elessair 0:f269e3021894 290
elessair 0:f269e3021894 291 void serial_pinout_tx(PinName tx) {
elessair 0:f269e3021894 292 pinmap_pinout(tx, PinMap_UART_TX);
elessair 0:f269e3021894 293 }
elessair 0:f269e3021894 294
elessair 0:f269e3021894 295 void serial_break_set(serial_t *obj) {
elessair 0:f269e3021894 296 obj->uart->C2 |= UART_C2_SBK_MASK;
elessair 0:f269e3021894 297 }
elessair 0:f269e3021894 298
elessair 0:f269e3021894 299 void serial_break_clear(serial_t *obj) {
elessair 0:f269e3021894 300 obj->uart->C2 &= ~UART_C2_SBK_MASK;
elessair 0:f269e3021894 301 }