Lee Kai Xuan / mbed-os

mbed-os

Fork of mbed-os by erkin yucel

targets/TARGET_ONSEMI/TARGET_NCS36510/rfAna_map.h@1:3deb71413561, 2017-07-20 (annotated)

Committer:
xuaner
Date:
Thu Jul 20 14:26:57 2017 +0000
Revision:
1:3deb71413561
Parent:
0:f269e3021894 
mbed_os

Who changed what in which revision?

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elessair 0:f269e3021894 1 /**
elessair 0:f269e3021894 2 ******************************************************************************
elessair 0:f269e3021894 3 * @file rfAna_map.h
elessair 0:f269e3021894 4 * @brief rfAna hw module register map
elessair 0:f269e3021894 5 * @internal
elessair 0:f269e3021894 6 * @author ON Semiconductor
elessair 0:f269e3021894 7 * $Rev: 2953 $
elessair 0:f269e3021894 8 * $Date: 2014-09-15 18:13:01 +0530 (Mon, 15 Sep 2014) $
elessair 0:f269e3021894 9 ******************************************************************************
elessair 0:f269e3021894 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
elessair 0:f269e3021894 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
elessair 0:f269e3021894 12 * under limited terms and conditions. The terms and conditions pertaining to the software
elessair 0:f269e3021894 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
elessair 0:f269e3021894 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
elessair 0:f269e3021894 15 * if applicable the software license agreement. Do not use this software and/or
elessair 0:f269e3021894 16 * documentation unless you have carefully read and you agree to the limited terms and
elessair 0:f269e3021894 17 * conditions. By using this software and/or documentation, you agree to the limited
elessair 0:f269e3021894 18 * terms and conditions.
elessair 0:f269e3021894 19 *
elessair 0:f269e3021894 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
elessair 0:f269e3021894 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
elessair 0:f269e3021894 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
elessair 0:f269e3021894 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
elessair 0:f269e3021894 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
elessair 0:f269e3021894 25 * @endinternal
elessair 0:f269e3021894 26 *
elessair 0:f269e3021894 27 * @ingroup rfAna
elessair 0:f269e3021894 28 *
elessair 0:f269e3021894 29 * @details
elessair 0:f269e3021894 30 * <p>
elessair 0:f269e3021894 31 * Rf and Analog control and trimming hw module register map
elessair 0:f269e3021894 32 * </p>
elessair 0:f269e3021894 33 */
elessair 0:f269e3021894 34
elessair 0:f269e3021894 35 #ifndef RFANA_MAP_H_
elessair 0:f269e3021894 36 #define RFANA_MAP_H_
elessair 0:f269e3021894 37
elessair 0:f269e3021894 38 /*************************************************************************************************
elessair 0:f269e3021894 39 * *
elessair 0:f269e3021894 40 * Header files *
elessair 0:f269e3021894 41 * *
elessair 0:f269e3021894 42 *************************************************************************************************/
elessair 0:f269e3021894 43
elessair 0:f269e3021894 44 #include "architecture.h"
elessair 0:f269e3021894 45
elessair 0:f269e3021894 46 /**************************************************************************************************
elessair 0:f269e3021894 47 * *
elessair 0:f269e3021894 48 * Type definitions *
elessair 0:f269e3021894 49 * *
elessair 0:f269e3021894 50 **************************************************************************************************/
elessair 0:f269e3021894 51
elessair 0:f269e3021894 52 /** rfAna register map (control part) */
elessair 0:f269e3021894 53 typedef struct {
elessair 0:f269e3021894 54 union {
elessair 0:f269e3021894 55 struct {
elessair 0:f269e3021894 56 __IO uint32_t FRACT_WORD:24;
elessair 0:f269e3021894 57 __IO uint32_t INT_WORD:8;
elessair 0:f269e3021894 58 } BITS;
elessair 0:f269e3021894 59 __IO uint32_t WORD;
elessair 0:f269e3021894 60 } TX_LO_CONTROL;
elessair 0:f269e3021894 61 union {
elessair 0:f269e3021894 62 struct {
elessair 0:f269e3021894 63 __IO uint32_t FRACT_WORD:24;
elessair 0:f269e3021894 64 __IO uint32_t INT_WORD:8;
elessair 0:f269e3021894 65 } BITS;
elessair 0:f269e3021894 66 __IO uint32_t WORD;
elessair 0:f269e3021894 67 } RX_LO_CONTROL;
elessair 0:f269e3021894 68 union {
elessair 0:f269e3021894 69 struct {
elessair 0:f269e3021894 70 __IO uint32_t PLL_RESET_TIME:10;
elessair 0:f269e3021894 71 __I uint32_t RESERVED:6;
elessair 0:f269e3021894 72 __IO uint32_t PLL_LOCK_TIME:10;
elessair 0:f269e3021894 73 } BITS;
elessair 0:f269e3021894 74 __IO uint32_t WORD;
elessair 0:f269e3021894 75 } PLL_TIMING;
elessair 0:f269e3021894 76 union {
elessair 0:f269e3021894 77 struct {
elessair 0:f269e3021894 78 __IO uint32_t LNA_GAIN_MODE:1;
elessair 0:f269e3021894 79 __IO uint32_t ADC_DITHER_MODE:1;
elessair 0:f269e3021894 80 } BITS;
elessair 0:f269e3021894 81 __IO uint32_t WORD;
elessair 0:f269e3021894 82 } RX_CONTROL;
elessair 0:f269e3021894 83 __IO uint32_t TX_POWER;
elessair 0:f269e3021894 84 __I uint32_t RECEIVER_GAIN;
elessair 0:f269e3021894 85 } RfAnaReg_t, *RfAnaReg_pt;
elessair 0:f269e3021894 86
elessair 0:f269e3021894 87 /** rfAna register map (trimming part) */
elessair 0:f269e3021894 88 typedef struct {
elessair 0:f269e3021894 89 __IO uint32_t PMU_TRIM;
elessair 0:f269e3021894 90 __IO uint32_t RESERVED;
elessair 0:f269e3021894 91 __IO uint32_t RX_CHAIN_TRIM;
elessair 0:f269e3021894 92 union {
elessair 0:f269e3021894 93 struct {
elessair 0:f269e3021894 94 __I uint32_t BIAS_VCO_TRIM:4;
elessair 0:f269e3021894 95 __I uint32_t MODULATION_TRIM:4;
elessair 0:f269e3021894 96 __IO uint32_t TX_VCO_TRIM:4;
elessair 0:f269e3021894 97 __IO uint32_t RX_VCO_TRIM:4;
elessair 0:f269e3021894 98 __I uint32_t DIV_TRIM:3;
elessair 0:f269e3021894 99 __I uint32_t REG_TRIM:2;
elessair 0:f269e3021894 100 __I uint32_t LFR_TRIM:3;
elessair 0:f269e3021894 101 __I uint32_t PAD0:4;
elessair 0:f269e3021894 102 __I uint32_t CHARGE_PUMP_RANGE:4;
elessair 0:f269e3021894 103 } BITS;
elessair 0:f269e3021894 104 __IO uint32_t WORD;
elessair 0:f269e3021894 105 } PLL_TRIM;
elessair 0:f269e3021894 106 __IO uint32_t PLL_VCO_TAP_LOCATION;
elessair 0:f269e3021894 107 __IO uint32_t TX_CHAIN_TRIM;
elessair 0:f269e3021894 108 #ifdef REVC
elessair 0:f269e3021894 109 __IO uint32_t RX_VCO_TRIM_LUT2; /** 0x40019098 */
elessair 0:f269e3021894 110 __IO uint32_t RX_VCO_TRIM_LUT1; /** 0x4001909C */
elessair 0:f269e3021894 111 __IO uint32_t TX_VCO_TRIM_LUT2; /** 0x400190A0 */
elessair 0:f269e3021894 112 __IO uint32_t TX_VCO_TRIM_LUT1; /** 0x400190A4 */
elessair 0:f269e3021894 113 __IO uint32_t ADC_OFFSET_BUF; /** 0x400190A8 */
elessair 0:f269e3021894 114 #endif
elessair 0:f269e3021894 115
elessair 0:f269e3021894 116 #ifdef REVD
elessair 0:f269e3021894 117 __IO uint32_t RX_VCO_TRIM_LUT2; /** 0x40019098 */
elessair 0:f269e3021894 118 __IO uint32_t RX_VCO_TRIM_LUT1; /** 0x4001909C */
elessair 0:f269e3021894 119 __IO uint32_t TX_VCO_TRIM_LUT2; /** 0x400190A0 */
elessair 0:f269e3021894 120 __IO uint32_t TX_VCO_TRIM_LUT1; /** 0x400190A4 */
elessair 0:f269e3021894 121 __IO uint32_t ADC_OFFSET_BUF; /** 0x400190A8 */
elessair 0:f269e3021894 122 #endif /* REVD */
elessair 0:f269e3021894 123 } RfAnaTrimReg_t, *RfAnaTrimReg_pt;
elessair 0:f269e3021894 124
elessair 0:f269e3021894 125 #endif /* RFANA_MAP_H_ */