Lee Kai Xuan / mbed-os

mbed-os

Fork of mbed-os by erkin yucel

targets/TARGET_ONSEMI/TARGET_NCS36510/random_map.h@1:3deb71413561, 2017-07-20 (annotated)

Committer:
xuaner
Date:
Thu Jul 20 14:26:57 2017 +0000
Revision:
1:3deb71413561
Parent:
0:f269e3021894 
mbed_os

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elessair 0:f269e3021894 1 /**
elessair 0:f269e3021894 2 ******************************************************************************
elessair 0:f269e3021894 3 * @file random_map.h
elessair 0:f269e3021894 4 * @brief Randomizer hw module register map
elessair 0:f269e3021894 5 * @internal
elessair 0:f269e3021894 6 * @author ON Semiconductor
elessair 0:f269e3021894 7 * $Rev: 3283 $
elessair 0:f269e3021894 8 * $Date: 2015-02-26 18:52:22 +0530 (Thu, 26 Feb 2015) $
elessair 0:f269e3021894 9 ******************************************************************************
elessair 0:f269e3021894 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
elessair 0:f269e3021894 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
elessair 0:f269e3021894 12 * under limited terms and conditions. The terms and conditions pertaining to the software
elessair 0:f269e3021894 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
elessair 0:f269e3021894 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
elessair 0:f269e3021894 15 * if applicable the software license agreement. Do not use this software and/or
elessair 0:f269e3021894 16 * documentation unless you have carefully read and you agree to the limited terms and
elessair 0:f269e3021894 17 * conditions. By using this software and/or documentation, you agree to the limited
elessair 0:f269e3021894 18 * terms and conditions.
elessair 0:f269e3021894 19 *
elessair 0:f269e3021894 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
elessair 0:f269e3021894 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
elessair 0:f269e3021894 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
elessair 0:f269e3021894 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
elessair 0:f269e3021894 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
elessair 0:f269e3021894 25 * @endinternal
elessair 0:f269e3021894 26 *
elessair 0:f269e3021894 27 * @ingroup random
elessair 0:f269e3021894 28 *
elessair 0:f269e3021894 29 * @details
elessair 0:f269e3021894 30 */
elessair 0:f269e3021894 31
elessair 0:f269e3021894 32 #ifndef RANDOM_MAP_H_
elessair 0:f269e3021894 33 #define RANDOM_MAP_H_
elessair 0:f269e3021894 34
elessair 0:f269e3021894 35 /*************************************************************************************************
elessair 0:f269e3021894 36 * *
elessair 0:f269e3021894 37 * Header files *
elessair 0:f269e3021894 38 * *
elessair 0:f269e3021894 39 *************************************************************************************************/
elessair 0:f269e3021894 40
elessair 0:f269e3021894 41 #include "architecture.h"
elessair 0:f269e3021894 42
elessair 0:f269e3021894 43 /**************************************************************************************************
elessair 0:f269e3021894 44 * *
elessair 0:f269e3021894 45 * Type definitions *
elessair 0:f269e3021894 46 * *
elessair 0:f269e3021894 47 **************************************************************************************************/
elessair 0:f269e3021894 48
elessair 0:f269e3021894 49 /** Random Number Generator Control HW Structure Overlay */
elessair 0:f269e3021894 50 typedef struct {
elessair 0:f269e3021894 51 __IO uint32_t WR_SEED_RD_RAND; /* Seed set & random read reg - 0x40011000 */
elessair 0:f269e3021894 52 #ifdef REVB
elessair 0:f269e3021894 53 __IO uint32_t MODE;
elessair 0:f269e3021894 54 #endif /* REVB */
elessair 0:f269e3021894 55 union {
elessair 0:f269e3021894 56 struct {
elessair 0:f269e3021894 57 __IO uint32_t MODE :1; /**<Mode Register, 0 – LSFR is updated on every rising edge of PCLK, 1 – LSFR is only updated on a read event of the LSFR register */
elessair 0:f269e3021894 58 __IO uint32_t BYTE_SWAP :1; /**<Byte Swap Control, 0 – 32-bit byte swap, 1 – 64-bit byte swap */
elessair 0:f269e3021894 59 __IO uint32_t MEATSTABLE_SPEED :1; /**<Meta-stable Latch TRNG Speed Control, 0 – Slow mode, 1 – Fast mode */
elessair 0:f269e3021894 60 __IO uint32_t WHITENOISE_EN :1; /**<White Noise TRNG Enable, 0 – Disabled, 1 – Enabled */
elessair 0:f269e3021894 61 __IO uint32_t METASTABLE_LATCH_EN :1; /**<Meta-stable Latch TRNG Enable, 0 – Disabled, 1 – Enabled */
elessair 0:f269e3021894 62 __IO uint32_t JIC :1; /**<JIC */
elessair 0:f269e3021894 63 } BITS;
elessair 0:f269e3021894 64 __IO uint32_t WORD;
elessair 0:f269e3021894 65 } CONTROL; /* Control register - 0x40011004 */
elessair 0:f269e3021894 66 union {
elessair 0:f269e3021894 67 struct {
elessair 0:f269e3021894 68 __IO uint32_t BYTE_0 :8; /**<Byte #0*/
elessair 0:f269e3021894 69 __IO uint32_t BYTE_1 :8; /**<Byte #1*/
elessair 0:f269e3021894 70 __IO uint32_t BYTE_2 :8; /**<Byte #2*/
elessair 0:f269e3021894 71 __IO uint32_t BYTE_3 :8; /**<Byte #3*/
elessair 0:f269e3021894 72 } BITS;
elessair 0:f269e3021894 73 __IO uint32_t WORD;
elessair 0:f269e3021894 74 } WRITE_BUF_LSW; /* Byte swap write buffer – Least significant word - 0x40011008 */
elessair 0:f269e3021894 75 union {
elessair 0:f269e3021894 76 struct {
elessair 0:f269e3021894 77 __IO uint32_t BYTE_4 :8; /**<Byte #4*/
elessair 0:f269e3021894 78 __IO uint32_t BYTE_5 :8; /**<Byte #5*/
elessair 0:f269e3021894 79 __IO uint32_t BYTE_6 :8; /**<Byte #6*/
elessair 0:f269e3021894 80 __IO uint32_t BYTE_7 :8; /**<Byte #7*/
elessair 0:f269e3021894 81 } BITS;
elessair 0:f269e3021894 82 __IO uint32_t WORD;
elessair 0:f269e3021894 83 } WRITE_BUF_MSW; /* Byte swap write buffer – Most significant word - 0x4001100C */
elessair 0:f269e3021894 84 union {
elessair 0:f269e3021894 85 struct {
elessair 0:f269e3021894 86 __IO uint32_t BYTE_7_3 :8; /**<Byte Swap Control == 1? Byte #7 : Byte #3*/
elessair 0:f269e3021894 87 __IO uint32_t BYTE_6_2 :8; /**<Byte Swap Control == 1? Byte #6 : Byte #2*/
elessair 0:f269e3021894 88 __IO uint32_t BYTE_5_1 :8; /**<Byte Swap Control == 1? Byte #5 : Byte #1*/
elessair 0:f269e3021894 89 __IO uint32_t BYTE_4_0 :8; /**<Byte Swap Control == 1? Byte #4 : Byte #0*/
elessair 0:f269e3021894 90 } BITS;
elessair 0:f269e3021894 91 __IO uint32_t WORD;
elessair 0:f269e3021894 92 } READ_BUF_LSW; /* Byte swap read buffer – Least significant word - 0x40011010 */
elessair 0:f269e3021894 93 union {
elessair 0:f269e3021894 94 struct {
elessair 0:f269e3021894 95 __IO uint32_t BYTE_3 :8; /**<Byte #3*/
elessair 0:f269e3021894 96 __IO uint32_t BYTE_2 :8; /**<Byte #2*/
elessair 0:f269e3021894 97 __IO uint32_t BYTE_1 :8; /**<Byte #1*/
elessair 0:f269e3021894 98 __IO uint32_t BYTE_0 :8; /**<Byte #0*/
elessair 0:f269e3021894 99 } BITS;
elessair 0:f269e3021894 100 __IO uint32_t WORD;
elessair 0:f269e3021894 101 } READ_BUF_MSW; /* Byte swap read buffer – Most significant word - 0x40011014 */
elessair 0:f269e3021894 102 __I uint32_t METASTABLE_LATCH_VAL; /* Meta-stable latch TRNG value - 0x40011018 */
elessair 0:f269e3021894 103 __I uint32_t WHITENOISE_VAL; /* White noise TRNG value - 0x4001101C */
elessair 0:f269e3021894 104 } RandReg_t, *RandReg_pt;
elessair 0:f269e3021894 105
elessair 0:f269e3021894 106 #endif /* RANDOM_MAP_H_ */