Lee Kai Xuan / mbed-os

mbed-os

Fork of mbed-os by erkin yucel

targets/TARGET_NXP/TARGET_LPC81X/us_ticker.c@1:3deb71413561, 2017-07-20 (annotated)

Committer:
xuaner
Date:
Thu Jul 20 14:26:57 2017 +0000
Revision:
1:3deb71413561
Parent:
0:f269e3021894 
mbed_os

Who changed what in which revision?

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elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2013 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 #include <stddef.h>
elessair 0:f269e3021894 17 #include "us_ticker_api.h"
elessair 0:f269e3021894 18 #include "PeripheralNames.h"
elessair 0:f269e3021894 19
elessair 0:f269e3021894 20 //New, using MRT instead of SCT, needed to free up SCT for PWM
elessair 0:f269e3021894 21 //Ported from LPC824 libs
elessair 0:f269e3021894 22 static int us_ticker_inited = 0;
elessair 0:f269e3021894 23 static int us_ticker_interrupt_inited = 0;
elessair 0:f269e3021894 24 unsigned int ticker_fullcount_us;
elessair 0:f269e3021894 25 unsigned long int ticker_expired_count_us = 0;
elessair 0:f269e3021894 26 int MRT_Clock_MHz;
elessair 0:f269e3021894 27
elessair 0:f269e3021894 28 #define US_TICKER_TIMER_IRQn MRT_IRQn
elessair 0:f269e3021894 29
elessair 0:f269e3021894 30 void us_ticker_init(void) {
elessair 0:f269e3021894 31
elessair 0:f269e3021894 32 if (us_ticker_inited)
elessair 0:f269e3021894 33 return;
elessair 0:f269e3021894 34
elessair 0:f269e3021894 35 us_ticker_inited = 1;
elessair 0:f269e3021894 36
elessair 0:f269e3021894 37 // Calculate MRT clock value (MRT has no prescaler)
elessair 0:f269e3021894 38 MRT_Clock_MHz = (SystemCoreClock / 1000000);
elessair 0:f269e3021894 39 // Calculate fullcounter value in us (MRT has 31 bits and clock is 30 MHz)
elessair 0:f269e3021894 40 ticker_fullcount_us = 0x80000000UL/MRT_Clock_MHz;
elessair 0:f269e3021894 41
elessair 0:f269e3021894 42 // Enable the MRT clock
elessair 0:f269e3021894 43 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 10);
elessair 0:f269e3021894 44
elessair 0:f269e3021894 45 // Clear peripheral reset the MRT
elessair 0:f269e3021894 46 LPC_SYSCON->PRESETCTRL |= (1 << 7);
elessair 0:f269e3021894 47
elessair 0:f269e3021894 48 // Force load interval value (Bit 0-30 is interval value, Bit 31 is Force Load bit)
elessair 0:f269e3021894 49 LPC_MRT->INTVAL0 = 0xFFFFFFFFUL;
elessair 0:f269e3021894 50 // Enable Ch0 interrupt, Mode 0 is Repeat Interrupt
elessair 0:f269e3021894 51 LPC_MRT->CTRL0 = (0x0 << 1) | (0x1 << 0);
elessair 0:f269e3021894 52
elessair 0:f269e3021894 53 // Force load interval value (Bit 0-30 is interval value, Bit 31 is Force Load bit)
elessair 0:f269e3021894 54 LPC_MRT->INTVAL1 = 0x80000000UL;
elessair 0:f269e3021894 55 // Disable ch1 interrupt, Mode 0 is Repeat Interrupt
elessair 0:f269e3021894 56 LPC_MRT->CTRL1 = (0x0 << 1) | (0x0 << 0);
elessair 0:f269e3021894 57 }
elessair 0:f269e3021894 58
elessair 0:f269e3021894 59 void us_ticker_interrupt_init(void) {
elessair 0:f269e3021894 60
elessair 0:f269e3021894 61 if (us_ticker_interrupt_inited)
elessair 0:f269e3021894 62 return;
elessair 0:f269e3021894 63
elessair 0:f269e3021894 64 us_ticker_interrupt_inited = 1;
elessair 0:f269e3021894 65
elessair 0:f269e3021894 66 // Set MRT interrupt vector
elessair 0:f269e3021894 67 NVIC_SetVector(US_TICKER_TIMER_IRQn, (uint32_t)us_ticker_irq_handler);
elessair 0:f269e3021894 68 NVIC_EnableIRQ(US_TICKER_TIMER_IRQn);
elessair 0:f269e3021894 69 }
elessair 0:f269e3021894 70
elessair 0:f269e3021894 71 //TIMER0 is used for us ticker and timers (Timer, wait(), wait_us() etc)
elessair 0:f269e3021894 72 uint32_t us_ticker_read() {
elessair 0:f269e3021894 73
elessair 0:f269e3021894 74 if (!us_ticker_inited)
elessair 0:f269e3021894 75 us_ticker_init();
elessair 0:f269e3021894 76
elessair 0:f269e3021894 77 // Generate ticker value
elessair 0:f269e3021894 78 // MRT source clock is SystemCoreClock (30MHz) and MRT is a 31-bit countdown timer
elessair 0:f269e3021894 79 // Calculate expected value using current count and number of expired times to mimic a 32bit timer @ 1 MHz
elessair 0:f269e3021894 80 //
elessair 0:f269e3021894 81 // ticker_expired_count_us
elessair 0:f269e3021894 82 // The variable ticker_expired_count_us keeps track of the number of 31bits overflows (counted by TIMER0) and
elessair 0:f269e3021894 83 // corrects that back to us counts.
elessair 0:f269e3021894 84 //
elessair 0:f269e3021894 85 // (0x7FFFFFFFUL - LPC_MRT->TIMER0)/MRT_Clock_MHz
elessair 0:f269e3021894 86 // The counter is a 31bit downcounter from 7FFFFFFF so correct to actual count-up value and correct
elessair 0:f269e3021894 87 // for 30 counts per us.
elessair 0:f269e3021894 88 //
elessair 0:f269e3021894 89 // Added up these 2 parts result in current us time returned as 32 bits.
elessair 0:f269e3021894 90 return (0x7FFFFFFFUL - LPC_MRT->TIMER0)/MRT_Clock_MHz + ticker_expired_count_us;
elessair 0:f269e3021894 91 }
elessair 0:f269e3021894 92
elessair 0:f269e3021894 93 //TIMER1 is used for Timestamped interrupts (Ticker(), Timeout())
elessair 0:f269e3021894 94 void us_ticker_set_interrupt(timestamp_t timestamp) {
elessair 0:f269e3021894 95
elessair 0:f269e3021894 96 if (!us_ticker_interrupt_inited)
elessair 0:f269e3021894 97 us_ticker_interrupt_init();
elessair 0:f269e3021894 98
elessair 0:f269e3021894 99 // MRT source clock is SystemCoreClock (30MHz) and MRT is a 31-bit countdown timer
elessair 0:f269e3021894 100 // Force load interval value (Bit 0-30 is interval value, Bit 31 is Force Load bit)
elessair 0:f269e3021894 101 // Note: The MRT has less counter headroom available than the typical mbed 32bit timer @ 1 MHz.
elessair 0:f269e3021894 102 // The calculated counter interval until the next timestamp will be truncated and an
elessair 0:f269e3021894 103 // 'early' interrupt will be generated in case the max required count interval exceeds
elessair 0:f269e3021894 104 // the available 31 bits space. However, the mbed us_ticker interrupt handler will
elessair 0:f269e3021894 105 // check current time against the next scheduled timestamp and simply re-issue the
elessair 0:f269e3021894 106 // same interrupt again when needed. The calculated counter interval will now be smaller.
elessair 0:f269e3021894 107 LPC_MRT->INTVAL1 = (((timestamp - us_ticker_read()) * MRT_Clock_MHz) | 0x80000000UL);
elessair 0:f269e3021894 108
elessair 0:f269e3021894 109 // Enable interrupt
elessair 0:f269e3021894 110 LPC_MRT->CTRL1 |= 1;
elessair 0:f269e3021894 111 }
elessair 0:f269e3021894 112
elessair 0:f269e3021894 113 //Disable Timestamped interrupts triggered by TIMER1
elessair 0:f269e3021894 114 void us_ticker_disable_interrupt() {
elessair 0:f269e3021894 115 //Timer1 for Timestamped interrupts (31 bits downcounter @ SystemCoreClock)
elessair 0:f269e3021894 116 LPC_MRT->CTRL1 &= ~1;
elessair 0:f269e3021894 117 }
elessair 0:f269e3021894 118
elessair 0:f269e3021894 119 void us_ticker_clear_interrupt() {
elessair 0:f269e3021894 120
elessair 0:f269e3021894 121 //Timer1 for Timestamped interrupts (31 bits downcounter @ SystemCoreClock)
elessair 0:f269e3021894 122 if (LPC_MRT->STAT1 & 1)
elessair 0:f269e3021894 123 LPC_MRT->STAT1 = 1;
elessair 0:f269e3021894 124
elessair 0:f269e3021894 125 //Timer0 for us counter (31 bits downcounter @ SystemCoreClock)
elessair 0:f269e3021894 126 if (LPC_MRT->STAT0 & 1) {
elessair 0:f269e3021894 127 LPC_MRT->STAT0 = 1;
elessair 0:f269e3021894 128 // ticker_expired_count_us = (ticker_expired * 0x80000000UL) / MRT_Clock_MHz
elessair 0:f269e3021894 129 // The variable ticker_expired_count_us keeps track of the number of 31bits overflows (counted by TIMER0) and
elessair 0:f269e3021894 130 // the multiplication/division corrects that back to us counts.
elessair 0:f269e3021894 131 ticker_expired_count_us += ticker_fullcount_us;
elessair 0:f269e3021894 132 }
elessair 0:f269e3021894 133 }