Lee Kai Xuan / mbed-os

mbed-os

Fork of mbed-os by erkin yucel

targets/TARGET_NXP/TARGET_LPC15XX/spi_api.c@1:3deb71413561, 2017-07-20 (annotated)

Committer:
xuaner
Date:
Thu Jul 20 14:26:57 2017 +0000
Revision:
1:3deb71413561
Parent:
0:f269e3021894 
mbed_os

Who changed what in which revision?

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elessair 0:f269e3021894 1 /* mbed Microcontroller Library
elessair 0:f269e3021894 2 * Copyright (c) 2006-2013 ARM Limited
elessair 0:f269e3021894 3 *
elessair 0:f269e3021894 4 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 5 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 6 * You may obtain a copy of the License at
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 9 *
elessair 0:f269e3021894 10 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 11 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 13 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 14 * limitations under the License.
elessair 0:f269e3021894 15 */
elessair 0:f269e3021894 16 #include "mbed_assert.h"
elessair 0:f269e3021894 17 #include <math.h>
elessair 0:f269e3021894 18
elessair 0:f269e3021894 19 #include "spi_api.h"
elessair 0:f269e3021894 20 #include "cmsis.h"
elessair 0:f269e3021894 21 #include "pinmap.h"
elessair 0:f269e3021894 22 #include "mbed_error.h"
elessair 0:f269e3021894 23
elessair 0:f269e3021894 24 static const SWM_Map SWM_SPI_SSEL[] = {
elessair 0:f269e3021894 25 {4, 0},
elessair 0:f269e3021894 26 {5, 24},
elessair 0:f269e3021894 27 };
elessair 0:f269e3021894 28
elessair 0:f269e3021894 29 static const SWM_Map SWM_SPI_SCLK[] = {
elessair 0:f269e3021894 30 {3, 8},
elessair 0:f269e3021894 31 {5, 0},
elessair 0:f269e3021894 32 };
elessair 0:f269e3021894 33
elessair 0:f269e3021894 34 static const SWM_Map SWM_SPI_MOSI[] = {
elessair 0:f269e3021894 35 {3, 16},
elessair 0:f269e3021894 36 {5, 8},
elessair 0:f269e3021894 37 };
elessair 0:f269e3021894 38
elessair 0:f269e3021894 39 static const SWM_Map SWM_SPI_MISO[] = {
elessair 0:f269e3021894 40 {3, 24},
elessair 0:f269e3021894 41 {5, 16},
elessair 0:f269e3021894 42 };
elessair 0:f269e3021894 43
elessair 0:f269e3021894 44 // bit flags for used SPIs
elessair 0:f269e3021894 45 static unsigned char spi_used = 0;
elessair 0:f269e3021894 46 static int get_available_spi(PinName mosi, PinName miso, PinName sclk, PinName ssel)
elessair 0:f269e3021894 47 {
elessair 0:f269e3021894 48 if (spi_used == 0) {
elessair 0:f269e3021894 49 return 0; // The first user
elessair 0:f269e3021894 50 }
elessair 0:f269e3021894 51
elessair 0:f269e3021894 52 const SWM_Map *swm;
elessair 0:f269e3021894 53 uint32_t regVal;
elessair 0:f269e3021894 54
elessair 0:f269e3021894 55 // Investigate if same pins as the used SPI0/1 - to be able to reuse it
elessair 0:f269e3021894 56 for (int spi_n = 0; spi_n < 2; spi_n++) {
elessair 0:f269e3021894 57 if (spi_used & (1<<spi_n)) {
elessair 0:f269e3021894 58 if (sclk != NC) {
elessair 0:f269e3021894 59 swm = &SWM_SPI_SCLK[spi_n];
elessair 0:f269e3021894 60 regVal = LPC_SWM->PINASSIGN[swm->n] & (0xFF << swm->offset);
elessair 0:f269e3021894 61 if (regVal != (sclk << swm->offset)) {
elessair 0:f269e3021894 62 // Existing pin is not the same as the one we want
elessair 0:f269e3021894 63 continue;
elessair 0:f269e3021894 64 }
elessair 0:f269e3021894 65 }
elessair 0:f269e3021894 66
elessair 0:f269e3021894 67 if (mosi != NC) {
elessair 0:f269e3021894 68 swm = &SWM_SPI_MOSI[spi_n];
elessair 0:f269e3021894 69 regVal = LPC_SWM->PINASSIGN[swm->n] & (0xFF << swm->offset);
elessair 0:f269e3021894 70 if (regVal != (mosi << swm->offset)) {
elessair 0:f269e3021894 71 // Existing pin is not the same as the one we want
elessair 0:f269e3021894 72 continue;
elessair 0:f269e3021894 73 }
elessair 0:f269e3021894 74 }
elessair 0:f269e3021894 75
elessair 0:f269e3021894 76 if (miso != NC) {
elessair 0:f269e3021894 77 swm = &SWM_SPI_MISO[spi_n];
elessair 0:f269e3021894 78 regVal = LPC_SWM->PINASSIGN[swm->n] & (0xFF << swm->offset);
elessair 0:f269e3021894 79 if (regVal != (miso << swm->offset)) {
elessair 0:f269e3021894 80 // Existing pin is not the same as the one we want
elessair 0:f269e3021894 81 continue;
elessair 0:f269e3021894 82 }
elessair 0:f269e3021894 83 }
elessair 0:f269e3021894 84
elessair 0:f269e3021894 85 if (ssel != NC) {
elessair 0:f269e3021894 86 swm = &SWM_SPI_SSEL[spi_n];
elessair 0:f269e3021894 87 regVal = LPC_SWM->PINASSIGN[swm->n] & (0xFF << swm->offset);
elessair 0:f269e3021894 88 if (regVal != (ssel << swm->offset)) {
elessair 0:f269e3021894 89 // Existing pin is not the same as the one we want
elessair 0:f269e3021894 90 continue;
elessair 0:f269e3021894 91 }
elessair 0:f269e3021894 92 }
elessair 0:f269e3021894 93
elessair 0:f269e3021894 94 // The pins for the currently used SPIx are the same as the
elessair 0:f269e3021894 95 // ones we want so we will reuse it
elessair 0:f269e3021894 96 return spi_n;
elessair 0:f269e3021894 97 }
elessair 0:f269e3021894 98 }
elessair 0:f269e3021894 99
elessair 0:f269e3021894 100 // None of the existing SPIx pin setups match the pins we want
elessair 0:f269e3021894 101 // so the last hope is to select one unused SPIx
elessair 0:f269e3021894 102 if ((spi_used & 1) == 0) {
elessair 0:f269e3021894 103 return 0;
elessair 0:f269e3021894 104 } else if ((spi_used & 2) == 0) {
elessair 0:f269e3021894 105 return 1;
elessair 0:f269e3021894 106 }
elessair 0:f269e3021894 107
elessair 0:f269e3021894 108 // No matching setup and no free SPIx
elessair 0:f269e3021894 109 return -1;
elessair 0:f269e3021894 110 }
elessair 0:f269e3021894 111
elessair 0:f269e3021894 112 static inline void spi_disable(spi_t *obj);
elessair 0:f269e3021894 113 static inline void spi_enable(spi_t *obj);
elessair 0:f269e3021894 114
elessair 0:f269e3021894 115 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
elessair 0:f269e3021894 116 {
elessair 0:f269e3021894 117 int spi_n = get_available_spi(mosi, miso, sclk, ssel);
elessair 0:f269e3021894 118 if (spi_n == -1) {
elessair 0:f269e3021894 119 error("No available SPI");
elessair 0:f269e3021894 120 }
elessair 0:f269e3021894 121
elessair 0:f269e3021894 122 obj->spi_n = spi_n;
elessair 0:f269e3021894 123 spi_used |= (1 << spi_n);
elessair 0:f269e3021894 124
elessair 0:f269e3021894 125 obj->spi = (spi_n) ? (LPC_SPI0_Type *)(LPC_SPI1_BASE) : (LPC_SPI0_Type *)(LPC_SPI0_BASE);
elessair 0:f269e3021894 126
elessair 0:f269e3021894 127 const SWM_Map *swm;
elessair 0:f269e3021894 128 uint32_t regVal;
elessair 0:f269e3021894 129
elessair 0:f269e3021894 130 if (sclk != NC) {
elessair 0:f269e3021894 131 swm = &SWM_SPI_SCLK[obj->spi_n];
elessair 0:f269e3021894 132 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
elessair 0:f269e3021894 133 LPC_SWM->PINASSIGN[swm->n] = regVal | (sclk << swm->offset);
elessair 0:f269e3021894 134 }
elessair 0:f269e3021894 135
elessair 0:f269e3021894 136 if (mosi != NC) {
elessair 0:f269e3021894 137 swm = &SWM_SPI_MOSI[obj->spi_n];
elessair 0:f269e3021894 138 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
elessair 0:f269e3021894 139 LPC_SWM->PINASSIGN[swm->n] = regVal | (mosi << swm->offset);
elessair 0:f269e3021894 140 }
elessair 0:f269e3021894 141
elessair 0:f269e3021894 142 if (miso != NC) {
elessair 0:f269e3021894 143 swm = &SWM_SPI_MISO[obj->spi_n];
elessair 0:f269e3021894 144 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
elessair 0:f269e3021894 145 LPC_SWM->PINASSIGN[swm->n] = regVal | (miso << swm->offset);
elessair 0:f269e3021894 146 }
elessair 0:f269e3021894 147
elessair 0:f269e3021894 148 if (ssel != NC) {
elessair 0:f269e3021894 149 swm = &SWM_SPI_SSEL[obj->spi_n];
elessair 0:f269e3021894 150 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
elessair 0:f269e3021894 151 LPC_SWM->PINASSIGN[swm->n] = regVal | (ssel << swm->offset);
elessair 0:f269e3021894 152 }
elessair 0:f269e3021894 153
elessair 0:f269e3021894 154 // clear interrupts
elessair 0:f269e3021894 155 obj->spi->INTENCLR = 0x3f;
elessair 0:f269e3021894 156
elessair 0:f269e3021894 157 // enable power and clocking
elessair 0:f269e3021894 158 LPC_SYSCON->SYSAHBCLKCTRL1 |= (0x1 << (obj->spi_n + 9));
elessair 0:f269e3021894 159 LPC_SYSCON->PRESETCTRL1 |= (0x1 << (obj->spi_n + 9));
elessair 0:f269e3021894 160 LPC_SYSCON->PRESETCTRL1 &= ~(0x1 << (obj->spi_n + 9));
elessair 0:f269e3021894 161 }
elessair 0:f269e3021894 162
elessair 0:f269e3021894 163 void spi_free(spi_t *obj)
elessair 0:f269e3021894 164 {
elessair 0:f269e3021894 165 }
elessair 0:f269e3021894 166
elessair 0:f269e3021894 167 void spi_format(spi_t *obj, int bits, int mode, int slave)
elessair 0:f269e3021894 168 {
elessair 0:f269e3021894 169 spi_disable(obj);
elessair 0:f269e3021894 170 MBED_ASSERT((bits >= 1 && bits <= 16) && (mode >= 0 && mode <= 3));
elessair 0:f269e3021894 171
elessair 0:f269e3021894 172 int polarity = (mode & 0x2) ? 1 : 0;
elessair 0:f269e3021894 173 int phase = (mode & 0x1) ? 1 : 0;
elessair 0:f269e3021894 174
elessair 0:f269e3021894 175 // set it up
elessair 0:f269e3021894 176 int LEN = bits - 1; // LEN - Data Length
elessair 0:f269e3021894 177 int CPOL = (polarity) ? 1 : 0; // CPOL - Clock Polarity select
elessair 0:f269e3021894 178 int CPHA = (phase) ? 1 : 0; // CPHA - Clock Phase select
elessair 0:f269e3021894 179
elessair 0:f269e3021894 180 uint32_t tmp = obj->spi->CFG;
elessair 0:f269e3021894 181 tmp &= ~((1 << 5) | (1 << 4) | (1 << 2));
elessair 0:f269e3021894 182 tmp |= (CPOL << 5) | (CPHA << 4) | ((slave ? 0 : 1) << 2);
elessair 0:f269e3021894 183 obj->spi->CFG = tmp;
elessair 0:f269e3021894 184
elessair 0:f269e3021894 185 // select frame length
elessair 0:f269e3021894 186 tmp = obj->spi->TXCTL;
elessair 0:f269e3021894 187 tmp &= ~(0xf << 24);
elessair 0:f269e3021894 188 tmp |= (LEN << 24);
elessair 0:f269e3021894 189 obj->spi->TXCTL = tmp;
elessair 0:f269e3021894 190
elessair 0:f269e3021894 191 spi_enable(obj);
elessair 0:f269e3021894 192 }
elessair 0:f269e3021894 193
elessair 0:f269e3021894 194 void spi_frequency(spi_t *obj, int hz)
elessair 0:f269e3021894 195 {
elessair 0:f269e3021894 196 spi_disable(obj);
elessair 0:f269e3021894 197
elessair 0:f269e3021894 198 // rise DIV value if it cannot be divided
elessair 0:f269e3021894 199 obj->spi->DIV = (SystemCoreClock + (hz - 1))/hz - 1;
elessair 0:f269e3021894 200 obj->spi->DLY = 0;
elessair 0:f269e3021894 201
elessair 0:f269e3021894 202 spi_enable(obj);
elessair 0:f269e3021894 203 }
elessair 0:f269e3021894 204
elessair 0:f269e3021894 205 static inline void spi_disable(spi_t *obj)
elessair 0:f269e3021894 206 {
elessair 0:f269e3021894 207 obj->spi->CFG &= ~(1 << 0);
elessair 0:f269e3021894 208 }
elessair 0:f269e3021894 209
elessair 0:f269e3021894 210 static inline void spi_enable(spi_t *obj)
elessair 0:f269e3021894 211 {
elessair 0:f269e3021894 212 obj->spi->CFG |= (1 << 0);
elessair 0:f269e3021894 213 }
elessair 0:f269e3021894 214
elessair 0:f269e3021894 215 static inline int spi_readable(spi_t *obj)
elessair 0:f269e3021894 216 {
elessair 0:f269e3021894 217 return obj->spi->STAT & (1 << 0);
elessair 0:f269e3021894 218 }
elessair 0:f269e3021894 219
elessair 0:f269e3021894 220 static inline int spi_writeable(spi_t *obj)
elessair 0:f269e3021894 221 {
elessair 0:f269e3021894 222 return obj->spi->STAT & (1 << 1);
elessair 0:f269e3021894 223 }
elessair 0:f269e3021894 224
elessair 0:f269e3021894 225 static inline void spi_write(spi_t *obj, int value)
elessair 0:f269e3021894 226 {
elessair 0:f269e3021894 227 while (!spi_writeable(obj));
elessair 0:f269e3021894 228 // end of transfer
elessair 0:f269e3021894 229 obj->spi->TXCTL |= (1 << 20);
elessair 0:f269e3021894 230 obj->spi->TXDAT = (value & 0xffff);
elessair 0:f269e3021894 231 }
elessair 0:f269e3021894 232
elessair 0:f269e3021894 233 static inline int spi_read(spi_t *obj)
elessair 0:f269e3021894 234 {
elessair 0:f269e3021894 235 while (!spi_readable(obj));
elessair 0:f269e3021894 236 return obj->spi->RXDAT & 0xffff; // Only the lower 16 bits contain data
elessair 0:f269e3021894 237 }
elessair 0:f269e3021894 238
elessair 0:f269e3021894 239 int spi_busy(spi_t *obj)
elessair 0:f269e3021894 240 {
elessair 0:f269e3021894 241 // checking RXOV(Receiver Overrun interrupt flag)
elessair 0:f269e3021894 242 return obj->spi->STAT & (1 << 2);
elessair 0:f269e3021894 243 }
elessair 0:f269e3021894 244
elessair 0:f269e3021894 245 int spi_master_write(spi_t *obj, int value)
elessair 0:f269e3021894 246 {
elessair 0:f269e3021894 247 spi_write(obj, value);
elessair 0:f269e3021894 248 return spi_read(obj);
elessair 0:f269e3021894 249 }
elessair 0:f269e3021894 250
elessair 0:f269e3021894 251 int spi_slave_receive(spi_t *obj)
elessair 0:f269e3021894 252 {
elessair 0:f269e3021894 253 return (spi_readable(obj) && !spi_busy(obj)) ? (1) : (0);
elessair 0:f269e3021894 254 }
elessair 0:f269e3021894 255
elessair 0:f269e3021894 256 int spi_slave_read(spi_t *obj)
elessair 0:f269e3021894 257 {
elessair 0:f269e3021894 258 return obj->spi->RXDAT & 0xffff; // Only the lower 16 bits contain data
elessair 0:f269e3021894 259 }
elessair 0:f269e3021894 260
elessair 0:f269e3021894 261 void spi_slave_write(spi_t *obj, int value)
elessair 0:f269e3021894 262 {
elessair 0:f269e3021894 263 while (spi_writeable(obj) == 0) ;
elessair 0:f269e3021894 264 obj->spi->TXDAT = value;
elessair 0:f269e3021894 265 }