Lee Kai Xuan / mbed-os

mbed-os

Fork of mbed-os by erkin yucel

platform/mbed_critical.c@1:3deb71413561, 2017-07-20 (annotated)

Committer:
xuaner
Date:
Thu Jul 20 14:26:57 2017 +0000
Revision:
1:3deb71413561
Parent:
0:f269e3021894 
mbed_os

Who changed what in which revision?

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elessair 0:f269e3021894 1 /*
elessair 0:f269e3021894 2 * Copyright (c) 2015-2016, ARM Limited, All Rights Reserved
elessair 0:f269e3021894 3 * SPDX-License-Identifier: Apache-2.0
elessair 0:f269e3021894 4 *
elessair 0:f269e3021894 5 * Licensed under the Apache License, Version 2.0 (the "License"); you may
elessair 0:f269e3021894 6 * not use this file except in compliance with the License.
elessair 0:f269e3021894 7 * You may obtain a copy of the License at
elessair 0:f269e3021894 8 *
elessair 0:f269e3021894 9 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 10 *
elessair 0:f269e3021894 11 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 12 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
elessair 0:f269e3021894 13 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 14 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 15 * limitations under the License.
elessair 0:f269e3021894 16 */
elessair 0:f269e3021894 17
elessair 0:f269e3021894 18 #include "platform/critical.h"
elessair 0:f269e3021894 19
elessair 0:f269e3021894 20 #include "cmsis.h"
elessair 0:f269e3021894 21 #include "platform/mbed_assert.h"
elessair 0:f269e3021894 22 #include "platform/toolchain.h"
elessair 0:f269e3021894 23
elessair 0:f269e3021894 24 #define EXCLUSIVE_ACCESS (!defined (__CORTEX_M0) && !defined (__CORTEX_M0PLUS))
elessair 0:f269e3021894 25
elessair 0:f269e3021894 26 static volatile uint32_t interrupt_enable_counter = 0;
elessair 0:f269e3021894 27 static volatile bool critical_interrupts_disabled = false;
elessair 0:f269e3021894 28
elessair 0:f269e3021894 29 bool core_util_are_interrupts_enabled(void)
elessair 0:f269e3021894 30 {
elessair 0:f269e3021894 31 #if defined(__CORTEX_A9)
elessair 0:f269e3021894 32 return ((__get_CPSR() & 0x80) == 0);
elessair 0:f269e3021894 33 #else
elessair 0:f269e3021894 34 return ((__get_PRIMASK() & 0x1) == 0);
elessair 0:f269e3021894 35 #endif
elessair 0:f269e3021894 36 }
elessair 0:f269e3021894 37
elessair 0:f269e3021894 38 MBED_WEAK void core_util_critical_section_enter(void)
elessair 0:f269e3021894 39 {
elessair 0:f269e3021894 40 bool interrupts_disabled = !core_util_are_interrupts_enabled();
elessair 0:f269e3021894 41 __disable_irq();
elessair 0:f269e3021894 42
elessair 0:f269e3021894 43 /* Save the interrupt disabled state as it was prior to any nested critical section lock use */
elessair 0:f269e3021894 44 if (!interrupt_enable_counter) {
elessair 0:f269e3021894 45 critical_interrupts_disabled = interrupts_disabled;
elessair 0:f269e3021894 46 }
elessair 0:f269e3021894 47
elessair 0:f269e3021894 48 /* If the interrupt_enable_counter overflows or we are in a nested critical section and interrupts
elessair 0:f269e3021894 49 are enabled, then something has gone badly wrong thus assert an error.
elessair 0:f269e3021894 50 */
elessair 0:f269e3021894 51 MBED_ASSERT(interrupt_enable_counter < UINT32_MAX);
elessair 0:f269e3021894 52 // FIXME
elessair 0:f269e3021894 53 #ifndef FEATURE_UVISOR
elessair 0:f269e3021894 54 if (interrupt_enable_counter > 0) {
elessair 0:f269e3021894 55 MBED_ASSERT(interrupts_disabled);
elessair 0:f269e3021894 56 }
elessair 0:f269e3021894 57 #else
elessair 0:f269e3021894 58 #warning "core_util_critical_section_enter needs fixing to work from unprivileged code"
elessair 0:f269e3021894 59 #endif /* FEATURE_UVISOR */
elessair 0:f269e3021894 60 interrupt_enable_counter++;
elessair 0:f269e3021894 61 }
elessair 0:f269e3021894 62
elessair 0:f269e3021894 63 MBED_WEAK void core_util_critical_section_exit(void)
elessair 0:f269e3021894 64 {
elessair 0:f269e3021894 65 /* If critical_section_enter has not previously been called, do nothing */
elessair 0:f269e3021894 66 if (interrupt_enable_counter) {
elessair 0:f269e3021894 67
elessair 0:f269e3021894 68 // FIXME
elessair 0:f269e3021894 69 #ifndef FEATURE_UVISOR
elessair 0:f269e3021894 70 bool interrupts_disabled = !core_util_are_interrupts_enabled(); /* get the current interrupt disabled state */
elessair 0:f269e3021894 71
elessair 0:f269e3021894 72 MBED_ASSERT(interrupts_disabled); /* Interrupts must be disabled on invoking an exit from a critical section */
elessair 0:f269e3021894 73 #else
elessair 0:f269e3021894 74 #warning "core_util_critical_section_exit needs fixing to work from unprivileged code"
elessair 0:f269e3021894 75 #endif /* FEATURE_UVISOR */
elessair 0:f269e3021894 76
elessair 0:f269e3021894 77 interrupt_enable_counter--;
elessair 0:f269e3021894 78
elessair 0:f269e3021894 79 /* Only re-enable interrupts if we are exiting the last of the nested critical sections and
elessair 0:f269e3021894 80 interrupts were enabled on entry to the first critical section.
elessair 0:f269e3021894 81 */
elessair 0:f269e3021894 82 if (!interrupt_enable_counter && !critical_interrupts_disabled) {
elessair 0:f269e3021894 83 __enable_irq();
elessair 0:f269e3021894 84 }
elessair 0:f269e3021894 85 }
elessair 0:f269e3021894 86 }
elessair 0:f269e3021894 87
elessair 0:f269e3021894 88 #if EXCLUSIVE_ACCESS
elessair 0:f269e3021894 89
elessair 0:f269e3021894 90 /* Supress __ldrex and __strex deprecated warnings - "#3731-D: intrinsic is deprecated" */
elessair 0:f269e3021894 91 #if defined (__CC_ARM)
elessair 0:f269e3021894 92 #pragma diag_suppress 3731
elessair 0:f269e3021894 93 #endif
elessair 0:f269e3021894 94
elessair 0:f269e3021894 95 bool core_util_atomic_cas_u8(uint8_t *ptr, uint8_t *expectedCurrentValue, uint8_t desiredValue)
elessair 0:f269e3021894 96 {
elessair 0:f269e3021894 97 uint8_t currentValue = __LDREXB((volatile uint8_t*)ptr);
elessair 0:f269e3021894 98 if (currentValue != *expectedCurrentValue) {
elessair 0:f269e3021894 99 *expectedCurrentValue = currentValue;
elessair 0:f269e3021894 100 __CLREX();
elessair 0:f269e3021894 101 return false;
elessair 0:f269e3021894 102 }
elessair 0:f269e3021894 103
elessair 0:f269e3021894 104 return !__STREXB(desiredValue, (volatile uint8_t*)ptr);
elessair 0:f269e3021894 105 }
elessair 0:f269e3021894 106
elessair 0:f269e3021894 107 bool core_util_atomic_cas_u16(uint16_t *ptr, uint16_t *expectedCurrentValue, uint16_t desiredValue)
elessair 0:f269e3021894 108 {
elessair 0:f269e3021894 109 uint16_t currentValue = __LDREXH((volatile uint16_t*)ptr);
elessair 0:f269e3021894 110 if (currentValue != *expectedCurrentValue) {
elessair 0:f269e3021894 111 *expectedCurrentValue = currentValue;
elessair 0:f269e3021894 112 __CLREX();
elessair 0:f269e3021894 113 return false;
elessair 0:f269e3021894 114 }
elessair 0:f269e3021894 115
elessair 0:f269e3021894 116 return !__STREXH(desiredValue, (volatile uint16_t*)ptr);
elessair 0:f269e3021894 117 }
elessair 0:f269e3021894 118
elessair 0:f269e3021894 119
elessair 0:f269e3021894 120 bool core_util_atomic_cas_u32(uint32_t *ptr, uint32_t *expectedCurrentValue, uint32_t desiredValue)
elessair 0:f269e3021894 121 {
elessair 0:f269e3021894 122 uint32_t currentValue = __LDREXW((volatile uint32_t*)ptr);
elessair 0:f269e3021894 123 if (currentValue != *expectedCurrentValue) {
elessair 0:f269e3021894 124 *expectedCurrentValue = currentValue;
elessair 0:f269e3021894 125 __CLREX();
elessair 0:f269e3021894 126 return false;
elessair 0:f269e3021894 127 }
elessair 0:f269e3021894 128
elessair 0:f269e3021894 129 return !__STREXW(desiredValue, (volatile uint32_t*)ptr);
elessair 0:f269e3021894 130 }
elessair 0:f269e3021894 131
elessair 0:f269e3021894 132 uint8_t core_util_atomic_incr_u8(uint8_t *valuePtr, uint8_t delta)
elessair 0:f269e3021894 133 {
elessair 0:f269e3021894 134 uint8_t newValue;
elessair 0:f269e3021894 135 do {
elessair 0:f269e3021894 136 newValue = __LDREXB((volatile uint8_t*)valuePtr) + delta;
elessair 0:f269e3021894 137 } while (__STREXB(newValue, (volatile uint8_t*)valuePtr));
elessair 0:f269e3021894 138 return newValue;
elessair 0:f269e3021894 139 }
elessair 0:f269e3021894 140
elessair 0:f269e3021894 141 uint16_t core_util_atomic_incr_u16(uint16_t *valuePtr, uint16_t delta)
elessair 0:f269e3021894 142 {
elessair 0:f269e3021894 143 uint16_t newValue;
elessair 0:f269e3021894 144 do {
elessair 0:f269e3021894 145 newValue = __LDREXH((volatile uint16_t*)valuePtr) + delta;
elessair 0:f269e3021894 146 } while (__STREXH(newValue, (volatile uint16_t*)valuePtr));
elessair 0:f269e3021894 147 return newValue;
elessair 0:f269e3021894 148 }
elessair 0:f269e3021894 149
elessair 0:f269e3021894 150 uint32_t core_util_atomic_incr_u32(uint32_t *valuePtr, uint32_t delta)
elessair 0:f269e3021894 151 {
elessair 0:f269e3021894 152 uint32_t newValue;
elessair 0:f269e3021894 153 do {
elessair 0:f269e3021894 154 newValue = __LDREXW((volatile uint32_t*)valuePtr) + delta;
elessair 0:f269e3021894 155 } while (__STREXW(newValue, (volatile uint32_t*)valuePtr));
elessair 0:f269e3021894 156 return newValue;
elessair 0:f269e3021894 157 }
elessair 0:f269e3021894 158
elessair 0:f269e3021894 159
elessair 0:f269e3021894 160 uint8_t core_util_atomic_decr_u8(uint8_t *valuePtr, uint8_t delta)
elessair 0:f269e3021894 161 {
elessair 0:f269e3021894 162 uint8_t newValue;
elessair 0:f269e3021894 163 do {
elessair 0:f269e3021894 164 newValue = __LDREXB((volatile uint8_t*)valuePtr) - delta;
elessair 0:f269e3021894 165 } while (__STREXB(newValue, (volatile uint8_t*)valuePtr));
elessair 0:f269e3021894 166 return newValue;
elessair 0:f269e3021894 167 }
elessair 0:f269e3021894 168
elessair 0:f269e3021894 169 uint16_t core_util_atomic_decr_u16(uint16_t *valuePtr, uint16_t delta)
elessair 0:f269e3021894 170 {
elessair 0:f269e3021894 171 uint16_t newValue;
elessair 0:f269e3021894 172 do {
elessair 0:f269e3021894 173 newValue = __LDREXH((volatile uint16_t*)valuePtr) - delta;
elessair 0:f269e3021894 174 } while (__STREXH(newValue, (volatile uint16_t*)valuePtr));
elessair 0:f269e3021894 175 return newValue;
elessair 0:f269e3021894 176 }
elessair 0:f269e3021894 177
elessair 0:f269e3021894 178 uint32_t core_util_atomic_decr_u32(uint32_t *valuePtr, uint32_t delta)
elessair 0:f269e3021894 179 {
elessair 0:f269e3021894 180 uint32_t newValue;
elessair 0:f269e3021894 181 do {
elessair 0:f269e3021894 182 newValue = __LDREXW((volatile uint32_t*)valuePtr) - delta;
elessair 0:f269e3021894 183 } while (__STREXW(newValue, (volatile uint32_t*)valuePtr));
elessair 0:f269e3021894 184 return newValue;
elessair 0:f269e3021894 185 }
elessair 0:f269e3021894 186
elessair 0:f269e3021894 187 #else
elessair 0:f269e3021894 188
elessair 0:f269e3021894 189 bool core_util_atomic_cas_u8(uint8_t *ptr, uint8_t *expectedCurrentValue, uint8_t desiredValue)
elessair 0:f269e3021894 190 {
elessair 0:f269e3021894 191 bool success;
elessair 0:f269e3021894 192 uint8_t currentValue;
elessair 0:f269e3021894 193 core_util_critical_section_enter();
elessair 0:f269e3021894 194 currentValue = *ptr;
elessair 0:f269e3021894 195 if (currentValue == *expectedCurrentValue) {
elessair 0:f269e3021894 196 *ptr = desiredValue;
elessair 0:f269e3021894 197 success = true;
elessair 0:f269e3021894 198 } else {
elessair 0:f269e3021894 199 *expectedCurrentValue = currentValue;
elessair 0:f269e3021894 200 success = false;
elessair 0:f269e3021894 201 }
elessair 0:f269e3021894 202 core_util_critical_section_exit();
elessair 0:f269e3021894 203 return success;
elessair 0:f269e3021894 204 }
elessair 0:f269e3021894 205
elessair 0:f269e3021894 206 bool core_util_atomic_cas_u16(uint16_t *ptr, uint16_t *expectedCurrentValue, uint16_t desiredValue)
elessair 0:f269e3021894 207 {
elessair 0:f269e3021894 208 bool success;
elessair 0:f269e3021894 209 uint16_t currentValue;
elessair 0:f269e3021894 210 core_util_critical_section_enter();
elessair 0:f269e3021894 211 currentValue = *ptr;
elessair 0:f269e3021894 212 if (currentValue == *expectedCurrentValue) {
elessair 0:f269e3021894 213 *ptr = desiredValue;
elessair 0:f269e3021894 214 success = true;
elessair 0:f269e3021894 215 } else {
elessair 0:f269e3021894 216 *expectedCurrentValue = currentValue;
elessair 0:f269e3021894 217 success = false;
elessair 0:f269e3021894 218 }
elessair 0:f269e3021894 219 core_util_critical_section_exit();
elessair 0:f269e3021894 220 return success;
elessair 0:f269e3021894 221 }
elessair 0:f269e3021894 222
elessair 0:f269e3021894 223
elessair 0:f269e3021894 224 bool core_util_atomic_cas_u32(uint32_t *ptr, uint32_t *expectedCurrentValue, uint32_t desiredValue)
elessair 0:f269e3021894 225 {
elessair 0:f269e3021894 226 bool success;
elessair 0:f269e3021894 227 uint32_t currentValue;
elessair 0:f269e3021894 228 core_util_critical_section_enter();
elessair 0:f269e3021894 229 currentValue = *ptr;
elessair 0:f269e3021894 230 if (currentValue == *expectedCurrentValue) {
elessair 0:f269e3021894 231 *ptr = desiredValue;
elessair 0:f269e3021894 232 success = true;
elessair 0:f269e3021894 233 } else {
elessair 0:f269e3021894 234 *expectedCurrentValue = currentValue;
elessair 0:f269e3021894 235 success = false;
elessair 0:f269e3021894 236 }
elessair 0:f269e3021894 237 core_util_critical_section_exit();
elessair 0:f269e3021894 238 return success;
elessair 0:f269e3021894 239 }
elessair 0:f269e3021894 240
elessair 0:f269e3021894 241
elessair 0:f269e3021894 242 uint8_t core_util_atomic_incr_u8(uint8_t *valuePtr, uint8_t delta)
elessair 0:f269e3021894 243 {
elessair 0:f269e3021894 244 uint8_t newValue;
elessair 0:f269e3021894 245 core_util_critical_section_enter();
elessair 0:f269e3021894 246 newValue = *valuePtr + delta;
elessair 0:f269e3021894 247 *valuePtr = newValue;
elessair 0:f269e3021894 248 core_util_critical_section_exit();
elessair 0:f269e3021894 249 return newValue;
elessair 0:f269e3021894 250 }
elessair 0:f269e3021894 251
elessair 0:f269e3021894 252 uint16_t core_util_atomic_incr_u16(uint16_t *valuePtr, uint16_t delta)
elessair 0:f269e3021894 253 {
elessair 0:f269e3021894 254 uint16_t newValue;
elessair 0:f269e3021894 255 core_util_critical_section_enter();
elessair 0:f269e3021894 256 newValue = *valuePtr + delta;
elessair 0:f269e3021894 257 *valuePtr = newValue;
elessair 0:f269e3021894 258 core_util_critical_section_exit();
elessair 0:f269e3021894 259 return newValue;
elessair 0:f269e3021894 260 }
elessair 0:f269e3021894 261
elessair 0:f269e3021894 262 uint32_t core_util_atomic_incr_u32(uint32_t *valuePtr, uint32_t delta)
elessair 0:f269e3021894 263 {
elessair 0:f269e3021894 264 uint32_t newValue;
elessair 0:f269e3021894 265 core_util_critical_section_enter();
elessair 0:f269e3021894 266 newValue = *valuePtr + delta;
elessair 0:f269e3021894 267 *valuePtr = newValue;
elessair 0:f269e3021894 268 core_util_critical_section_exit();
elessair 0:f269e3021894 269 return newValue;
elessair 0:f269e3021894 270 }
elessair 0:f269e3021894 271
elessair 0:f269e3021894 272
elessair 0:f269e3021894 273 uint8_t core_util_atomic_decr_u8(uint8_t *valuePtr, uint8_t delta)
elessair 0:f269e3021894 274 {
elessair 0:f269e3021894 275 uint8_t newValue;
elessair 0:f269e3021894 276 core_util_critical_section_enter();
elessair 0:f269e3021894 277 newValue = *valuePtr - delta;
elessair 0:f269e3021894 278 *valuePtr = newValue;
elessair 0:f269e3021894 279 core_util_critical_section_exit();
elessair 0:f269e3021894 280 return newValue;
elessair 0:f269e3021894 281 }
elessair 0:f269e3021894 282
elessair 0:f269e3021894 283 uint16_t core_util_atomic_decr_u16(uint16_t *valuePtr, uint16_t delta)
elessair 0:f269e3021894 284 {
elessair 0:f269e3021894 285 uint16_t newValue;
elessair 0:f269e3021894 286 core_util_critical_section_enter();
elessair 0:f269e3021894 287 newValue = *valuePtr - delta;
elessair 0:f269e3021894 288 *valuePtr = newValue;
elessair 0:f269e3021894 289 core_util_critical_section_exit();
elessair 0:f269e3021894 290 return newValue;
elessair 0:f269e3021894 291 }
elessair 0:f269e3021894 292
elessair 0:f269e3021894 293 uint32_t core_util_atomic_decr_u32(uint32_t *valuePtr, uint32_t delta)
elessair 0:f269e3021894 294 {
elessair 0:f269e3021894 295 uint32_t newValue;
elessair 0:f269e3021894 296 core_util_critical_section_enter();
elessair 0:f269e3021894 297 newValue = *valuePtr - delta;
elessair 0:f269e3021894 298 *valuePtr = newValue;
elessair 0:f269e3021894 299 core_util_critical_section_exit();
elessair 0:f269e3021894 300 return newValue;
elessair 0:f269e3021894 301 }
elessair 0:f269e3021894 302
elessair 0:f269e3021894 303 #endif
elessair 0:f269e3021894 304
elessair 0:f269e3021894 305
elessair 0:f269e3021894 306 bool core_util_atomic_cas_ptr(void **ptr, void **expectedCurrentValue, void *desiredValue) {
elessair 0:f269e3021894 307 return core_util_atomic_cas_u32(
elessair 0:f269e3021894 308 (uint32_t *)ptr,
elessair 0:f269e3021894 309 (uint32_t *)expectedCurrentValue,
elessair 0:f269e3021894 310 (uint32_t)desiredValue);
elessair 0:f269e3021894 311 }
elessair 0:f269e3021894 312
elessair 0:f269e3021894 313 void *core_util_atomic_incr_ptr(void **valuePtr, ptrdiff_t delta) {
elessair 0:f269e3021894 314 return (void *)core_util_atomic_incr_u32((uint32_t *)valuePtr, (uint32_t)delta);
elessair 0:f269e3021894 315 }
elessair 0:f269e3021894 316
elessair 0:f269e3021894 317 void *core_util_atomic_decr_ptr(void **valuePtr, ptrdiff_t delta) {
elessair 0:f269e3021894 318 return (void *)core_util_atomic_decr_u32((uint32_t *)valuePtr, (uint32_t)delta);
elessair 0:f269e3021894 319 }
elessair 0:f269e3021894 320