Lee Kai Xuan / mbed-os

mbed-os

Fork of mbed-os by erkin yucel

hal/spi_api.h@1:3deb71413561, 2017-07-20 (annotated)

Committer:
xuaner
Date:
Thu Jul 20 14:26:57 2017 +0000
Revision:
1:3deb71413561
Parent:
0:f269e3021894 
mbed_os

Who changed what in which revision?

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elessair 0:f269e3021894 1
elessair 0:f269e3021894 2 /** \addtogroup hal */
elessair 0:f269e3021894 3 /** @{*/
elessair 0:f269e3021894 4 /* mbed Microcontroller Library
elessair 0:f269e3021894 5 * Copyright (c) 2006-2013 ARM Limited
elessair 0:f269e3021894 6 *
elessair 0:f269e3021894 7 * Licensed under the Apache License, Version 2.0 (the "License");
elessair 0:f269e3021894 8 * you may not use this file except in compliance with the License.
elessair 0:f269e3021894 9 * You may obtain a copy of the License at
elessair 0:f269e3021894 10 *
elessair 0:f269e3021894 11 * http://www.apache.org/licenses/LICENSE-2.0
elessair 0:f269e3021894 12 *
elessair 0:f269e3021894 13 * Unless required by applicable law or agreed to in writing, software
elessair 0:f269e3021894 14 * distributed under the License is distributed on an "AS IS" BASIS,
elessair 0:f269e3021894 15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
elessair 0:f269e3021894 16 * See the License for the specific language governing permissions and
elessair 0:f269e3021894 17 * limitations under the License.
elessair 0:f269e3021894 18 */
elessair 0:f269e3021894 19 #ifndef MBED_SPI_API_H
elessair 0:f269e3021894 20 #define MBED_SPI_API_H
elessair 0:f269e3021894 21
elessair 0:f269e3021894 22 #include "device.h"
elessair 0:f269e3021894 23 #include "hal/dma_api.h"
elessair 0:f269e3021894 24 #include "hal/buffer.h"
elessair 0:f269e3021894 25
elessair 0:f269e3021894 26 #if DEVICE_SPI
elessair 0:f269e3021894 27
elessair 0:f269e3021894 28 #define SPI_EVENT_ERROR (1 << 1)
elessair 0:f269e3021894 29 #define SPI_EVENT_COMPLETE (1 << 2)
elessair 0:f269e3021894 30 #define SPI_EVENT_RX_OVERFLOW (1 << 3)
elessair 0:f269e3021894 31 #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
elessair 0:f269e3021894 32
elessair 0:f269e3021894 33 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // Internal flag to report that an event occurred
elessair 0:f269e3021894 34
elessair 0:f269e3021894 35 #define SPI_FILL_WORD (0xFFFF)
elessair 0:f269e3021894 36
elessair 0:f269e3021894 37 #if DEVICE_SPI_ASYNCH
elessair 0:f269e3021894 38 /** Asynch SPI HAL structure
elessair 0:f269e3021894 39 */
elessair 0:f269e3021894 40 typedef struct {
elessair 0:f269e3021894 41 struct spi_s spi; /**< Target specific SPI structure */
elessair 0:f269e3021894 42 struct buffer_s tx_buff; /**< Tx buffer */
elessair 0:f269e3021894 43 struct buffer_s rx_buff; /**< Rx buffer */
elessair 0:f269e3021894 44 } spi_t;
elessair 0:f269e3021894 45
elessair 0:f269e3021894 46 #else
elessair 0:f269e3021894 47 /** Non-asynch SPI HAL structure
elessair 0:f269e3021894 48 */
elessair 0:f269e3021894 49 typedef struct spi_s spi_t;
elessair 0:f269e3021894 50
elessair 0:f269e3021894 51 #endif
elessair 0:f269e3021894 52
elessair 0:f269e3021894 53 #ifdef __cplusplus
elessair 0:f269e3021894 54 extern "C" {
elessair 0:f269e3021894 55 #endif
elessair 0:f269e3021894 56
elessair 0:f269e3021894 57 /**
elessair 0:f269e3021894 58 * \defgroup hal_GeneralSPI SPI Configuration Functions
elessair 0:f269e3021894 59 * @{
elessair 0:f269e3021894 60 */
elessair 0:f269e3021894 61
elessair 0:f269e3021894 62 /** Initialize the SPI peripheral
elessair 0:f269e3021894 63 *
elessair 0:f269e3021894 64 * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
elessair 0:f269e3021894 65 * @param[out] obj The SPI object to initialize
elessair 0:f269e3021894 66 * @param[in] mosi The pin to use for MOSI
elessair 0:f269e3021894 67 * @param[in] miso The pin to use for MISO
elessair 0:f269e3021894 68 * @param[in] sclk The pin to use for SCLK
elessair 0:f269e3021894 69 * @param[in] ssel The pin to use for SSEL
elessair 0:f269e3021894 70 */
elessair 0:f269e3021894 71 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
elessair 0:f269e3021894 72
elessair 0:f269e3021894 73 /** Release a SPI object
elessair 0:f269e3021894 74 *
elessair 0:f269e3021894 75 * TODO: spi_free is currently unimplemented
elessair 0:f269e3021894 76 * This will require reference counting at the C++ level to be safe
elessair 0:f269e3021894 77 *
elessair 0:f269e3021894 78 * Return the pins owned by the SPI object to their reset state
elessair 0:f269e3021894 79 * Disable the SPI peripheral
elessair 0:f269e3021894 80 * Disable the SPI clock
elessair 0:f269e3021894 81 * @param[in] obj The SPI object to deinitialize
elessair 0:f269e3021894 82 */
elessair 0:f269e3021894 83 void spi_free(spi_t *obj);
elessair 0:f269e3021894 84
elessair 0:f269e3021894 85 /** Configure the SPI format
elessair 0:f269e3021894 86 *
elessair 0:f269e3021894 87 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode.
elessair 0:f269e3021894 88 * The default bit order is MSB.
elessair 0:f269e3021894 89 * @param[in,out] obj The SPI object to configure
elessair 0:f269e3021894 90 * @param[in] bits The number of bits per frame
elessair 0:f269e3021894 91 * @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
elessair 0:f269e3021894 92 * @param[in] slave Zero for master mode or non-zero for slave mode
elessair 0:f269e3021894 93 */
elessair 0:f269e3021894 94 void spi_format(spi_t *obj, int bits, int mode, int slave);
elessair 0:f269e3021894 95
elessair 0:f269e3021894 96 /** Set the SPI baud rate
elessair 0:f269e3021894 97 *
elessair 0:f269e3021894 98 * Actual frequency may differ from the desired frequency due to available dividers and bus clock
elessair 0:f269e3021894 99 * Configures the SPI peripheral's baud rate
elessair 0:f269e3021894 100 * @param[in,out] obj The SPI object to configure
elessair 0:f269e3021894 101 * @param[in] hz The baud rate in Hz
elessair 0:f269e3021894 102 */
elessair 0:f269e3021894 103 void spi_frequency(spi_t *obj, int hz);
elessair 0:f269e3021894 104
elessair 0:f269e3021894 105 /**@}*/
elessair 0:f269e3021894 106 /**
elessair 0:f269e3021894 107 * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
elessair 0:f269e3021894 108 * @{
elessair 0:f269e3021894 109 */
elessair 0:f269e3021894 110
elessair 0:f269e3021894 111 /** Write a byte out in master mode and receive a value
elessair 0:f269e3021894 112 *
elessair 0:f269e3021894 113 * @param[in] obj The SPI peripheral to use for sending
elessair 0:f269e3021894 114 * @param[in] value The value to send
elessair 0:f269e3021894 115 * @return Returns the value received during send
elessair 0:f269e3021894 116 */
elessair 0:f269e3021894 117 int spi_master_write(spi_t *obj, int value);
elessair 0:f269e3021894 118
elessair 0:f269e3021894 119 /** Check if a value is available to read
elessair 0:f269e3021894 120 *
elessair 0:f269e3021894 121 * @param[in] obj The SPI peripheral to check
elessair 0:f269e3021894 122 * @return non-zero if a value is available
elessair 0:f269e3021894 123 */
elessair 0:f269e3021894 124 int spi_slave_receive(spi_t *obj);
elessair 0:f269e3021894 125
elessair 0:f269e3021894 126 /** Get a received value out of the SPI receive buffer in slave mode
elessair 0:f269e3021894 127 *
elessair 0:f269e3021894 128 * Blocks until a value is available
elessair 0:f269e3021894 129 * @param[in] obj The SPI peripheral to read
elessair 0:f269e3021894 130 * @return The value received
elessair 0:f269e3021894 131 */
elessair 0:f269e3021894 132 int spi_slave_read(spi_t *obj);
elessair 0:f269e3021894 133
elessair 0:f269e3021894 134 /** Write a value to the SPI peripheral in slave mode
elessair 0:f269e3021894 135 *
elessair 0:f269e3021894 136 * Blocks until the SPI peripheral can be written to
elessair 0:f269e3021894 137 * @param[in] obj The SPI peripheral to write
elessair 0:f269e3021894 138 * @param[in] value The value to write
elessair 0:f269e3021894 139 */
elessair 0:f269e3021894 140 void spi_slave_write(spi_t *obj, int value);
elessair 0:f269e3021894 141
elessair 0:f269e3021894 142 /** Checks if the specified SPI peripheral is in use
elessair 0:f269e3021894 143 *
elessair 0:f269e3021894 144 * @param[in] obj The SPI peripheral to check
elessair 0:f269e3021894 145 * @return non-zero if the peripheral is currently transmitting
elessair 0:f269e3021894 146 */
elessair 0:f269e3021894 147 int spi_busy(spi_t *obj);
elessair 0:f269e3021894 148
elessair 0:f269e3021894 149 /** Get the module number
elessair 0:f269e3021894 150 *
elessair 0:f269e3021894 151 * @param[in] obj The SPI peripheral to check
elessair 0:f269e3021894 152 * @return The module number
elessair 0:f269e3021894 153 */
elessair 0:f269e3021894 154 uint8_t spi_get_module(spi_t *obj);
elessair 0:f269e3021894 155
elessair 0:f269e3021894 156 /**@}*/
elessair 0:f269e3021894 157
elessair 0:f269e3021894 158 #if DEVICE_SPI_ASYNCH
elessair 0:f269e3021894 159 /**
elessair 0:f269e3021894 160 * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
elessair 0:f269e3021894 161 * @{
elessair 0:f269e3021894 162 */
elessair 0:f269e3021894 163
elessair 0:f269e3021894 164 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
elessair 0:f269e3021894 165 *
elessair 0:f269e3021894 166 * @param[in] obj The SPI object that holds the transfer information
elessair 0:f269e3021894 167 * @param[in] tx The transmit buffer
elessair 0:f269e3021894 168 * @param[in] tx_length The number of bytes to transmit
elessair 0:f269e3021894 169 * @param[in] rx The receive buffer
elessair 0:f269e3021894 170 * @param[in] rx_length The number of bytes to receive
elessair 0:f269e3021894 171 * @param[in] bit_width The bit width of buffer words
elessair 0:f269e3021894 172 * @param[in] event The logical OR of events to be registered
elessair 0:f269e3021894 173 * @param[in] handler SPI interrupt handler
elessair 0:f269e3021894 174 * @param[in] hint A suggestion for how to use DMA with this transfer
elessair 0:f269e3021894 175 */
elessair 0:f269e3021894 176 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
elessair 0:f269e3021894 177
elessair 0:f269e3021894 178 /** The asynchronous IRQ handler
elessair 0:f269e3021894 179 *
elessair 0:f269e3021894 180 * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
elessair 0:f269e3021894 181 * conditions, such as buffer overflows or transfer complete.
elessair 0:f269e3021894 182 * @param[in] obj The SPI object that holds the transfer information
elessair 0:f269e3021894 183 * @return Event flags if a transfer termination condition was met; otherwise 0.
elessair 0:f269e3021894 184 */
elessair 0:f269e3021894 185 uint32_t spi_irq_handler_asynch(spi_t *obj);
elessair 0:f269e3021894 186
elessair 0:f269e3021894 187 /** Attempts to determine if the SPI peripheral is already in use
elessair 0:f269e3021894 188 *
elessair 0:f269e3021894 189 * If a temporary DMA channel has been allocated, peripheral is in use.
elessair 0:f269e3021894 190 * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA
elessair 0:f269e3021894 191 * channel were allocated.
elessair 0:f269e3021894 192 * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check
elessair 0:f269e3021894 193 * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if
elessair 0:f269e3021894 194 * there are any bytes in the FIFOs.
elessair 0:f269e3021894 195 * @param[in] obj The SPI object to check for activity
elessair 0:f269e3021894 196 * @return Non-zero if the SPI port is active or zero if it is not.
elessair 0:f269e3021894 197 */
elessair 0:f269e3021894 198 uint8_t spi_active(spi_t *obj);
elessair 0:f269e3021894 199
elessair 0:f269e3021894 200 /** Abort an SPI transfer
elessair 0:f269e3021894 201 *
elessair 0:f269e3021894 202 * @param obj The SPI peripheral to stop
elessair 0:f269e3021894 203 */
elessair 0:f269e3021894 204 void spi_abort_asynch(spi_t *obj);
elessair 0:f269e3021894 205
elessair 0:f269e3021894 206
elessair 0:f269e3021894 207 #endif
elessair 0:f269e3021894 208
elessair 0:f269e3021894 209 /**@}*/
elessair 0:f269e3021894 210
elessair 0:f269e3021894 211 #ifdef __cplusplus
elessair 0:f269e3021894 212 }
elessair 0:f269e3021894 213 #endif // __cplusplus
elessair 0:f269e3021894 214
elessair 0:f269e3021894 215 #endif // SPI_DEVICE
elessair 0:f269e3021894 216
elessair 0:f269e3021894 217 #endif // MBED_SPI_API_H
elessair 0:f269e3021894 218
elessair 0:f269e3021894 219 /** @}*/