Forked from romilly. Changed the way SPI handler is injected in constructor
Fork of MCP23S17 by
MCP23S17.cpp@10:ca0429a15915, 2014-03-02 (annotated)
- Committer:
- wyunreal
- Date:
- Sun Mar 02 18:15:17 2014 +0000
- Revision:
- 10:ca0429a15915
- Parent:
- 9:068b1e8909bb
changing the spi reference by an spi pointer in constructor
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
romilly | 7:53498e24592c | 1 | /* MCP23S17 - drive the Microchip MCP23S17 16-bit Port Extender using SPI |
romilly | 7:53498e24592c | 2 | * Copyright (c) 2010 Romilly Cocking |
romilly | 7:53498e24592c | 3 | * Released under the MIT License: http://mbed.org/license/mit |
romilly | 7:53498e24592c | 4 | * |
romilly | 9:068b1e8909bb | 5 | * version 0.4 |
romilly | 7:53498e24592c | 6 | */ |
romilly | 7:53498e24592c | 7 | |
romilly | 7:53498e24592c | 8 | #include "mbed.h" |
romilly | 7:53498e24592c | 9 | #include "MCP23S17.h" |
romilly | 7:53498e24592c | 10 | |
wyunreal | 10:ca0429a15915 | 11 | MCP23S17::MCP23S17(SPI* spi, PinName ncs, char writeOpcode) : _ncs(ncs) { |
wyunreal | 10:ca0429a15915 | 12 | _spi = spi; |
romilly | 7:53498e24592c | 13 | _writeOpcode = writeOpcode; |
romilly | 7:53498e24592c | 14 | _readOpcode = _writeOpcode | 1; // low order bit = 1 for read |
romilly | 7:53498e24592c | 15 | _init(); |
romilly | 7:53498e24592c | 16 | } |
romilly | 7:53498e24592c | 17 | |
romilly | 7:53498e24592c | 18 | char MCP23S17::_read(char address) { |
romilly | 7:53498e24592c | 19 | _ncs = 0; |
wyunreal | 10:ca0429a15915 | 20 | _spi->write(_readOpcode); |
wyunreal | 10:ca0429a15915 | 21 | _spi->write(address); |
wyunreal | 10:ca0429a15915 | 22 | char result = _spi->write(0); |
romilly | 7:53498e24592c | 23 | _ncs = 1; |
romilly | 7:53498e24592c | 24 | return result; |
romilly | 7:53498e24592c | 25 | } |
romilly | 7:53498e24592c | 26 | |
romilly | 8:841b19734955 | 27 | char MCP23S17::_read(Port port, char address) { |
romilly | 8:841b19734955 | 28 | return _read(address + (char) port); |
romilly | 8:841b19734955 | 29 | } |
romilly | 8:841b19734955 | 30 | |
romilly | 7:53498e24592c | 31 | void MCP23S17::_write(char address, char data) { |
romilly | 7:53498e24592c | 32 | _ncs = 0; |
wyunreal | 10:ca0429a15915 | 33 | _spi->write(_writeOpcode); |
wyunreal | 10:ca0429a15915 | 34 | _spi->write(address); |
wyunreal | 10:ca0429a15915 | 35 | _spi->write(data); |
romilly | 7:53498e24592c | 36 | _ncs = 1; |
romilly | 7:53498e24592c | 37 | } |
romilly | 7:53498e24592c | 38 | |
romilly | 8:841b19734955 | 39 | void MCP23S17::_write(Port port, char address, char data) { |
romilly | 8:841b19734955 | 40 | _write(address + (char) port, data); |
romilly | 8:841b19734955 | 41 | } |
romilly | 8:841b19734955 | 42 | |
romilly | 7:53498e24592c | 43 | void MCP23S17::_init() { |
romilly | 7:53498e24592c | 44 | _write(IOCON, (IOCON_BYTE_MODE | IOCON_HAEN )); // Hardware addressing on, operations toggle between A and B registers |
romilly | 7:53498e24592c | 45 | } |
romilly | 7:53498e24592c | 46 | |
romilly | 8:841b19734955 | 47 | void MCP23S17::direction(Port port, char direction) { |
romilly | 8:841b19734955 | 48 | _write(port, IODIRA, direction); |
romilly | 7:53498e24592c | 49 | } |
romilly | 7:53498e24592c | 50 | |
romilly | 9:068b1e8909bb | 51 | void MCP23S17::configurePullUps(Port port, char offOrOn) { |
romilly | 9:068b1e8909bb | 52 | _write(port, GPPUA, offOrOn); |
romilly | 9:068b1e8909bb | 53 | } |
romilly | 7:53498e24592c | 54 | |
romilly | 8:841b19734955 | 55 | void MCP23S17::interruptEnable(Port port, char interruptsEnabledMask) { |
romilly | 8:841b19734955 | 56 | _write(port, GPINTENA, interruptsEnabledMask); |
romilly | 7:53498e24592c | 57 | } |
romilly | 7:53498e24592c | 58 | |
romilly | 7:53498e24592c | 59 | void MCP23S17::mirrorInterrupts(bool mirror) { |
romilly | 7:53498e24592c | 60 | char iocon = _read(IOCON); |
romilly | 7:53498e24592c | 61 | if (mirror) { |
romilly | 7:53498e24592c | 62 | iocon = iocon | INTERRUPT_MIRROR_BIT; |
romilly | 7:53498e24592c | 63 | } else { |
romilly | 7:53498e24592c | 64 | iocon = iocon & ~INTERRUPT_MIRROR_BIT; |
romilly | 7:53498e24592c | 65 | } |
romilly | 7:53498e24592c | 66 | _write(IOCON, iocon); |
romilly | 7:53498e24592c | 67 | |
romilly | 7:53498e24592c | 68 | } |
romilly | 7:53498e24592c | 69 | |
romilly | 7:53498e24592c | 70 | void MCP23S17::interruptPolarity(Polarity polarity) { |
romilly | 7:53498e24592c | 71 | char iocon = _read(IOCON); |
romilly | 7:53498e24592c | 72 | if (polarity == ACTIVE_LOW) { |
romilly | 7:53498e24592c | 73 | iocon = iocon & ~INTERRUPT_POLARITY_BIT; |
romilly | 7:53498e24592c | 74 | } else { |
romilly | 7:53498e24592c | 75 | iocon = iocon | INTERRUPT_POLARITY_BIT; |
romilly | 7:53498e24592c | 76 | } |
romilly | 7:53498e24592c | 77 | _write(IOCON, iocon); |
romilly | 7:53498e24592c | 78 | } |
romilly | 7:53498e24592c | 79 | |
romilly | 8:841b19734955 | 80 | void MCP23S17::defaultValue(Port port, char valuesToCompare) { |
romilly | 8:841b19734955 | 81 | _write(port, DEFVALA, valuesToCompare); |
romilly | 7:53498e24592c | 82 | } |
romilly | 7:53498e24592c | 83 | |
romilly | 8:841b19734955 | 84 | void MCP23S17::interruptControl(Port port, char interruptContolBits) { |
romilly | 8:841b19734955 | 85 | _write(port, INTCONA, interruptContolBits); |
romilly | 7:53498e24592c | 86 | } |
romilly | 7:53498e24592c | 87 | |
romilly | 8:841b19734955 | 88 | void MCP23S17::write(Port port, char byte) { |
romilly | 8:841b19734955 | 89 | _write(port, OLATA, byte); |
romilly | 7:53498e24592c | 90 | } |
romilly | 7:53498e24592c | 91 | |
romilly | 8:841b19734955 | 92 | char MCP23S17::read(Port port) { |
romilly | 8:841b19734955 | 93 | return _read(port, GPIOA); |
romilly | 7:53498e24592c | 94 | } |
romilly | 7:53498e24592c | 95 |