Test program for Spikes when measuring 2 channels in Timer1/MAT1:0 triggering mode.

Dependencies:   mbed

Committer:
wvd_vegt
Date:
Wed Oct 31 10:31:02 2012 +0000
Revision:
2:74fd179377d9
Parent:
0:ff3d852b6266
1) Conversion to Public

Who changed what in which revision?

UserRevisionLine numberNew contents of line
wvd_vegt 0:ff3d852b6266 1 /* mbed Library - ADC
wvd_vegt 0:ff3d852b6266 2 * Copyright (c) 2010, sblandford
wvd_vegt 0:ff3d852b6266 3 * released under MIT license http://mbed.org/licence/mit
wvd_vegt 0:ff3d852b6266 4 */
wvd_vegt 0:ff3d852b6266 5
wvd_vegt 0:ff3d852b6266 6 #ifndef MBED_ADC_H
wvd_vegt 0:ff3d852b6266 7 #define MBED_ADC_H
wvd_vegt 0:ff3d852b6266 8
wvd_vegt 0:ff3d852b6266 9 #include "mbed.h"
wvd_vegt 0:ff3d852b6266 10
wvd_vegt 0:ff3d852b6266 11 #define XTAL_FREQ 12000000
wvd_vegt 0:ff3d852b6266 12 #define MAX_ADC_CLOCK 13000000
wvd_vegt 0:ff3d852b6266 13
wvd_vegt 0:ff3d852b6266 14 //veg: Corrected (was 64).
wvd_vegt 0:ff3d852b6266 15 #define CLKS_PER_SAMPLE 65
wvd_vegt 0:ff3d852b6266 16
wvd_vegt 0:ff3d852b6266 17 class ADC {
wvd_vegt 0:ff3d852b6266 18 public:
wvd_vegt 0:ff3d852b6266 19
wvd_vegt 0:ff3d852b6266 20 //Initialize ADC with ADC maximum sample rate of
wvd_vegt 0:ff3d852b6266 21 //sample_rate and system clock divider of cclk_div
wvd_vegt 0:ff3d852b6266 22 //Maximum recommened sample rate is 184000
wvd_vegt 0:ff3d852b6266 23 ADC(int sample_rate, int cclk_div);
wvd_vegt 0:ff3d852b6266 24
wvd_vegt 0:ff3d852b6266 25 //Enable/disable ADC on pin according to state
wvd_vegt 0:ff3d852b6266 26 //and also select/de-select for next conversion
wvd_vegt 0:ff3d852b6266 27 void setup(PinName pin, int state);
wvd_vegt 0:ff3d852b6266 28
wvd_vegt 0:ff3d852b6266 29 //Return enabled/disabled state of ADC on pin
wvd_vegt 0:ff3d852b6266 30 int setup(PinName pin);
wvd_vegt 0:ff3d852b6266 31
wvd_vegt 0:ff3d852b6266 32 //Enable/disable burst mode according to state
wvd_vegt 0:ff3d852b6266 33 void burst(int state);
wvd_vegt 0:ff3d852b6266 34
wvd_vegt 0:ff3d852b6266 35 //Select channel already setup
wvd_vegt 0:ff3d852b6266 36 void select(PinName pin);
wvd_vegt 0:ff3d852b6266 37
wvd_vegt 0:ff3d852b6266 38 //Return burst mode enabled/disabled
wvd_vegt 0:ff3d852b6266 39 int burst(void);
wvd_vegt 0:ff3d852b6266 40
wvd_vegt 0:ff3d852b6266 41 /*Set start condition and edge according to mode:
wvd_vegt 0:ff3d852b6266 42 0 - No start (this value should be used when clearing PDN to 0).
wvd_vegt 0:ff3d852b6266 43 1 - Start conversion now.
wvd_vegt 0:ff3d852b6266 44 2 - Start conversion when the edge selected by bit 27 occurs on the P2.10 / EINT0 / NMI pin.
wvd_vegt 0:ff3d852b6266 45 3 - Start conversion when the edge selected by bit 27 occurs on the P1.27 / CLKOUT /
wvd_vegt 0:ff3d852b6266 46 USB_OVRCRn / CAP0.1 pin.
wvd_vegt 0:ff3d852b6266 47 4 - Start conversion when the edge selected by bit 27 occurs on MAT0.1. Note that this does
wvd_vegt 0:ff3d852b6266 48 not require that the MAT0.1 function appear on a device pin.
wvd_vegt 0:ff3d852b6266 49 5 - Start conversion when the edge selected by bit 27 occurs on MAT0.3. Note that it is not
wvd_vegt 0:ff3d852b6266 50 possible to cause the MAT0.3 function to appear on a device pin.
wvd_vegt 0:ff3d852b6266 51 6 - Start conversion when the edge selected by bit 27 occurs on MAT1.0. Note that this does
wvd_vegt 0:ff3d852b6266 52 not require that the MAT1.0 function appear on a device pin.
wvd_vegt 0:ff3d852b6266 53 7 - Start conversion when the edge selected by bit 27 occurs on MAT1.1. Note that this does
wvd_vegt 0:ff3d852b6266 54 not require that the MAT1.1 function appear on a device pin.
wvd_vegt 0:ff3d852b6266 55 When mode >= 2, conversion is triggered by edge:
wvd_vegt 0:ff3d852b6266 56 0 - Rising edge
wvd_vegt 0:ff3d852b6266 57 1 - Falling edge
wvd_vegt 0:ff3d852b6266 58 */
wvd_vegt 0:ff3d852b6266 59 void startmode(int mode, int edge);
wvd_vegt 0:ff3d852b6266 60
wvd_vegt 0:ff3d852b6266 61 //Return startmode state according to mode_edge=0: mode and mode_edge=1: edge
wvd_vegt 0:ff3d852b6266 62 int startmode(int mode_edge);
wvd_vegt 0:ff3d852b6266 63
wvd_vegt 0:ff3d852b6266 64 //Start ADC conversion
wvd_vegt 0:ff3d852b6266 65 void start(void);
wvd_vegt 0:ff3d852b6266 66
wvd_vegt 0:ff3d852b6266 67 //Set interrupt enable/disable for pin to state
wvd_vegt 0:ff3d852b6266 68 void interrupt_state(PinName pin, int state);
wvd_vegt 0:ff3d852b6266 69
wvd_vegt 0:ff3d852b6266 70 //Return enable/disable state of interrupt for pin
wvd_vegt 0:ff3d852b6266 71 int interrupt_state(PinName pin);
wvd_vegt 0:ff3d852b6266 72
wvd_vegt 0:ff3d852b6266 73 //Attach custom interrupt handler replacing default
wvd_vegt 0:ff3d852b6266 74 void attach(void(*fptr)(void));
wvd_vegt 0:ff3d852b6266 75
wvd_vegt 0:ff3d852b6266 76 //Restore default interrupt handler
wvd_vegt 0:ff3d852b6266 77 void detach(void);
wvd_vegt 0:ff3d852b6266 78
wvd_vegt 0:ff3d852b6266 79 //Append custom interrupt handler for pin
wvd_vegt 0:ff3d852b6266 80 void append(PinName pin, void(*fptr)(uint32_t value));
wvd_vegt 0:ff3d852b6266 81
wvd_vegt 0:ff3d852b6266 82 //Unappend custom interrupt handler for pin
wvd_vegt 0:ff3d852b6266 83 void unappend(PinName pin);
wvd_vegt 0:ff3d852b6266 84
wvd_vegt 0:ff3d852b6266 85 //Append custom global interrupt handler
wvd_vegt 0:ff3d852b6266 86 void append(void(*fptr)(int chan, uint32_t value));
wvd_vegt 0:ff3d852b6266 87
wvd_vegt 0:ff3d852b6266 88 //Unappend custom global interrupt handler
wvd_vegt 0:ff3d852b6266 89 void unappend(void);
wvd_vegt 0:ff3d852b6266 90
wvd_vegt 0:ff3d852b6266 91 //Set ADC offset to a value 0-7
wvd_vegt 0:ff3d852b6266 92 void offset(int offset);
wvd_vegt 0:ff3d852b6266 93
wvd_vegt 0:ff3d852b6266 94 //Return current ADC offset
wvd_vegt 0:ff3d852b6266 95 int offset(void);
wvd_vegt 0:ff3d852b6266 96
wvd_vegt 0:ff3d852b6266 97 //Return value of ADC on pin
wvd_vegt 0:ff3d852b6266 98 int read(PinName pin);
wvd_vegt 0:ff3d852b6266 99
wvd_vegt 0:ff3d852b6266 100 //Return DONE flag of ADC on pin
wvd_vegt 0:ff3d852b6266 101 int done(PinName pin);
wvd_vegt 0:ff3d852b6266 102
wvd_vegt 0:ff3d852b6266 103 //Return OVERRUN flag of ADC on pin
wvd_vegt 0:ff3d852b6266 104 int overrun(PinName pin);
wvd_vegt 0:ff3d852b6266 105
wvd_vegt 0:ff3d852b6266 106 //Return actual ADC clock
wvd_vegt 0:ff3d852b6266 107 int actual_adc_clock(void);
wvd_vegt 0:ff3d852b6266 108
wvd_vegt 0:ff3d852b6266 109 //Return actual maximum sample rate
wvd_vegt 0:ff3d852b6266 110 int actual_sample_rate(void);
wvd_vegt 0:ff3d852b6266 111
wvd_vegt 0:ff3d852b6266 112 //Return pin ID of ADC channel
wvd_vegt 0:ff3d852b6266 113 PinName channel_to_pin(int chan);
wvd_vegt 0:ff3d852b6266 114
wvd_vegt 0:ff3d852b6266 115 //Return pin number of ADC channel
wvd_vegt 0:ff3d852b6266 116 int channel_to_pin_number(int chan);
wvd_vegt 0:ff3d852b6266 117
wvd_vegt 0:ff3d852b6266 118
wvd_vegt 0:ff3d852b6266 119 private:
wvd_vegt 0:ff3d852b6266 120 int _pin_to_channel(PinName pin);
wvd_vegt 0:ff3d852b6266 121 uint32_t _data_of_pin(PinName pin);
wvd_vegt 0:ff3d852b6266 122
wvd_vegt 0:ff3d852b6266 123 int _adc_clk_freq;
wvd_vegt 0:ff3d852b6266 124 void adcisr(void);
wvd_vegt 0:ff3d852b6266 125 static void _adcisr(void);
wvd_vegt 0:ff3d852b6266 126 static ADC *instance;
wvd_vegt 0:ff3d852b6266 127
wvd_vegt 0:ff3d852b6266 128 uint32_t _adc_data[8];
wvd_vegt 0:ff3d852b6266 129 void(*_adc_isr[8])(uint32_t value);
wvd_vegt 0:ff3d852b6266 130 void(*_adc_g_isr)(int chan, uint32_t value);
wvd_vegt 0:ff3d852b6266 131 void(*_adc_m_isr)(void);
wvd_vegt 0:ff3d852b6266 132 };
wvd_vegt 0:ff3d852b6266 133
wvd_vegt 0:ff3d852b6266 134 #endif