Witek Ewert / Mbed 2 deprecated KL46Z-Lab2_lodz

Sensor reporting over USB CDC

Dependencies:   MAG3110 MMA8451Q SLCD- TSI USBDevice mbed

SLCD-/FRDM-s401.h@0:7b58cdacf811, 2014-04-16 (annotated)

Committer:
wue
Date:
Wed Apr 16 12:20:12 2014 +0000
Revision:
0:7b58cdacf811
Sensor reporting over USB CDC

Who changed what in which revision?

UserRevisionLine numberNew contents of line
wue 0:7b58cdacf811 1 #pragma once
wue 0:7b58cdacf811 2
wue 0:7b58cdacf811 3 /*^^^^^^^^^^^^^^^^ LCD HARDWARE CONECTION ^^^^^^^^^^^^^^^^^^^^^^^^*/
wue 0:7b58cdacf811 4 #define _LCDFRONTPLANES (8) // # of frontPlanes
wue 0:7b58cdacf811 5 #define _LCDBACKPLANES (4) // # of backplanes
wue 0:7b58cdacf811 6
wue 0:7b58cdacf811 7 /*
wue 0:7b58cdacf811 8 LCD logical organization definition
wue 0:7b58cdacf811 9 This section indicates how the LCD is distributed how many characteres of (7-seg, 14,seg, 16 seg, or colums in case of Dot Matrix) does it contain
wue 0:7b58cdacf811 10 First character is forced only one can be written
wue 0:7b58cdacf811 11
wue 0:7b58cdacf811 12 */
wue 0:7b58cdacf811 13 // HARDWARE_CONFIG Changing LCD pins Allows to verify all LCD pins easily
wue 0:7b58cdacf811 14 // if HARDWARE_CONFIG == 0 FRDM-KL46 RevB
wue 0:7b58cdacf811 15 // if HARDWARE_CONFIG == 1 FRDM-KL46 RevA
wue 0:7b58cdacf811 16 #ifdef FRDM_REVA
wue 0:7b58cdacf811 17 #define HARDWARE_CONFIG 1
wue 0:7b58cdacf811 18 #else
wue 0:7b58cdacf811 19 #define HARDWARE_CONFIG 0
wue 0:7b58cdacf811 20 #endif
wue 0:7b58cdacf811 21
wue 0:7b58cdacf811 22 #define _CHARNUM (4) //number of chars that can be written
wue 0:7b58cdacf811 23 #define _CHAR_SIZE (2) // Used only when Dot Matrix is used
wue 0:7b58cdacf811 24 #define _LCDTYPE (2) //indicate how many LCD_WF are required to write a single Character
wue 0:7b58cdacf811 25
wue 0:7b58cdacf811 26 /*
wue 0:7b58cdacf811 27 Following definitions indicate how characters are associated to waveform
wue 0:7b58cdacf811 28 */
wue 0:7b58cdacf811 29 /* Hardware configuration */
wue 0:7b58cdacf811 30 #if HARDWARE_CONFIG == 0
wue 0:7b58cdacf811 31
wue 0:7b58cdacf811 32 // LCD PIN1 to LCDWF0 Rev B
wue 0:7b58cdacf811 33 #define CHAR1a 37 // LCD Pin 5
wue 0:7b58cdacf811 34 #define CHAR1b 17 // LCD Pin 6
wue 0:7b58cdacf811 35 #define CHAR2a 7 // LCD Pin 7
wue 0:7b58cdacf811 36 #define CHAR2b 8 // LCD Pin 8
wue 0:7b58cdacf811 37 #define CHAR3a 53 // LCD Pin 9
wue 0:7b58cdacf811 38 #define CHAR3b 38 // LCD Pin 10
wue 0:7b58cdacf811 39 #define CHAR4a 10 // LCD Pin 11
wue 0:7b58cdacf811 40 #define CHAR4b 11 // LCD Pin 12
wue 0:7b58cdacf811 41 #define CHARCOM0 40 // LCD Pin 1
wue 0:7b58cdacf811 42 #define CHARCOM1 52 // LCD Pin 2
wue 0:7b58cdacf811 43 #define CHARCOM2 19 // LCD Pin 3
wue 0:7b58cdacf811 44 #define CHARCOM3 18 // LCD Pin 4
wue 0:7b58cdacf811 45
wue 0:7b58cdacf811 46 // LCD PIN1 to LCDWF2 for FRDM-KL46Z
wue 0:7b58cdacf811 47 #elif HARDWARE_CONFIG == 1
wue 0:7b58cdacf811 48 #define CHAR1a 37 // LCD Pin 5
wue 0:7b58cdacf811 49 #define CHAR1b 17 // LCD Pin 6
wue 0:7b58cdacf811 50 #define CHAR2a 7 // LCD Pin 7
wue 0:7b58cdacf811 51 #define CHAR2b 8 // LCD Pin 8
wue 0:7b58cdacf811 52 #define CHAR3a 12 // LCD Pin 9
wue 0:7b58cdacf811 53 #define CHAR3b 26 // LCD Pin 10
wue 0:7b58cdacf811 54 #define CHAR4a 10 // LCD Pin 11
wue 0:7b58cdacf811 55 #define CHAR4b 11 // LCD Pin 12
wue 0:7b58cdacf811 56 #define CHARCOM0 51 // LCD Pin 1
wue 0:7b58cdacf811 57 #define CHARCOM1 52 // LCD Pin 2
wue 0:7b58cdacf811 58 #define CHARCOM2 19 // LCD Pin 3
wue 0:7b58cdacf811 59 #define CHARCOM3 16 // LCD Pin 4
wue 0:7b58cdacf811 60
wue 0:7b58cdacf811 61 #endif
wue 0:7b58cdacf811 62
wue 0:7b58cdacf811 63
wue 0:7b58cdacf811 64 /*Ascii Codification table information */
wue 0:7b58cdacf811 65 #define ASCCI_TABLE_START '0' // indicates which is the first Ascii character in the table
wue 0:7b58cdacf811 66 #define ASCCI_TABLE_END 'Z' // indicates which is the first Ascii character in the table
wue 0:7b58cdacf811 67 #define BLANK_CHARACTER '>' // Indicate which ASCII character is a blank character (depends on ASCII table)
wue 0:7b58cdacf811 68
wue 0:7b58cdacf811 69 #define _ALLON 0xFF // Used for ALL_on function
wue 0:7b58cdacf811 70
wue 0:7b58cdacf811 71 #define SEGDP 0x01
wue 0:7b58cdacf811 72 #define SEGC 0x02
wue 0:7b58cdacf811 73 #define SEGB 0x04
wue 0:7b58cdacf811 74 #define SEGA 0x08
wue 0:7b58cdacf811 75
wue 0:7b58cdacf811 76 #define SEGD 0x01
wue 0:7b58cdacf811 77 #define SEGE 0x02
wue 0:7b58cdacf811 78 #define SEGG 0x04
wue 0:7b58cdacf811 79 #define SEGF 0x08
wue 0:7b58cdacf811 80
wue 0:7b58cdacf811 81
wue 0:7b58cdacf811 82 /* Fault detect initial limits */
wue 0:7b58cdacf811 83
wue 0:7b58cdacf811 84 /* Fault detect initial parameters and limits */
wue 0:7b58cdacf811 85 #define FAULTD_FP_FDPRS FDPRS_32
wue 0:7b58cdacf811 86 #define FAULTD_FP_FDSWW FDSWW_128
wue 0:7b58cdacf811 87 #define FAULTD_BP_FDPRS FDPRS_64
wue 0:7b58cdacf811 88 #define FAULTD_BP_FDSWW FDSWW_128
wue 0:7b58cdacf811 89
wue 0:7b58cdacf811 90 #define FAULTD_FP_HI 127
wue 0:7b58cdacf811 91 #define FAULTD_FP_LO 110
wue 0:7b58cdacf811 92 #define FAULTD_BP_HI 127
wue 0:7b58cdacf811 93 #define FAULTD_BP_LO 110
wue 0:7b58cdacf811 94 #define FAULTD_TIME 6
wue 0:7b58cdacf811 95
wue 0:7b58cdacf811 96 extern const uint8_t WF_ORDERING_TABLE[]; // Logical Front plane N to LCD_WFx
wue 0:7b58cdacf811 97
wue 0:7b58cdacf811 98
wue 0:7b58cdacf811 99