cf wu / Mbed OS M482_EPY_Wifi_BLE

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epy_lite_io.h@33:e09fff6b149f, 2021-06-16 (annotated)

Committer:
wright0418
Date:
Wed Jun 16 11:05:30 2021 +0000
Revision:
33:e09fff6b149f
Parent:
32:9dfefb53a199 
2 test

Who changed what in which revision?

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wright0418 32:9dfefb53a199 1 /* ePy-Lite IO pins definitions
wright0418 32:9dfefb53a199 2 * Copyright (c) 2021 Richlink Technology
wright0418 32:9dfefb53a199 3 *
wright0418 32:9dfefb53a199 4 * Licensed under the Apache License, Version 2.0 (the "License");
wright0418 32:9dfefb53a199 5 * you may not use this file except in compliance with the License.
wright0418 32:9dfefb53a199 6 * You may obtain a copy of the License at
wright0418 32:9dfefb53a199 7 *
wright0418 32:9dfefb53a199 8 * http://www.apache.org/licenses/LICENSE-2.0
wright0418 32:9dfefb53a199 9 *
wright0418 32:9dfefb53a199 10 * Unless required by applicable law or agreed to in writing, software
wright0418 32:9dfefb53a199 11 * distributed under the License is distributed on an "AS IS" BASIS,
wright0418 32:9dfefb53a199 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
wright0418 32:9dfefb53a199 13 * See the License for the specific language governing permissions and
wright0418 32:9dfefb53a199 14 * limitations under the License.
wright0418 32:9dfefb53a199 15 */
wright0418 32:9dfefb53a199 16
wright0418 32:9dfefb53a199 17 #ifndef _EPY_LITE_IO_H_
wright0418 32:9dfefb53a199 18 #define _EPY_LITE_IO_H_
wright0418 32:9dfefb53a199 19
wright0418 32:9dfefb53a199 20 #include "mbed.h"
wright0418 32:9dfefb53a199 21
wright0418 32:9dfefb53a199 22 /* IO definitions for ePy-Lite */
wright0418 32:9dfefb53a199 23
wright0418 32:9dfefb53a199 24 #define BLE_DEFAULT_BAUD_RATE 115200
wright0418 32:9dfefb53a199 25 #define BLE_UART_TX PA_9
wright0418 32:9dfefb53a199 26 #define BLE_UART_RX PA_8
wright0418 32:9dfefb53a199 27 #define BLE_TIMEOUT 1000 // in milli-seconds
wright0418 32:9dfefb53a199 28
wright0418 32:9dfefb53a199 29 #define KEY_A PB_15
wright0418 32:9dfefb53a199 30 #define KEY_B PB_14 // Reserved.
wright0418 32:9dfefb53a199 31
wright0418 32:9dfefb53a199 32 #define LED_R PB_1
wright0418 32:9dfefb53a199 33 #define LED_Y PB_2
wright0418 32:9dfefb53a199 34 #define LED_G PB_3
wright0418 32:9dfefb53a199 35 #define LED_B LED_G
wright0418 32:9dfefb53a199 36 #define RGB_DAT PF_6 // SPI0_MOSI for RGB LED
wright0418 32:9dfefb53a199 37
wright0418 32:9dfefb53a199 38 #define SPIFLASH_CS PC_3
wright0418 32:9dfefb53a199 39 #define SPIFLASH_CLK PC_2
wright0418 32:9dfefb53a199 40 #define SPIFLASH_SIO0 PC_0
wright0418 32:9dfefb53a199 41 #define SPIFLASH_SIO1 PC_1
wright0418 32:9dfefb53a199 42 #define SPIFLASH_SIO2 PC_5
wright0418 32:9dfefb53a199 43 #define SPIFLASH_SIO3 PC_4
wright0418 32:9dfefb53a199 44 #define SPIFLASH_MOSI SPIFLASH_SIO0
wright0418 32:9dfefb53a199 45 #define SPIFLASH_MISO SPIFLASH_SIO1
wright0418 32:9dfefb53a199 46 #define SPIFLASH_WP SPIFLASH_SIO2 // low active
wright0418 32:9dfefb53a199 47 #define SPIFLASH_HOLD SPIFLASH_SIO3 // low active
wright0418 32:9dfefb53a199 48 #define SPIFLASH_RESET SPIFLASH_SIO3 // low active
wright0418 32:9dfefb53a199 49
wright0418 32:9dfefb53a199 50 #define SPI0_SS PA_3
wright0418 32:9dfefb53a199 51 #define SPI0_CLK PA_2
wright0418 32:9dfefb53a199 52 #define SPI0_MISO PA_1
wright0418 32:9dfefb53a199 53 #define SPI0_MOSI PA_0
wright0418 32:9dfefb53a199 54
wright0418 32:9dfefb53a199 55 #define I2C0_SCL PB_5
wright0418 32:9dfefb53a199 56 #define I2C0_SDA PB_4
wright0418 32:9dfefb53a199 57 #define I2C1_SCL PF_0
wright0418 32:9dfefb53a199 58 #define I2C1_SDA PF_1
wright0418 32:9dfefb53a199 59 #define I2C2_SCL PA_11
wright0418 32:9dfefb53a199 60 #define I2C2_SDA PA_10
wright0418 32:9dfefb53a199 61
wright0418 32:9dfefb53a199 62 #define PWM0_ PC_7
wright0418 32:9dfefb53a199 63 #define PWM1_ PC_6
wright0418 32:9dfefb53a199 64 #define PWM2_ PA_7
wright0418 32:9dfefb53a199 65 #define PWM3_ PA_6
wright0418 32:9dfefb53a199 66
wright0418 32:9dfefb53a199 67 #define UART3_RX PD_0
wright0418 32:9dfefb53a199 68 #define UART3_TX PD_1
wright0418 32:9dfefb53a199 69 #define UART0_RX PD_2
wright0418 32:9dfefb53a199 70 #define UART0_TX PD_3
wright0418 32:9dfefb53a199 71 #define UART0_ALT_RX PB_12
wright0418 32:9dfefb53a199 72 #define UART0_ALT_TX PB_13
wright0418 32:9dfefb53a199 73
wright0418 32:9dfefb53a199 74 #define AIN0 PB_6
wright0418 32:9dfefb53a199 75 #define AIN1 PB_7
wright0418 32:9dfefb53a199 76 #define AIN2 PB_8
wright0418 32:9dfefb53a199 77 #define AIN3 PB_9
wright0418 32:9dfefb53a199 78 #define AIN4 PB_10
wright0418 32:9dfefb53a199 79 #define AIN5 PB_11
wright0418 32:9dfefb53a199 80
wright0418 32:9dfefb53a199 81 #define P0 PD_0 // UART3_RX
wright0418 32:9dfefb53a199 82 #define P1 PD_1 // UART3_TX
wright0418 32:9dfefb53a199 83 #define P2 PD_2 // UART0_RX
wright0418 32:9dfefb53a199 84 #define P3 PD_3 // UART0_TX
wright0418 32:9dfefb53a199 85 #define P4 PF_1 // I2C1_SDA
wright0418 32:9dfefb53a199 86 #define P5 PF_0 // I2C1_SCL
wright0418 32:9dfefb53a199 87 #define P6 PA_0 // SPI0_MOSI
wright0418 32:9dfefb53a199 88 #define P7 PA_1 // SPI0_MISO
wright0418 32:9dfefb53a199 89 #define P8 PA_2 // SPI0_CLK
wright0418 32:9dfefb53a199 90 #define P9 PA_3 // SPI0_SS
wright0418 32:9dfefb53a199 91 #define P10 PA_6 // PWM3
wright0418 32:9dfefb53a199 92 #define P11 PA_7 // PWM2
wright0418 32:9dfefb53a199 93 #define P12 PC_6 // PWM1
wright0418 32:9dfefb53a199 94 #define P13 PC_7 // PWM0
wright0418 32:9dfefb53a199 95 #define P14 PA_10 // I2C2_SDA
wright0418 32:9dfefb53a199 96 #define P15 PA_11 // I2C2_SCL
wright0418 32:9dfefb53a199 97 #define P16 PB_4 // I2C0_SDA
wright0418 32:9dfefb53a199 98 #define P17 PB_5 // I2C0_SCL
wright0418 32:9dfefb53a199 99 #define P18 PB_6 // AIN0, EADC0_CH6
wright0418 32:9dfefb53a199 100 #define P19 PB_7 // AIN1, EADC0_CH7
wright0418 32:9dfefb53a199 101 #define P20 PB_8 // AIN2, EADC0_CH8
wright0418 32:9dfefb53a199 102 #define P21 PB_9 // AIN3, EADC0_CH9
wright0418 32:9dfefb53a199 103 #define P22 PB_10 // AIN4, EADC0_CH10
wright0418 32:9dfefb53a199 104 #define P23 PB_11 // AIN5, EADC0_CH11
wright0418 32:9dfefb53a199 105 #define P24 PB_15 // KEY_A
wright0418 32:9dfefb53a199 106
wright0418 32:9dfefb53a199 107 #if 1
wright0418 32:9dfefb53a199 108 class EPY_BLE /* : NonCopyable<EPY_BLE> */ {
wright0418 32:9dfefb53a199 109 private:
wright0418 32:9dfefb53a199 110
wright0418 32:9dfefb53a199 111 // UART settings
wright0418 32:9dfefb53a199 112 mbed::BufferedSerial _serial;
wright0418 32:9dfefb53a199 113 PinName _serial_rts;
wright0418 32:9dfefb53a199 114 PinName _serial_cts;
wright0418 32:9dfefb53a199 115 rtos::Mutex _smutex; // protect serial port access
wright0418 32:9dfefb53a199 116
wright0418 32:9dfefb53a199 117 public:
wright0418 32:9dfefb53a199 118 EPY_BLE(PinName tx, PinName rx, bool debug = false, PinName rts = NC, PinName cts = NC);
wright0418 32:9dfefb53a199 119 ~EPY_BLE();
wright0418 32:9dfefb53a199 120
wright0418 32:9dfefb53a199 121 void set_baud(int baud);
wright0418 32:9dfefb53a199 122 bool start_uart_hw_flow_ctrl();
wright0418 32:9dfefb53a199 123 bool stop_uart_hw_flow_ctrl();
wright0418 32:9dfefb53a199 124
wright0418 32:9dfefb53a199 125 void set_timeout(uint32_t timeout = BLE_TIMEOUT);
wright0418 32:9dfefb53a199 126
wright0418 32:9dfefb53a199 127 bool at_available(void);
wright0418 32:9dfefb53a199 128 bool echo_off(void);
wright0418 32:9dfefb53a199 129 void reset(void);
wright0418 32:9dfefb53a199 130 void startup();
wright0418 32:9dfefb53a199 131
wright0418 32:9dfefb53a199 132 const char *mac_addr(void);
wright0418 32:9dfefb53a199 133 int scan();
wright0418 32:9dfefb53a199 134 int8_t rssi();
wright0418 32:9dfefb53a199 135 bool connect();
wright0418 32:9dfefb53a199 136 bool disconnect();
wright0418 32:9dfefb53a199 137
wright0418 32:9dfefb53a199 138 bool readable();
wright0418 32:9dfefb53a199 139 bool writeable();
wright0418 32:9dfefb53a199 140 ssize_t read(const void *buffer, std::size_t length);
wright0418 32:9dfefb53a199 141 ssize_t write(const void *buffer, std::size_t length);
wright0418 32:9dfefb53a199 142 ssize_t send(const void *buffer, std::size_t length);
wright0418 32:9dfefb53a199 143 ssize_t recv(const void *buffer, std::size_t length);
wright0418 32:9dfefb53a199 144
wright0418 32:9dfefb53a199 145 };
wright0418 32:9dfefb53a199 146 #endif
wright0418 32:9dfefb53a199 147
wright0418 32:9dfefb53a199 148 #endif // _EPY_LITE_IO_H_