Wim Huiskamp / PCF8574_Bus

PCF8574 I2C Portexpanders used to provide data, address and controlbus interface

Dependents:   mbed_bus

PCF8574_EnableBus.cpp@0:12207c70f4ea, 2015-01-25 (annotated)

Committer:
wim
Date:
Sun Jan 25 17:50:03 2015 +0000
Revision:
0:12207c70f4ea
PCF8574 Bus Class. First release, converted into lib.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
wim 0:12207c70f4ea 1 /* PCF8574_EnableBus - Use the PCF8574 I2C Port Extender for controlling the Chip Enable Bus
wim 0:12207c70f4ea 2 * Copyright (c) 2011 Wim Huiskamp
wim 0:12207c70f4ea 3 *
wim 0:12207c70f4ea 4 * Released under the MIT License: http://mbed.org/license/mit
wim 0:12207c70f4ea 5 *
wim 0:12207c70f4ea 6 * version 0.2 Initial Release
wim 0:12207c70f4ea 7 */
wim 0:12207c70f4ea 8 #include "mbed.h"
wim 0:12207c70f4ea 9 #include "PCF8574_EnableBus.h"
wim 0:12207c70f4ea 10
wim 0:12207c70f4ea 11
wim 0:12207c70f4ea 12 /** Create an PCF8574_EnableBus object connected to the specified I2C object and using the specified deviceAddress
wim 0:12207c70f4ea 13 *
wim 0:12207c70f4ea 14 * @param I2C &i2c the I2C port to connect to
wim 0:12207c70f4ea 15 * @param char deviceAddress the address of the PCF8574
wim 0:12207c70f4ea 16 */
wim 0:12207c70f4ea 17 PCF8574_EnableBus::PCF8574_EnableBus(I2C &i2c, char deviceAddress) : _i2c(i2c) {
wim 0:12207c70f4ea 18 _writeOpcode = deviceAddress & 0xFE; // low order bit = 0 for write
wim 0:12207c70f4ea 19 _readOpcode = deviceAddress | 0x01; // low order bit = 1 for read
wim 0:12207c70f4ea 20 _init();
wim 0:12207c70f4ea 21 }
wim 0:12207c70f4ea 22
wim 0:12207c70f4ea 23
wim 0:12207c70f4ea 24 /** Set or Reset Chip Select pins on Enable Bus
wim 0:12207c70f4ea 25 *
wim 0:12207c70f4ea 26 * @param CS_Pin cs_pin
wim 0:12207c70f4ea 27 * @param Bit_Level cs_level
wim 0:12207c70f4ea 28 */
wim 0:12207c70f4ea 29 void PCF8574_EnableBus::chipselect (CS_Pin cs_pin, Bit_Level cs_level) {
wim 0:12207c70f4ea 30 int result = 1;
wim 0:12207c70f4ea 31
wim 0:12207c70f4ea 32 switch (cs_pin) {
wim 0:12207c70f4ea 33 case CS_SWITCH : if (cs_level == LOW)
wim 0:12207c70f4ea 34 _enable_bus = ~D_CS_SWITCH; // CS Pin Low, make sure that only one CS is active
wim 0:12207c70f4ea 35 else
wim 0:12207c70f4ea 36 _enable_bus |= D_CS_SWITCH; // CS Pin High
wim 0:12207c70f4ea 37 break;
wim 0:12207c70f4ea 38 case LATCHEN_1 : if (cs_level == LOW)
wim 0:12207c70f4ea 39 _enable_bus = ~D_LATCHEN_1; // CS Pin Low, make sure that only one CS is active
wim 0:12207c70f4ea 40 else
wim 0:12207c70f4ea 41 _enable_bus |= D_LATCHEN_1; // CS Pin High
wim 0:12207c70f4ea 42 break;
wim 0:12207c70f4ea 43 case LATCHEN_2 : if (cs_level == LOW)
wim 0:12207c70f4ea 44 _enable_bus = ~D_LATCHEN_2; // CS Pin Low, make sure that only one CS is active
wim 0:12207c70f4ea 45 else
wim 0:12207c70f4ea 46 _enable_bus |= D_LATCHEN_2; // CS Pin High
wim 0:12207c70f4ea 47 break;
wim 0:12207c70f4ea 48 case CS_BRIGHT : if (cs_level == LOW)
wim 0:12207c70f4ea 49 _enable_bus = ~D_CS_BRIGHT; // CS Pin Low, make sure that only one CS is active
wim 0:12207c70f4ea 50 else
wim 0:12207c70f4ea 51 _enable_bus |= D_CS_BRIGHT; // CS Pin High
wim 0:12207c70f4ea 52 break;
wim 0:12207c70f4ea 53 case CS_DISP : if (cs_level == LOW)
wim 0:12207c70f4ea 54 _enable_bus = ~D_CS_DISP; // CS Pin Low, make sure that only one CS is active
wim 0:12207c70f4ea 55 else
wim 0:12207c70f4ea 56 _enable_bus |= D_CS_DISP; // CS Pin High
wim 0:12207c70f4ea 57 break;
wim 0:12207c70f4ea 58
wim 0:12207c70f4ea 59 default: // Oops, we should never end up here....
wim 0:12207c70f4ea 60 result = -1;
wim 0:12207c70f4ea 61 }
wim 0:12207c70f4ea 62
wim 0:12207c70f4ea 63 _write(); // Write chip enable bits to bus
wim 0:12207c70f4ea 64 }
wim 0:12207c70f4ea 65
wim 0:12207c70f4ea 66 /** Set or Clear the Reset pin on Enable Bus
wim 0:12207c70f4ea 67 *
wim 0:12207c70f4ea 68 * @param Bit_Level rst_level
wim 0:12207c70f4ea 69 */
wim 0:12207c70f4ea 70 void PCF8574_EnableBus::reset (Bit_Level rst_level) {
wim 0:12207c70f4ea 71
wim 0:12207c70f4ea 72 if (rst_level == LOW) {
wim 0:12207c70f4ea 73 _reset_pin = 0x00; // Reset Pin Low
wim 0:12207c70f4ea 74 }
wim 0:12207c70f4ea 75 else {
wim 0:12207c70f4ea 76 _reset_pin = D_RESET; // Reset Pin High
wim 0:12207c70f4ea 77 }
wim 0:12207c70f4ea 78
wim 0:12207c70f4ea 79 _write(); // Write RST bit to bus
wim 0:12207c70f4ea 80 }
wim 0:12207c70f4ea 81
wim 0:12207c70f4ea 82
wim 0:12207c70f4ea 83 /** Set or Clear the NoGo pin on Enable Bus
wim 0:12207c70f4ea 84 *
wim 0:12207c70f4ea 85 * @param Bit_Level nogo_level
wim 0:12207c70f4ea 86 */
wim 0:12207c70f4ea 87 void PCF8574_EnableBus::nogo (Bit_Level nogo_level) {
wim 0:12207c70f4ea 88
wim 0:12207c70f4ea 89 if (nogo_level == LOW) {
wim 0:12207c70f4ea 90 _nogo_pin = 0x00; // NOGO Pin Low
wim 0:12207c70f4ea 91 }
wim 0:12207c70f4ea 92 else {
wim 0:12207c70f4ea 93 _nogo_pin = D_NOGO; // NOGO Pin High
wim 0:12207c70f4ea 94 }
wim 0:12207c70f4ea 95
wim 0:12207c70f4ea 96 _write(); // Write NoGo bit to bus
wim 0:12207c70f4ea 97 }
wim 0:12207c70f4ea 98
wim 0:12207c70f4ea 99
wim 0:12207c70f4ea 100 /** Optimised EnableBus write operation.
wim 0:12207c70f4ea 101 * @param byte the value to output on the bus
wim 0:12207c70f4ea 102 */
wim 0:12207c70f4ea 103 void PCF8574_EnableBus::_write(char byte) {
wim 0:12207c70f4ea 104 char data[1];
wim 0:12207c70f4ea 105
wim 0:12207c70f4ea 106 data[0] = byte;
wim 0:12207c70f4ea 107 _i2c.write(_writeOpcode, data, 1); // Write value to bus
wim 0:12207c70f4ea 108 }
wim 0:12207c70f4ea 109
wim 0:12207c70f4ea 110 /** Optimised EnableBus write operation.
wim 0:12207c70f4ea 111 * @param
wim 0:12207c70f4ea 112 */
wim 0:12207c70f4ea 113 void PCF8574_EnableBus::_write() {
wim 0:12207c70f4ea 114 char data[1];
wim 0:12207c70f4ea 115
wim 0:12207c70f4ea 116 data[0] = (_enable_bus & D_ENABLE_MSK) | _reset_pin | _nogo_pin; // Combine enable bits and control bits
wim 0:12207c70f4ea 117 _i2c.write(_writeOpcode, data, 1); // Write value to bus
wim 0:12207c70f4ea 118 }
wim 0:12207c70f4ea 119
wim 0:12207c70f4ea 120
wim 0:12207c70f4ea 121 /** Init PCF8574_EnableBus
wim 0:12207c70f4ea 122 * @param
wim 0:12207c70f4ea 123 * @returns
wim 0:12207c70f4ea 124 */
wim 0:12207c70f4ea 125 void PCF8574_EnableBus::_init() {
wim 0:12207c70f4ea 126 _enable_bus = 0xFF; // Make sure that all CS pins are disabled
wim 0:12207c70f4ea 127 _reset_pin = D_RESET; // Make sure that Reset pin is disabled
wim 0:12207c70f4ea 128 _nogo_pin = D_NOGO; // Make sure that NoGo pin is disabled
wim 0:12207c70f4ea 129 _write(); // Write value to bus
wim 0:12207c70f4ea 130 }