Wim Huiskamp / LC75711

Sanyo LC75711 VFD controller/driver for upto 16 Dot Matrix Characters

Dependents:   mbed_LC75711

The component page is here.

LC75711.h@2:cb6f2b7930c8, 2017-09-15 (annotated)

Committer:
wim
Date:
Fri Sep 15 17:38:40 2017 +0000
Revision:
2:cb6f2b7930c8
Parent:
1:bcf010fcacae
Child:
3:8101f714d38d
Modified setBlink(), added clrBlink()

Who changed what in which revision?

UserRevisionLine numberNew contents of line
wim 0:5eb5fee234e8 1 /* mbed LC75710 Library, for Sanyo LC7571X VFD controller
wim 0:5eb5fee234e8 2 * Note: The LC75710, LC75711 and LC75712 differ only in the built-in character ROM
wim 0:5eb5fee234e8 3 *
wim 0:5eb5fee234e8 4 * Copyright (c) 2017, v01: WH, Initial version
wim 1:bcf010fcacae 5 * 2017, v02: WH, Cleaned up docs
wim 2:cb6f2b7930c8 6 * 2017, v03: WH, Modified setBlink
wim 0:5eb5fee234e8 7 *
wim 0:5eb5fee234e8 8 * Permission is hereby granted, free of charge, to any person obtaining a copy
wim 0:5eb5fee234e8 9 * of this software and associated documentation files (the "Software"), to deal
wim 0:5eb5fee234e8 10 * in the Software without restriction, including without limitation the rights
wim 0:5eb5fee234e8 11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
wim 0:5eb5fee234e8 12 * copies of the Software, and to permit persons to whom the Software is
wim 0:5eb5fee234e8 13 * furnished to do so, subject to the following conditions:
wim 0:5eb5fee234e8 14 *
wim 0:5eb5fee234e8 15 * The above copyright notice and this permission notice shall be included in
wim 0:5eb5fee234e8 16 * all copies or substantial portions of the Software.
wim 0:5eb5fee234e8 17 *
wim 0:5eb5fee234e8 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
wim 0:5eb5fee234e8 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
wim 0:5eb5fee234e8 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
wim 0:5eb5fee234e8 21 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
wim 0:5eb5fee234e8 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
wim 0:5eb5fee234e8 23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
wim 0:5eb5fee234e8 24 * THE SOFTWARE.
wim 0:5eb5fee234e8 25 */
wim 0:5eb5fee234e8 26
wim 0:5eb5fee234e8 27 #ifndef LC75711_H
wim 0:5eb5fee234e8 28 #define LC75711_H
wim 0:5eb5fee234e8 29
wim 0:5eb5fee234e8 30 // Select one of the testboards for Sanyo LC75711 VFD controller
wim 0:5eb5fee234e8 31 #include "LC75711_Config.h"
wim 0:5eb5fee234e8 32 #include "LC75711_UDC.h"
wim 0:5eb5fee234e8 33
wim 0:5eb5fee234e8 34 /** An interface for driving Sanyo LC75711 VFD controller
wim 0:5eb5fee234e8 35 *
wim 0:5eb5fee234e8 36 * @code
wim 0:5eb5fee234e8 37 *
wim 0:5eb5fee234e8 38 * #if (LC75711_TEST == 1)
wim 0:5eb5fee234e8 39 * // Direct driving of LC75711 Test
wim 0:5eb5fee234e8 40 *
wim 0:5eb5fee234e8 41 * #include "mbed.h"
wim 0:5eb5fee234e8 42 * #include "LC75711.h"
wim 0:5eb5fee234e8 43 *
wim 0:5eb5fee234e8 44 * DigitalOut myled(LED1);
wim 0:5eb5fee234e8 45 * Serial pc(USBTX, USBRX);
wim 0:5eb5fee234e8 46 *
wim 0:5eb5fee234e8 47 * // LC75711 declaration, Default setting 16 Grids @ 35 Segments
wim 0:5eb5fee234e8 48 * LC75711 LC75711(p5, p7, p8); // DI, CLK, CS
wim 0:5eb5fee234e8 49 *
wim 0:5eb5fee234e8 50 * int main() {
wim 0:5eb5fee234e8 51 * pc.printf("Hello World: LC75711 test\n\r");
wim 0:5eb5fee234e8 52 *
wim 0:5eb5fee234e8 53 * LC75711.cls();
wim 0:5eb5fee234e8 54 * LC75711.writeData(all_str);
wim 0:5eb5fee234e8 55 * wait(4);
wim 0:5eb5fee234e8 56 * LC75711.setBrightness(LC75711_BRT0);
wim 0:5eb5fee234e8 57 * wait(1);
wim 0:5eb5fee234e8 58 * LC75711.setBrightness(LC75711_BRT3);
wim 0:5eb5fee234e8 59 *
wim 0:5eb5fee234e8 60 * LC75711.writeData((char)'H', 9);
wim 0:5eb5fee234e8 61 * LC75711.writeData((char)'e', 8);
wim 0:5eb5fee234e8 62 * LC75711.writeData((char)'l', 7);
wim 0:5eb5fee234e8 63 * LC75711.writeData((char)'l', 6);
wim 0:5eb5fee234e8 64 * LC75711.writeData((char)'o', 5);
wim 0:5eb5fee234e8 65 *
wim 0:5eb5fee234e8 66 * while(1) {
wim 0:5eb5fee234e8 67 * myled = !myled;
wim 0:5eb5fee234e8 68 * wait(1);
wim 0:5eb5fee234e8 69 * }
wim 0:5eb5fee234e8 70 * }
wim 0:5eb5fee234e8 71 * #endif
wim 0:5eb5fee234e8 72 *
wim 0:5eb5fee234e8 73 * @endcode
wim 0:5eb5fee234e8 74 */
wim 0:5eb5fee234e8 75
wim 0:5eb5fee234e8 76
wim 0:5eb5fee234e8 77 //LC75711 Display and Annunciator data
wim 0:5eb5fee234e8 78 #define LC75711_MAX_NR_GRIDS 16
wim 0:5eb5fee234e8 79 #define LC75711_BYTES_PER_GRID 1
wim 0:5eb5fee234e8 80
wim 0:5eb5fee234e8 81 //Memory size in bytes for Display and Annunciators
wim 0:5eb5fee234e8 82 #define LC75711_DISPLAY_MEM 64
wim 0:5eb5fee234e8 83 #define LC75711_ADD_MEM 16
wim 0:5eb5fee234e8 84 //#define LC75711_UDC_MEM 8
wim 0:5eb5fee234e8 85
wim 0:5eb5fee234e8 86 //Serial control data consists of an 8-bit address and a 24-bit instruction. The address is used as a chip select function
wim 0:5eb5fee234e8 87 //when multiple ICs are connected to the same bus. The address for the LC75710NE series is only used to distinguish the device
wim 0:5eb5fee234e8 88 //from different types of devices. Multiple LC75711 devices on the same bus can only be distinguised by the CE control.
wim 0:5eb5fee234e8 89 //Note that the serial control is similar but not identical to SPI behaviour:
wim 0:5eb5fee234e8 90 // The address is transmitted during CE low, the command & data is latched on falling CE edge.
wim 0:5eb5fee234e8 91 // A wait time must be observed after each command. Typical delay is 18 us.
wim 0:5eb5fee234e8 92 //Address (LSB sent first)
wim 0:5eb5fee234e8 93 #define LC75711_ADDRESS 0x67
wim 0:5eb5fee234e8 94
wim 0:5eb5fee234e8 95
wim 0:5eb5fee234e8 96 //
wim 0:5eb5fee234e8 97 //Blink command, allows individual digit control
wim 0:5eb5fee234e8 98 // 1 0 1 M A BC2 BC1 BC0 GR16 ... GR1
wim 0:5eb5fee234e8 99 #define LC75711_BLNK_REG 0xA0
wim 0:5eb5fee234e8 100 #define LC75711_BLNK_MA_MSK 0x18
wim 0:5eb5fee234e8 101 #define LC75711_BLNK_BC_MSK 0x07
wim 0:5eb5fee234e8 102
wim 0:5eb5fee234e8 103 //Blinking Mode
wim 0:5eb5fee234e8 104 // M A Display operating state
wim 0:5eb5fee234e8 105 // 0 0 Neither MDATA nor ADATA blinks.
wim 0:5eb5fee234e8 106 // 0 1 Only ADATA blinks.
wim 0:5eb5fee234e8 107 // 1 0 Only MDATA blinks.
wim 0:5eb5fee234e8 108 // 1 1 Both ADATA and MDATA blink.
wim 0:5eb5fee234e8 109
wim 0:5eb5fee234e8 110 //Blinking Period in sec when fOSC is 2.7 MHz
wim 0:5eb5fee234e8 111 // BC2 BC1 BC0 HEX
wim 0:5eb5fee234e8 112 // 0 0 0 0 Blink operation is stopped.
wim 0:5eb5fee234e8 113 // 0 0 1 1 0.1
wim 0:5eb5fee234e8 114 // 0 1 0 2 0.2
wim 0:5eb5fee234e8 115 // 0 1 1 3 0.3
wim 0:5eb5fee234e8 116 // 1 0 0 4 0.4
wim 0:5eb5fee234e8 117 // 1 0 1 5 0.5
wim 0:5eb5fee234e8 118 // 1 1 0 6 0.8
wim 0:5eb5fee234e8 119 // 1 1 1 7 1.0
wim 0:5eb5fee234e8 120 #define LC75711_BLNK_00 0x00
wim 0:5eb5fee234e8 121 #define LC75711_BLNK_01 0x01
wim 0:5eb5fee234e8 122 #define LC75711_BLNK_02 0x02
wim 0:5eb5fee234e8 123 #define LC75711_BLNK_03 0x03
wim 0:5eb5fee234e8 124 #define LC75711_BLNK_04 0x04
wim 0:5eb5fee234e8 125 #define LC75711_BLNK_05 0x05
wim 0:5eb5fee234e8 126 #define LC75711_BLNK_08 0x06
wim 0:5eb5fee234e8 127 #define LC75711_BLNK_10 0x07
wim 0:5eb5fee234e8 128
wim 0:5eb5fee234e8 129 #define LC75711_BLNK_ON (LC75711_BLNK_MA_MSK | LC75711_BLNK_08)
wim 0:5eb5fee234e8 130 #define LC75711_BLNK_OFF (LC75711_BLNK_MA_MSK | LC75711_BLNK_00)
wim 0:5eb5fee234e8 131
wim 0:5eb5fee234e8 132 //Grid selectors
wim 0:5eb5fee234e8 133 #define LC75711_GR1 (1 << 0)
wim 0:5eb5fee234e8 134 #define LC75711_GR2 (1 << 1)
wim 0:5eb5fee234e8 135 #define LC75711_GR3 (1 << 2)
wim 0:5eb5fee234e8 136 #define LC75711_GR4 (1 << 3)
wim 0:5eb5fee234e8 137 #define LC75711_GR5 (1 << 4)
wim 0:5eb5fee234e8 138 #define LC75711_GR6 (1 << 5)
wim 0:5eb5fee234e8 139 #define LC75711_GR7 (1 << 6)
wim 0:5eb5fee234e8 140 #define LC75711_GR8 (1 << 7)
wim 0:5eb5fee234e8 141 #define LC75711_GR9 (1 << 8)
wim 0:5eb5fee234e8 142 #define LC75711_GR10 (1 << 9)
wim 0:5eb5fee234e8 143 #define LC75711_GR11 (1 << 10)
wim 0:5eb5fee234e8 144 #define LC75711_GR12 (1 << 11)
wim 0:5eb5fee234e8 145 #define LC75711_GR13 (1 << 12)
wim 0:5eb5fee234e8 146 #define LC75711_GR14 (1 << 13)
wim 0:5eb5fee234e8 147 #define LC75711_GR15 (1 << 14)
wim 0:5eb5fee234e8 148 #define LC75711_GR16 (1 << 15)
wim 0:5eb5fee234e8 149
wim 0:5eb5fee234e8 150 #define LC75711_GR_ALL (0xFFFF)
wim 0:5eb5fee234e8 151 #define LC75711_GR_MSK (0xFFFF)
wim 0:5eb5fee234e8 152
wim 0:5eb5fee234e8 153 //Blinking Command delay
wim 0:5eb5fee234e8 154 #define LC75711_BLNK_DLY 18
wim 0:5eb5fee234e8 155
wim 0:5eb5fee234e8 156 //
wim 0:5eb5fee234e8 157 //Display On/Off command, allows individual digit control
wim 0:5eb5fee234e8 158 // 0 0 0 1 * M A O GR16 ... GRD1
wim 0:5eb5fee234e8 159 #define LC75711_DSPL_REG 0x10
wim 0:5eb5fee234e8 160 #define LC75711_DSPL_MA_MSK 0x06
wim 0:5eb5fee234e8 161 #define LC75711_DSPL_O_MSK 0x01
wim 0:5eb5fee234e8 162
wim 0:5eb5fee234e8 163 //On/Off Mode
wim 0:5eb5fee234e8 164 // M A Display operating state
wim 0:5eb5fee234e8 165 // 0 0 Both MDATA and ADATA off
wim 0:5eb5fee234e8 166 // 0 1 Only ADATA on
wim 0:5eb5fee234e8 167 // 1 0 Only MDATA on
wim 0:5eb5fee234e8 168 // 1 1 Both ADATA and MDATA on
wim 0:5eb5fee234e8 169
wim 0:5eb5fee234e8 170 //On/Off
wim 0:5eb5fee234e8 171 // O Display state
wim 0:5eb5fee234e8 172 // 0 Off
wim 0:5eb5fee234e8 173 // 1 On
wim 0:5eb5fee234e8 174
wim 0:5eb5fee234e8 175 #define LC75711_DSPL_ON (LC75711_DSPL_MA_MSK | LC75711_DSPL_O_MSK)
wim 0:5eb5fee234e8 176 #define LC75711_DSPL_OFF (LC75711_DSPL_MA_MSK)
wim 0:5eb5fee234e8 177
wim 0:5eb5fee234e8 178 //Display Command delay
wim 0:5eb5fee234e8 179 #define LC75711_DSPL_DLY 18
wim 0:5eb5fee234e8 180
wim 0:5eb5fee234e8 181
wim 0:5eb5fee234e8 182 //Display shift is NOT USED
wim 0:5eb5fee234e8 183 // This would screw up the correlation between column index and character position.
wim 0:5eb5fee234e8 184 // It also screws up the correlation between character data and additional data.
wim 0:5eb5fee234e8 185 // Note that chardata has 64 positions whereas adddata has 16 positions
wim 0:5eb5fee234e8 186
wim 0:5eb5fee234e8 187 //
wim 0:5eb5fee234e8 188 //Display shift command
wim 0:5eb5fee234e8 189 // 0 0 1 0 * M A R/L ...
wim 0:5eb5fee234e8 190 #define LC75711_SHFT_REG 0x20
wim 0:5eb5fee234e8 191 #define LC75711_SHFT_MA_MSK 0x06
wim 0:5eb5fee234e8 192 #define LC75711_SHFT_RL_MSK 0x01
wim 0:5eb5fee234e8 193
wim 0:5eb5fee234e8 194 // Shift Mode
wim 0:5eb5fee234e8 195 // M A Display operating state
wim 0:5eb5fee234e8 196 // 0 0 Neither MDATA and ADATA shift
wim 0:5eb5fee234e8 197 // 0 1 Only ADATA
wim 0:5eb5fee234e8 198 // 1 0 Only MDATA
wim 0:5eb5fee234e8 199 // 1 1 Both ADATA and MDATA
wim 0:5eb5fee234e8 200
wim 0:5eb5fee234e8 201 //Shift direction
wim 0:5eb5fee234e8 202 // RL Display shift
wim 0:5eb5fee234e8 203 // 0 Right
wim 0:5eb5fee234e8 204 // 1 Left
wim 0:5eb5fee234e8 205
wim 0:5eb5fee234e8 206 //Shift Command delay
wim 0:5eb5fee234e8 207 #define LC75711_SHFT_DLY 18
wim 0:5eb5fee234e8 208
wim 0:5eb5fee234e8 209 //
wim 0:5eb5fee234e8 210 //Grid control command
wim 0:5eb5fee234e8 211 // 0 0 1 1 GN3 GN2 GN1 GN0 ...
wim 0:5eb5fee234e8 212 #define LC75711_GRID_REG 0x30
wim 0:5eb5fee234e8 213 #define LC75711_GRID_MSK 0x0F
wim 0:5eb5fee234e8 214
wim 0:5eb5fee234e8 215 //Grids
wim 0:5eb5fee234e8 216 //
wim 0:5eb5fee234e8 217 // GN3 GN2 GN1 GN0
wim 0:5eb5fee234e8 218 // 0 0 0 0 G1 to G16
wim 0:5eb5fee234e8 219 // 0 0 0 1 G1
wim 0:5eb5fee234e8 220 // 0 0 1 0 G1 to G2
wim 0:5eb5fee234e8 221 // 0 0 1 1 G1 to G3
wim 0:5eb5fee234e8 222 // 0 1 0 0 G1 to G4
wim 0:5eb5fee234e8 223 // 0 1 0 1 G1 to G5
wim 0:5eb5fee234e8 224 // 0 1 1 0 G1 to G6
wim 0:5eb5fee234e8 225 // 0 1 1 1 G1 to G7
wim 0:5eb5fee234e8 226 // 1 0 0 0 G1 to G8
wim 0:5eb5fee234e8 227 // 1 0 0 1 G1 to G9
wim 0:5eb5fee234e8 228 // 1 0 1 0 G1 to G10
wim 0:5eb5fee234e8 229 // 1 0 1 1 G1 to G11
wim 0:5eb5fee234e8 230 // 1 1 0 0 G1 to G12
wim 0:5eb5fee234e8 231 // 1 1 0 1 G1 to G13
wim 0:5eb5fee234e8 232 // 1 1 1 0 G1 to G14
wim 0:5eb5fee234e8 233 // 1 1 1 1 G1 to G15
wim 0:5eb5fee234e8 234 #define LC75711_GR1_GR1 0x01
wim 0:5eb5fee234e8 235 #define LC75711_GR1_GR2 0x02
wim 0:5eb5fee234e8 236 #define LC75711_GR1_GR3 0x03
wim 0:5eb5fee234e8 237 #define LC75711_GR1_GR4 0x04
wim 0:5eb5fee234e8 238 #define LC75711_GR1_GR5 0x05
wim 0:5eb5fee234e8 239 #define LC75711_GR1_GR6 0x06
wim 0:5eb5fee234e8 240 #define LC75711_GR1_GR7 0x07
wim 0:5eb5fee234e8 241 #define LC75711_GR1_GR8 0x08
wim 0:5eb5fee234e8 242 #define LC75711_GR1_GR9 0x09
wim 0:5eb5fee234e8 243 #define LC75711_GR1_GR10 0x0A
wim 0:5eb5fee234e8 244 #define LC75711_GR1_GR11 0x0B
wim 0:5eb5fee234e8 245 #define LC75711_GR1_GR12 0x0C
wim 0:5eb5fee234e8 246 #define LC75711_GR1_GR13 0x0D
wim 0:5eb5fee234e8 247 #define LC75711_GR1_GR14 0x0E
wim 0:5eb5fee234e8 248 #define LC75711_GR1_GR15 0x0F
wim 0:5eb5fee234e8 249 #define LC75711_GR1_GR16 0x00
wim 0:5eb5fee234e8 250
wim 0:5eb5fee234e8 251 //Grid Command delay
wim 0:5eb5fee234e8 252 #define LC75711_GRID_DLY 1
wim 0:5eb5fee234e8 253
wim 0:5eb5fee234e8 254 //
wim 0:5eb5fee234e8 255 //Set AC Address command
wim 0:5eb5fee234e8 256 // 0 1 0 0 RA3 RA2 RA1 RA0 * * DA5 DA4 DA3 DA2 DA1 DA0 * * * * * * * *
wim 0:5eb5fee234e8 257 #define LC75711_AC_REG 0x40
wim 0:5eb5fee234e8 258 #define LC75711_AADR_MSK 0x0F
wim 0:5eb5fee234e8 259 #define LC75711_DADR_MSK 0x3F
wim 0:5eb5fee234e8 260
wim 0:5eb5fee234e8 261 //RA3..RA0 ADRAM Address (Additional data)
wim 0:5eb5fee234e8 262 //DA5..DA0 DCRAM Address (Character data)
wim 0:5eb5fee234e8 263
wim 0:5eb5fee234e8 264 //AC Command delay
wim 0:5eb5fee234e8 265 #define LC75711_AC_DLY 18
wim 0:5eb5fee234e8 266
wim 0:5eb5fee234e8 267 //
wim 0:5eb5fee234e8 268 //Set Brightness command
wim 0:5eb5fee234e8 269 // 0 1 0 1 * * * * DC7 DC6 DC5 DC4 DC3 DC2 DC1 DC0 * * * * * * * *
wim 0:5eb5fee234e8 270 #define LC75711_BRT_REG 0x50
wim 0:5eb5fee234e8 271 #define LC75711_BRT_MSK 0xFF
wim 0:5eb5fee234e8 272
wim 0:5eb5fee234e8 273 //DC7..DC0 Brightness Level (0..239)
wim 0:5eb5fee234e8 274 //Note Brightness relationship between the number of active Grids (period) and the BRT value (duty cycle)
wim 0:5eb5fee234e8 275 #define LC75711_BRT_0 0x00
wim 0:5eb5fee234e8 276 #define LC75711_BRT_1 0x20
wim 0:5eb5fee234e8 277 #define LC75711_BRT_2 0x40
wim 0:5eb5fee234e8 278 #define LC75711_BRT_3 0x80
wim 0:5eb5fee234e8 279 #define LC75711_BRT_4 0xA0
wim 0:5eb5fee234e8 280 #define LC75711_BRT_5 0xC0
wim 0:5eb5fee234e8 281 #define LC75711_BRT_6 0xD0
wim 0:5eb5fee234e8 282 #define LC75711_BRT_7 0xF0
wim 0:5eb5fee234e8 283
wim 0:5eb5fee234e8 284 #define LC75711_BRT_DEF (LC75711_BRT_3)
wim 0:5eb5fee234e8 285
wim 0:5eb5fee234e8 286 //Brightness Command delay
wim 0:5eb5fee234e8 287 #define LC75711_BRT_DLY 1
wim 0:5eb5fee234e8 288
wim 0:5eb5fee234e8 289 //
wim 0:5eb5fee234e8 290 //Set Char data command (DCRAM)
wim 0:5eb5fee234e8 291 // 0 1 1 0 * * * * * * DA5 DA4 DA3 DA2 DA1 DA0 D7...D0
wim 0:5eb5fee234e8 292 #define LC75711_DATA_REG 0x60
wim 0:5eb5fee234e8 293 //#define LC75711_DADR_MSK 0x3F
wim 0:5eb5fee234e8 294 //#define LC75711_DATA_MSK 0xFF
wim 0:5eb5fee234e8 295
wim 0:5eb5fee234e8 296 //AA5..DA0 DCRAM Address (Character data)
wim 0:5eb5fee234e8 297 //DA7..DA0 Character Data
wim 0:5eb5fee234e8 298
wim 0:5eb5fee234e8 299 //Set Data Command delay
wim 0:5eb5fee234e8 300 #define LC75711_DATA_DLY 18
wim 0:5eb5fee234e8 301
wim 0:5eb5fee234e8 302 //
wim 0:5eb5fee234e8 303 //Set Additional data command (ADRAM), Used for annunciators etc
wim 0:5eb5fee234e8 304 // 0 1 1 1 RA3 RA2 RA1 RA0 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 * * * * * * * *
wim 0:5eb5fee234e8 305 #define LC75711_ADAT_REG 0x70
wim 0:5eb5fee234e8 306
wim 0:5eb5fee234e8 307 //RA3..RA0 ADRAM Address (Additional data)
wim 0:5eb5fee234e8 308 //#define LC75711_AADR_MSK 0x0F
wim 0:5eb5fee234e8 309
wim 0:5eb5fee234e8 310 //AD8..AD1 Additional Data
wim 0:5eb5fee234e8 311 #define LC75711_ADAT_MSK 0xFF
wim 0:5eb5fee234e8 312
wim 0:5eb5fee234e8 313 //Set AData Command delay
wim 0:5eb5fee234e8 314 #define LC75711_ADAT_DLY 18
wim 0:5eb5fee234e8 315
wim 0:5eb5fee234e8 316 //
wim 0:5eb5fee234e8 317 //Set UDC data command (CGRAM)
wim 0:5eb5fee234e8 318 // 1 0 0 0 * * * * CA7 CA6 ... CA0
wim 0:5eb5fee234e8 319 //
wim 0:5eb5fee234e8 320 // * * * * * CD35 CD34 ... CD25
wim 0:5eb5fee234e8 321 //
wim 0:5eb5fee234e8 322 // CD24 CD23 ... CD9
wim 0:5eb5fee234e8 323 //
wim 0:5eb5fee234e8 324 // CD8 ... CD1
wim 0:5eb5fee234e8 325 #define LC75711_UDC_REG 0x80
wim 0:5eb5fee234e8 326 #define LC75711_UDC_MSK 0x0F
wim 0:5eb5fee234e8 327 #define LC75711_NR_UDC 8
wim 0:5eb5fee234e8 328
wim 0:5eb5fee234e8 329 //CA7..CA0 CGRAM Address (UDC RAM address)
wim 0:5eb5fee234e8 330 //CD35..CD0 UDC Data
wim 0:5eb5fee234e8 331 //UDC is a 5x7 Matrix pattern
wim 0:5eb5fee234e8 332 // CD1 .. CD5
wim 0:5eb5fee234e8 333 // CD6 .. CD10
wim 0:5eb5fee234e8 334 // CD11 .. CD15
wim 0:5eb5fee234e8 335 // CD16 .. CD20
wim 0:5eb5fee234e8 336 // CD21 .. CD25
wim 0:5eb5fee234e8 337 // CD26 .. CD30
wim 0:5eb5fee234e8 338 // CD31 .. CD35
wim 0:5eb5fee234e8 339
wim 0:5eb5fee234e8 340 //Set UDC Data Command delay
wim 0:5eb5fee234e8 341 #define LC75711_UDC_DLY 18
wim 0:5eb5fee234e8 342
wim 0:5eb5fee234e8 343 //UDCs are defined by a 5x7 matrix and stored as 7 bytes
wim 0:5eb5fee234e8 344 typedef char UDCData_t[7];
wim 0:5eb5fee234e8 345
wim 0:5eb5fee234e8 346
wim 0:5eb5fee234e8 347 /** A class for driving Sanyo LC75711 VFD controller
wim 0:5eb5fee234e8 348 *
wim 0:5eb5fee234e8 349 * @brief Supports upto 16 Grids of 35 matrix segments. Also supports 3-8 additional segments (depending on number of grids).
wim 0:5eb5fee234e8 350 * SPI bus interface device.
wim 0:5eb5fee234e8 351 */
wim 0:5eb5fee234e8 352 class LC75711 {
wim 0:5eb5fee234e8 353 public:
wim 0:5eb5fee234e8 354
wim 0:5eb5fee234e8 355 /** Enums for display mode */
wim 0:5eb5fee234e8 356 enum Mode {
wim 0:5eb5fee234e8 357 Grid1_Add8 = LC75711_GR1_GR1,
wim 0:5eb5fee234e8 358 Grid2_Add8 = LC75711_GR1_GR2,
wim 0:5eb5fee234e8 359 Grid3_Add8 = LC75711_GR1_GR3,
wim 0:5eb5fee234e8 360 Grid4_Add8 = LC75711_GR1_GR4,
wim 0:5eb5fee234e8 361 Grid5_Add8 = LC75711_GR1_GR5,
wim 0:5eb5fee234e8 362 Grid6_Add8 = LC75711_GR1_GR6,
wim 0:5eb5fee234e8 363 Grid7_Add8 = LC75711_GR1_GR7,
wim 0:5eb5fee234e8 364 Grid8_Add8 = LC75711_GR1_GR8,
wim 0:5eb5fee234e8 365 Grid9_Add8 = LC75711_GR1_GR9,
wim 0:5eb5fee234e8 366 Grid10_Add8 = LC75711_GR1_GR10,
wim 0:5eb5fee234e8 367 Grid11_Add8 = LC75711_GR1_GR11,
wim 0:5eb5fee234e8 368 Grid12_Add7 = LC75711_GR1_GR12,
wim 0:5eb5fee234e8 369 Grid13_Add6 = LC75711_GR1_GR13,
wim 0:5eb5fee234e8 370 Grid14_Add5 = LC75711_GR1_GR14,
wim 0:5eb5fee234e8 371 Grid15_Add4 = LC75711_GR1_GR15,
wim 0:5eb5fee234e8 372 Grid16_Add3 = LC75711_GR1_GR16
wim 0:5eb5fee234e8 373 };
wim 0:5eb5fee234e8 374
wim 0:5eb5fee234e8 375 /** Datatypes for display data */
wim 0:5eb5fee234e8 376 // typedef char DisplayData_t[LC75711_DISPLAY_MEM];
wim 0:5eb5fee234e8 377 // typedef char DisplayAdd_t[LC75711_ADD_MEM];
wim 0:5eb5fee234e8 378
wim 0:5eb5fee234e8 379 /** Constructor for class for driving Sanyo LC75711 VFD controller
wim 0:5eb5fee234e8 380 *
wim 1:bcf010fcacae 381 * @brief Supports upto 16 Grids of 35 matrix segments. Also supports 3-8 additional segments (depending on number of grids).
wim 1:bcf010fcacae 382 * SPI bus interface device.
wim 0:5eb5fee234e8 383 * @param PinName mosi, sclk, cs SPI bus pins
wim 0:5eb5fee234e8 384 * @param Mode selects number of Grids and Segments (default 11 Grids, 35 matrix segments, 8 additional segments)
wim 0:5eb5fee234e8 385 */
wim 0:5eb5fee234e8 386 LC75711(PinName mosi, PinName sclk, PinName cs, Mode mode = Grid11_Add8);
wim 0:5eb5fee234e8 387
wim 0:5eb5fee234e8 388 /** Clear the screen and locate to 0
wim 1:bcf010fcacae 389 *
wim 1:bcf010fcacae 390 * @param none
wim 1:bcf010fcacae 391 * @return none
wim 1:bcf010fcacae 392 */
wim 0:5eb5fee234e8 393 void cls();
wim 0:5eb5fee234e8 394
wim 0:5eb5fee234e8 395 /** Set the Blink mode
wim 0:5eb5fee234e8 396 *
wim 2:cb6f2b7930c8 397 * @param int grids selected grids for Blinking enable (default = all)
wim 1:bcf010fcacae 398 * @return none
wim 0:5eb5fee234e8 399 */
wim 2:cb6f2b7930c8 400 void setBlink(int grids = LC75711_GR_ALL);
wim 2:cb6f2b7930c8 401
wim 2:cb6f2b7930c8 402 /** Clr the Blink mode
wim 2:cb6f2b7930c8 403 *
wim 2:cb6f2b7930c8 404 * @param int grids selected grids for Blinking disable (default = all)
wim 2:cb6f2b7930c8 405 * @return none
wim 2:cb6f2b7930c8 406 */
wim 2:cb6f2b7930c8 407 void clrBlink(int grids = LC75711_GR_ALL);
wim 0:5eb5fee234e8 408
wim 0:5eb5fee234e8 409 /** Set Brightness
wim 0:5eb5fee234e8 410 *
wim 0:5eb5fee234e8 411 * @param char brightness (8 significant bits, valid range 0..239 (dutycycle linked to number of grids)
wim 0:5eb5fee234e8 412 * @return none
wim 0:5eb5fee234e8 413 */
wim 0:5eb5fee234e8 414 void setBrightness(char brightness = LC75711_BRT_DEF);
wim 0:5eb5fee234e8 415
wim 0:5eb5fee234e8 416 /** Set the Display mode On/off
wim 0:5eb5fee234e8 417 *
wim 0:5eb5fee234e8 418 * @param bool display mode
wim 1:bcf010fcacae 419 * @return none
wim 0:5eb5fee234e8 420 */
wim 0:5eb5fee234e8 421 void setDisplay(bool on);
wim 0:5eb5fee234e8 422
wim 0:5eb5fee234e8 423
wim 0:5eb5fee234e8 424 /** Set User Defined Characters (UDC)
wim 0:5eb5fee234e8 425 *
wim 0:5eb5fee234e8 426 * @param unsigned char udc_idx The Index of the UDC (0..7)
wim 1:bcf010fcacae 427 * @param UDCData_t udc_data The bitpattern for the UDC (7 bytes)
wim 1:bcf010fcacae 428 * @return none
wim 0:5eb5fee234e8 429 */
wim 0:5eb5fee234e8 430 void setUDC(unsigned char udc_idx, UDCData_t udc_data);
wim 0:5eb5fee234e8 431
wim 0:5eb5fee234e8 432
wim 1:bcf010fcacae 433 /** Write Data to LC75711
wim 1:bcf010fcacae 434 *
wim 1:bcf010fcacae 435 * @param char data Character code
wim 1:bcf010fcacae 436 * @param char address Parameter for data
wim 0:5eb5fee234e8 437 * @return none
wim 0:5eb5fee234e8 438 */
wim 0:5eb5fee234e8 439 void writeData(char data, char address);
wim 0:5eb5fee234e8 440
wim 0:5eb5fee234e8 441 /** Write Additional Data to LC75711
wim 1:bcf010fcacae 442 *
wim 1:bcf010fcacae 443 * @param char adata Additional code (annunciator)
wim 1:bcf010fcacae 444 * @param char address Parameter for data
wim 0:5eb5fee234e8 445 * @return none
wim 0:5eb5fee234e8 446 */
wim 0:5eb5fee234e8 447 void writeAData(char adata, char address);
wim 0:5eb5fee234e8 448
wim 0:5eb5fee234e8 449
wim 0:5eb5fee234e8 450 private:
wim 0:5eb5fee234e8 451 SPI _spi;
wim 0:5eb5fee234e8 452 DigitalOut _cs;
wim 0:5eb5fee234e8 453 Mode _mode;
wim 0:5eb5fee234e8 454 int _blink; // Local shadow
wim 0:5eb5fee234e8 455
wim 0:5eb5fee234e8 456 /** Init the SPI interface and the controller
wim 1:bcf010fcacae 457 *
wim 0:5eb5fee234e8 458 * @param none
wim 0:5eb5fee234e8 459 * @return none
wim 0:5eb5fee234e8 460 */
wim 0:5eb5fee234e8 461 void _init();
wim 0:5eb5fee234e8 462
wim 0:5eb5fee234e8 463 /** Helper to reverse all command or databits. The LC75711 expects LSB first, whereas SPI is MSB first
wim 1:bcf010fcacae 464 *
wim 0:5eb5fee234e8 465 * @param char data
wim 0:5eb5fee234e8 466 * @return bitreversed data
wim 0:5eb5fee234e8 467 */
wim 0:5eb5fee234e8 468 char _flip(char data);
wim 0:5eb5fee234e8 469
wim 0:5eb5fee234e8 470
wim 0:5eb5fee234e8 471 /** Set Address
wim 1:bcf010fcacae 472 *
wim 1:bcf010fcacae 473 * @param char RAM address for data displayed at Grid1 (0..63)
wim 1:bcf010fcacae 474 * @param char RAM address for adata displayed at Grid1 (0..15)
wim 0:5eb5fee234e8 475 * @return none
wim 0:5eb5fee234e8 476 *
wim 1:bcf010fcacae 477 * Note that a Shift (L/R) command will change the Address of data displayed at Grid1
wim 0:5eb5fee234e8 478 */
wim 0:5eb5fee234e8 479 void _setAddress(char data_addr=0, char adata_addr=0);
wim 0:5eb5fee234e8 480
wim 0:5eb5fee234e8 481
wim 0:5eb5fee234e8 482 /** Write command and parameters to LC75711
wim 1:bcf010fcacae 483 *
wim 1:bcf010fcacae 484 * @param char cmd Command byte
wim 1:bcf010fcacae 485 * @param char data1 Parameters for command
wim 1:bcf010fcacae 486 * @param char data0 Parameters for command
wim 1:bcf010fcacae 487 * @param char delay Delay for command execution
wim 0:5eb5fee234e8 488 * @return none
wim 0:5eb5fee234e8 489 */
wim 0:5eb5fee234e8 490 void _writeCmd(char cmd, char data1, char data0, char delay);
wim 0:5eb5fee234e8 491
wim 0:5eb5fee234e8 492 };
wim 0:5eb5fee234e8 493
wim 0:5eb5fee234e8 494
wim 0:5eb5fee234e8 495 #if (ASTON_TEST == 1)
wim 0:5eb5fee234e8 496 // Derived class for ASTON display unit
wim 0:5eb5fee234e8 497 // Grids 1-10 all display 35 segment matrix characters and no Additional segments.
wim 0:5eb5fee234e8 498 // Grid 11 uses a number of Segments to display Icons.
wim 0:5eb5fee234e8 499
wim 0:5eb5fee234e8 500 //ASTON Display data
wim 0:5eb5fee234e8 501 #define ASTON_NR_GRIDS 10
wim 0:5eb5fee234e8 502 #define ASTON_NR_DIGITS 10
wim 0:5eb5fee234e8 503 //#define ASTON_NR_UDC 8
wim 0:5eb5fee234e8 504
wim 0:5eb5fee234e8 505 //ASTON Memory size in bytes for Display
wim 0:5eb5fee234e8 506 //#define ASTON_DISPLAY_MEM (ASTON_NR_GRIDS * LC75711_BYTES_PER_GRID)
wim 0:5eb5fee234e8 507
wim 0:5eb5fee234e8 508
wim 0:5eb5fee234e8 509 /** Constructor for class for driving Sanyo LC75711 VFD controller as used in ASTON
wim 0:5eb5fee234e8 510 *
wim 0:5eb5fee234e8 511 * @brief Supports 10 Grids of 35 Segments without additional Segments and uses Grid 11 for Icon segments.
wim 0:5eb5fee234e8 512 *
wim 0:5eb5fee234e8 513 * @param PinName mosi, sclk, cs SPI bus pins
wim 0:5eb5fee234e8 514 */
wim 0:5eb5fee234e8 515 class LC75711_ASTON : public LC75711, public Stream {
wim 0:5eb5fee234e8 516 public:
wim 0:5eb5fee234e8 517
wim 0:5eb5fee234e8 518 /** Enums for Icons
wim 0:5eb5fee234e8 519 *
wim 1:bcf010fcacae 520 * @brief Aston display uses Grid 11 to show Icons.
wim 0:5eb5fee234e8 521 * The Icons are each connnected to one of the 35 segments.
wim 0:5eb5fee234e8 522 * Icons are controlled by redefining UDC_0.
wim 0:5eb5fee234e8 523 * Icon Enums encode UDC_0 byte index in 8 MSBs and encode Icon bit/segment in 8 LSBs
wim 0:5eb5fee234e8 524 */
wim 0:5eb5fee234e8 525 enum Icon {
wim 0:5eb5fee234e8 526 R0 = (6<<8) | 4,
wim 0:5eb5fee234e8 527 R1 = (6<<8) | 3,
wim 0:5eb5fee234e8 528 R2 = (6<<8) | 2,
wim 0:5eb5fee234e8 529 R3 = (6<<8) | 1,
wim 0:5eb5fee234e8 530 CRD1 = (5<<8) | 4,
wim 0:5eb5fee234e8 531 CRD2 = (5<<8) | 3,
wim 0:5eb5fee234e8 532 CARD = (5<<8) | 2,
wim 0:5eb5fee234e8 533 KEY = (4<<8) | 1,
wim 0:5eb5fee234e8 534 VDCRP = (4<<8) | 2,
wim 0:5eb5fee234e8 535 D = (4<<8) | 0,
wim 0:5eb5fee234e8 536 D2 = (3<<8) | 4,
wim 0:5eb5fee234e8 537 MAC = (3<<8) | 3,
wim 0:5eb5fee234e8 538 R16_9 = (0<<8) | 0,
wim 0:5eb5fee234e8 539 DISH = (5<<8) | 0,
wim 0:5eb5fee234e8 540 DSH1 = (4<<8) | 3,
wim 0:5eb5fee234e8 541 DSH2 = (5<<8) | 1,
wim 0:5eb5fee234e8 542 TMR = (1<<8) | 3,
wim 0:5eb5fee234e8 543 CBND = (2<<8) | 1,
wim 0:5eb5fee234e8 544 KBND = (2<<8) | 4,
wim 0:5eb5fee234e8 545 AFC = (3<<8) | 0
wim 0:5eb5fee234e8 546 };
wim 0:5eb5fee234e8 547
wim 0:5eb5fee234e8 548
wim 0:5eb5fee234e8 549 /** Constructor for class for driving Sanyo LC75711 VFD controller as used in ASTON
wim 0:5eb5fee234e8 550 *
wim 0:5eb5fee234e8 551 * @brief Supports 10 Grids of 35 Segments without additional Segments and uses Grid 11 for Icon segments.
wim 0:5eb5fee234e8 552 *
wim 0:5eb5fee234e8 553 * @param PinName mosi, sclk, cs SPI bus pins
wim 0:5eb5fee234e8 554 */
wim 0:5eb5fee234e8 555 LC75711_ASTON(PinName mosi, PinName sclk, PinName cs);
wim 0:5eb5fee234e8 556
wim 0:5eb5fee234e8 557 #if DOXYGEN_ONLY
wim 0:5eb5fee234e8 558 /** Write a character to the Display
wim 0:5eb5fee234e8 559 *
wim 0:5eb5fee234e8 560 * @param c The character to write to the display
wim 1:bcf010fcacae 561 * @return char written
wim 0:5eb5fee234e8 562 */
wim 0:5eb5fee234e8 563 int putc(int c);
wim 0:5eb5fee234e8 564
wim 0:5eb5fee234e8 565 /** Write a formatted string to the Display
wim 0:5eb5fee234e8 566 *
wim 0:5eb5fee234e8 567 * @param format A printf-style format string, followed by the
wim 0:5eb5fee234e8 568 * variables to use in formatting the string.
wim 0:5eb5fee234e8 569 */
wim 0:5eb5fee234e8 570 int printf(const char* format, ...);
wim 0:5eb5fee234e8 571 #endif
wim 0:5eb5fee234e8 572
wim 0:5eb5fee234e8 573 /** Locate cursor to a screen column
wim 0:5eb5fee234e8 574 *
wim 0:5eb5fee234e8 575 * @param column The horizontal position from the left, indexed from 0
wim 1:bcf010fcacae 576 * @return none
wim 0:5eb5fee234e8 577 */
wim 0:5eb5fee234e8 578 void locate(int column);
wim 0:5eb5fee234e8 579
wim 0:5eb5fee234e8 580 /** Clear the screen and locate to 0
wim 1:bcf010fcacae 581 *
wim 0:5eb5fee234e8 582 * @param bool clrAll Clear Icons also (default = false)
wim 0:5eb5fee234e8 583 */
wim 0:5eb5fee234e8 584 void cls(bool clrAll = false);
wim 0:5eb5fee234e8 585
wim 0:5eb5fee234e8 586 /** Set Icon
wim 0:5eb5fee234e8 587 *
wim 0:5eb5fee234e8 588 * @param Icon Enums Icon Encodes UDC_0 byte index in 8 MSBs and encodes Icon bit/segment in 8 LSBs
wim 0:5eb5fee234e8 589 * @return none
wim 0:5eb5fee234e8 590 */
wim 0:5eb5fee234e8 591 void setIcon(Icon icon);
wim 0:5eb5fee234e8 592
wim 0:5eb5fee234e8 593 /** Clr Icon
wim 0:5eb5fee234e8 594 *
wim 0:5eb5fee234e8 595 * @param Icon Enums Icon Encodes UDC_0 byte index in 8 MSBs and encodes Icon bit/segment in 8 LSBs
wim 0:5eb5fee234e8 596 * @return none
wim 0:5eb5fee234e8 597 */
wim 0:5eb5fee234e8 598 void clrIcon(Icon icon);
wim 0:5eb5fee234e8 599
wim 0:5eb5fee234e8 600 /** Number of screen columns
wim 0:5eb5fee234e8 601 *
wim 0:5eb5fee234e8 602 * @param none
wim 0:5eb5fee234e8 603 * @return columns
wim 0:5eb5fee234e8 604 */
wim 0:5eb5fee234e8 605 int columns();
wim 0:5eb5fee234e8 606
wim 0:5eb5fee234e8 607 protected:
wim 0:5eb5fee234e8 608 // Stream implementation functions
wim 0:5eb5fee234e8 609 virtual int _putc(int value);
wim 0:5eb5fee234e8 610 virtual int _getc();
wim 0:5eb5fee234e8 611
wim 0:5eb5fee234e8 612 private:
wim 0:5eb5fee234e8 613 int _column; // Current cursor location
wim 0:5eb5fee234e8 614 int _columns; // Max number of columns
wim 0:5eb5fee234e8 615
wim 0:5eb5fee234e8 616 // DisplayData_t _displaybuffer; // Local mirror for all chars and icons
wim 0:5eb5fee234e8 617 // UDCData_t _UDC_16S; // User Defined Character pattterns (UDC)
wim 0:5eb5fee234e8 618 UDCData_t _udc_icon; // The UDC_0 bitpattern for the Icons shown at Grid 11 (7 bytes)
wim 0:5eb5fee234e8 619 };
wim 0:5eb5fee234e8 620 #endif
wim 0:5eb5fee234e8 621
wim 0:5eb5fee234e8 622 #endif